From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67962199E9B; Thu, 10 Oct 2024 19:22:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728588165; cv=none; b=C8dGdTiqHBWieRkpfqq0TH6N7roM5DyAaqcc69440oHztKUOR9E7qihBOz6WME5cSl72CSTxx3MTS1aaDgNGeviRZ6Iy+x5TVRRmUfHi3xc9e28ttvT9jvGBdeSRGTr5WTynFkPer1JqeSECpyUh3m+mhsNfvBc0Ew4G61x1AKk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728588165; c=relaxed/simple; bh=BobLlBAHXvgkmTfcYJ918ZwYFw0KZ50oja9YbgYE578=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition:In-Reply-To; b=WwxjmHy0i0bV7GNCEThF4AK8PPUpXZv/0vhH6Kg4pKy+r7z6ocUvYc0icarjJe0DZQ7QfiquExmYMND2wfuIFwWSn0wkpMnTh7ACPBqdKuHCxs2A/QfKEAF4nA5BBv/ge8/0kGhVfpT8l7kmHH9rA6D7vxKdqZ97RlzXfFUZdaw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VxL8Dtpm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VxL8Dtpm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B3EDDC4CECD; Thu, 10 Oct 2024 19:22:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1728588165; bh=BobLlBAHXvgkmTfcYJ918ZwYFw0KZ50oja9YbgYE578=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=VxL8DtpmsZ5s62//hcB6UyBuWVpNLlNZliRP1k6XpGxdgNjgkNJDpI+25sFjZnh1B hZF92dbDyUbZKSPKZR5OesyedLtFqu6Zv0xzmyzeuBNkShYrobrCwSJZnWaF0rQ/xY zzDxaVNBPuxseoYAbbjT3XpzqwcK33Tr7ZYMqZ32PY8JZZkzsg6DJCXlUoyYDWsb7w VOOJ6NEFaEUnikP1wCdqFs1I/EeHUC3+nJrbMXcyt05oAM/MuNHhwIyJoYRWOesePb 1O/5LhM4vIOWCL6ft9LvN5ZND5wj2IJgJmTaCVhGpIBMJTMf0XjXF9ZR1wMkntSHiw SGBfd3g0zr+tg== Date: Thu, 10 Oct 2024 14:22:43 -0500 From: Bjorn Helgaas To: Herve Codina Cc: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Luca Ceresoli , Thomas Petazzoni Subject: Re: [PATCH v9 1/6] misc: Add support for LAN966x PCI device Message-ID: <20241010192243.GA573660@bhelgaas> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241010063611.788527-2-herve.codina@bootlin.com> On Thu, Oct 10, 2024 at 08:36:01AM +0200, Herve Codina wrote: > Add a PCI driver that handles the LAN966x PCI device using a device-tree > overlay. This overlay is applied to the PCI device DT node and allows to > describe components that are present in the device. > > The memory from the device-tree is remapped to the BAR memory thanks to > "ranges" properties computed at runtime by the PCI core during the PCI > enumeration. > > The PCI device itself acts as an interrupt controller and is used as the > parent of the internal LAN966x interrupt controller to route the > interrupts to the assigned PCI INTx interrupt. > > Signed-off-by: Herve Codina > Acked-by: Greg Kroah-Hartman Acked-by: Bjorn Helgaas # quirks.c > --- > drivers/misc/Kconfig | 24 ++++ > drivers/misc/Makefile | 3 + > drivers/misc/lan966x_pci.c | 215 ++++++++++++++++++++++++++++++++++ > drivers/misc/lan966x_pci.dtso | 167 ++++++++++++++++++++++++++ > drivers/pci/quirks.c | 1 + > 5 files changed, 410 insertions(+) > create mode 100644 drivers/misc/lan966x_pci.c > create mode 100644 drivers/misc/lan966x_pci.dtso > > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig > index 3fe7e2a9bd29..8e5b06ac9b6f 100644 > --- a/drivers/misc/Kconfig > +++ b/drivers/misc/Kconfig > @@ -610,6 +610,30 @@ config MARVELL_CN10K_DPI > To compile this driver as a module, choose M here: the module > will be called mrvl_cn10k_dpi. > > +config MCHP_LAN966X_PCI > + tristate "Microchip LAN966x PCIe Support" > + depends on PCI > + select OF > + select OF_OVERLAY > + select IRQ_DOMAIN > + help > + This enables the support for the LAN966x PCIe device. > + This is used to drive the LAN966x PCIe device from the host system > + to which it is connected. > + > + This driver uses an overlay to load other drivers to support for > + LAN966x internal components. > + Even if this driver does not depend on these other drivers, in order > + to have a fully functional board, the following drivers are needed: I don't think "overlay" by itself has enough context to be useful as help text. Maybe "device tree" or similar hint? Add blank lines between paragraphs or reflow into a single paragraph. > + - fixed-clock (COMMON_CLK) > + - lan966x-oic (LAN966X_OIC) > + - lan966x-cpu-syscon (MFD_SYSCON) > + - lan966x-switch-reset (RESET_MCHP_SPARX5) > + - lan966x-pinctrl (PINCTRL_OCELOT) > + - lan966x-serdes (PHY_LAN966X_SERDES) > + - lan966x-miim (MDIO_MSCC_MIIM) > + - lan966x-switch (LAN966X_SWITCH) > + > source "drivers/misc/c2port/Kconfig" > source "drivers/misc/eeprom/Kconfig" > source "drivers/misc/cb710/Kconfig" > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index dccb60c1d9cc..41dec625ed7b 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -6266,6 +6266,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e, dpc_log_size); > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node); > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REDHAT, 0x0005, of_pci_make_dev_node); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, 0x9660, of_pci_make_dev_node); > > /* > * Devices known to require a longer delay before first config space access > -- > 2.46.2 >