From: Bjorn Helgaas <helgaas@kernel.org>
To: Stanimir Varbanov <svarbanov@suse.de>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Florian Fainelli <florian.fainelli@broadcom.com>,
Jim Quinlan <jim2101024@gmail.com>,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
kw@linux.com, Philipp Zabel <p.zabel@pengutronix.de>,
Andrea della Porta <andrea.porta@suse.com>,
Phil Elwell <phil@raspberrypi.com>,
Jonathan Bell <jonathan@raspberrypi.com>
Subject: Re: [PATCH v3 06/11] PCI: brcmstb: Avoid turn off of bridge reset
Date: Mon, 14 Oct 2024 12:01:05 -0500 [thread overview]
Message-ID: <20241014170105.GA611115@bhelgaas> (raw)
In-Reply-To: <20241014130710.413-7-svarbanov@suse.de>
On Mon, Oct 14, 2024 at 04:07:05PM +0300, Stanimir Varbanov wrote:
> On PCIe turn off avoid shutdown of bridge reset,
> by introducing a quirk flag.
Can you include something here about *why* we need this change? I
think the RESCAL comment below would be a good start.
I think this should be squashed with the next commit that adds the use
of CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN. Otherwise this commit doesn't
have an obvious reason.
> Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
> ---
> v2 -> v3:
> - Added more descriptive comment on CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN quirk.
>
> drivers/pci/controller/pcie-brcmstb.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index b76c16287f37..757a1646d53c 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -234,10 +234,20 @@ struct inbound_win {
> u64 cpu_addr;
> };
>
> +/*
> + * The RESCAL block is tied to PCIe controller #1, regardless of the number of
> + * controllers, and turning off PCIe controller #1 prevents access to the RESCAL
> + * register blocks, therefore not other controller can access this register
> + * space, and depending upon the bus fabric we may get a timeout (UBUS/GISB),
> + * or a hang (AXI).
s/not other/no other/
> + */
> +#define CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN BIT(0)
> +
> struct pcie_cfg_data {
> const int *offsets;
> const enum pcie_soc_base soc_base;
> const bool has_phy;
> + const u32 quirks;
> u8 num_inbound_wins;
> int (*perst_set)(struct brcm_pcie *pcie, u32 val);
> int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> @@ -290,6 +300,7 @@ struct brcm_pcie {
> struct subdev_regulators *sr;
> bool ep_wakeup_capable;
> bool has_phy;
> + u32 quirks;
> u8 num_inbound_wins;
> };
>
> @@ -1539,8 +1550,9 @@ static int brcm_pcie_turn_off(struct brcm_pcie *pcie)
> u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
> writel(tmp, base + HARD_DEBUG(pcie));
>
> - /* Shutdown PCIe bridge */
> - ret = pcie->bridge_sw_init_set(pcie, 1);
> + if (!(pcie->quirks & CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN))
> + /* Shutdown PCIe bridge */
> + ret = pcie->bridge_sw_init_set(pcie, 1);
>
> return ret;
> }
> @@ -1854,6 +1866,7 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> pcie->perst_set = data->perst_set;
> pcie->bridge_sw_init_set = data->bridge_sw_init_set;
> pcie->has_phy = data->has_phy;
> + pcie->quirks = data->quirks;
> pcie->num_inbound_wins = data->num_inbound_wins;
>
> pcie->base = devm_platform_ioremap_resource(pdev, 0);
> --
> 2.43.0
>
next prev parent reply other threads:[~2024-10-14 17:01 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-14 13:06 [PATCH v3 00/11] Add PCIe support for bcm2712 Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 01/11] dt-bindings: interrupt-controller: Add bcm2712 MSI-X DT bindings Stanimir Varbanov
2024-10-15 20:11 ` Rob Herring (Arm)
2024-10-14 13:07 ` [PATCH v3 02/11] dt-bindings: PCI: brcmstb: Update bindings for PCIe on bcm2712 Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 03/11] irqchip: mip: Add Broadcom bcm2712 MSI-X interrupt controller Stanimir Varbanov
2024-10-14 16:31 ` Thomas Gleixner
2024-10-14 13:07 ` [PATCH v3 04/11] PCI: brcmstb: Expand inbound size calculation helper Stanimir Varbanov
2024-10-14 16:57 ` Bjorn Helgaas
2024-10-14 17:10 ` Florian Fainelli
2024-10-14 17:25 ` Bjorn Helgaas
2024-10-16 17:09 ` Jim Quinlan
2024-10-16 19:38 ` Bjorn Helgaas
2024-10-17 8:02 ` Stanimir Varbanov
2024-10-18 23:31 ` Bjorn Helgaas
2024-10-14 13:07 ` [PATCH v3 05/11] PCI: brcmstb: Enable external MSI-X if available Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 06/11] PCI: brcmstb: Avoid turn off of bridge reset Stanimir Varbanov
2024-10-14 17:01 ` Bjorn Helgaas [this message]
2024-10-14 17:02 ` Florian Fainelli
2024-10-17 8:07 ` Stanimir Varbanov
2024-10-16 17:17 ` Jim Quinlan
2024-10-17 8:05 ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 07/11] PCI: brcmstb: Add bcm2712 support Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 08/11] PCI: brcmstb: Reuse config structure Stanimir Varbanov
2024-10-14 17:03 ` Bjorn Helgaas
2024-10-17 8:09 ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 09/11] PCI: brcmstb: Adjust PHY PLL setup to use a 54MHz input refclk Stanimir Varbanov
2024-10-14 17:07 ` Florian Fainelli
2024-10-17 14:42 ` Stanimir Varbanov
2024-10-21 12:56 ` Jonathan Bell
2024-10-21 15:39 ` Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 10/11] arm64: dts: broadcom: bcm2712: Add PCIe DT nodes Stanimir Varbanov
2024-10-14 13:07 ` [PATCH v3 11/11] arm64: dts: broadcom: bcm2712-rpi-5-b: Enable " Stanimir Varbanov
2024-10-14 14:05 ` [PATCH v3 00/11] Add PCIe support for bcm2712 Rob Herring (Arm)
2024-10-14 15:41 ` Stanimir Varbanov
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