From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Joy Zou <joy.zou@nxp.com>,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Peng Fan <peng.fan@nxp.com>, Jason Gunthorpe <jgg@ziepe.ca>
Subject: [PATCH RFC 1/2] dt-bindings: iommu: arm,smmu-v3: introduce nxp,imx95-bypass-sid-zero
Date: Tue, 15 Oct 2024 11:14:42 +0800 [thread overview]
Message-ID: <20241015-smmuv3-v1-1-e4b9ed1b5501@nxp.com> (raw)
In-Reply-To: <20241015-smmuv3-v1-0-e4b9ed1b5501@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
i.MX95 eDMA3 connects to DSU ACP, supporting dma coherent memory to
memory operations. However TBU is in the path between eDMA3 and ACP,
need to bypass the default SID 0 to make eDMA3 work properly.
Introduce the property "nxp,imx95-bypass-sid-zero" for bypassing SID 0.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
index 75fcf4cb52d9f6449238578f20288966af35cab3..88ab908154e31aabf98f3bbe4df348956f49d5e1 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
@@ -69,6 +69,10 @@ properties:
register access with page 0 offsets. Set for Cavium ThunderX2 silicon that
doesn't support SMMU page1 register space.
+ nxp,imx95-bypass-sid-zero:
+ type: boolean
+ description: StreamID 0 that needs transaction set as bypass mode.
+
required:
- compatible
- reg
--
2.37.1
next prev parent reply other threads:[~2024-10-15 3:06 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-15 3:14 [PATCH RFC 0/2] iommu/arm-smmu-v3: bypass streamid zero on i.MX95 Peng Fan (OSS)
2024-10-15 3:14 ` Peng Fan (OSS) [this message]
2024-10-15 3:14 ` [PATCH RFC 2/2] iommu/arm-smmu-v3: Bypass SID0 for NXP i.MX95 Peng Fan (OSS)
2024-10-15 8:13 ` Pranjal Shrivastava
2024-10-15 12:47 ` Jason Gunthorpe
2024-10-15 15:00 ` Pranjal Shrivastava
2024-10-15 15:07 ` Pranjal Shrivastava
2024-10-15 15:24 ` Jason Gunthorpe
2024-10-15 15:13 ` Robin Murphy
2024-10-15 15:19 ` Pranjal Shrivastava
2024-10-15 15:31 ` Jason Gunthorpe
2024-10-15 15:37 ` Robin Murphy
2024-10-15 16:10 ` Pranjal Shrivastava
2024-10-16 9:02 ` Peng Fan
2024-10-16 9:12 ` Pranjal Shrivastava
2024-10-15 7:45 ` [PATCH RFC 0/2] iommu/arm-smmu-v3: bypass streamid zero on i.MX95 Pranjal Shrivastava
2024-10-15 14:47 ` Robin Murphy
2024-10-16 0:56 ` Peng Fan
2024-10-16 1:15 ` Nicolin Chen
2024-10-16 8:53 ` Peng Fan
2024-10-16 9:06 ` Pranjal Shrivastava
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