* [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible
@ 2024-10-17 18:04 Dmitry Baryshkov
2024-10-18 7:17 ` Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2024-10-17 18:04 UTC (permalink / raw)
To: Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson
Cc: linux-arm-msm, linux-pci, devicetree, linux-kernel
On the Qualcomm SAR2130P platform the PCIe host is compatible with the
DWC controller present on the SM8550 platorm, just using one additional
clock.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
index 24cb38673581d7391f877d3af5fadd6096c8d5be..2b5498a35dcc1707e6ba7356389c33b3fcce9d0f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
@@ -20,6 +20,7 @@ properties:
- const: qcom,pcie-sm8550
- items:
- enum:
+ - qcom,sar2130p-pcie
- qcom,pcie-sm8650
- const: qcom,pcie-sm8550
@@ -39,7 +40,7 @@ properties:
clocks:
minItems: 7
- maxItems: 8
+ maxItems: 9
clock-names:
minItems: 7
@@ -52,6 +53,7 @@ properties:
- const: ddrss_sf_tbu # PCIe SF TBU clock
- const: noc_aggr # Aggre NoC PCIe AXI clock
- const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
+ - const: qmip_pcie_ahb # QMIP PCIe AHB clock
interrupts:
minItems: 8
---
base-commit: 7df1e7189cecb6965ce672e820a5ec6cf499b65b
change-id: 20241017-sar2130p-pci-dc0c22bea87e
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible
2024-10-17 18:04 [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible Dmitry Baryshkov
@ 2024-10-18 7:17 ` Krzysztof Kozlowski
2024-10-31 17:31 ` Dmitry Baryshkov
2024-11-03 20:33 ` Krzysztof Wilczyński
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2024-10-18 7:17 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, linux-arm-msm,
linux-pci, devicetree, linux-kernel
On Thu, Oct 17, 2024 at 09:04:47PM +0300, Dmitry Baryshkov wrote:
> On the Qualcomm SAR2130P platform the PCIe host is compatible with the
> DWC controller present on the SM8550 platorm, just using one additional
> clock.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible
2024-10-17 18:04 [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible Dmitry Baryshkov
2024-10-18 7:17 ` Krzysztof Kozlowski
@ 2024-10-31 17:31 ` Dmitry Baryshkov
2024-11-03 20:33 ` Krzysztof Wilczyński
2 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2024-10-31 17:31 UTC (permalink / raw)
To: Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson
Cc: linux-arm-msm, linux-pci, devicetree, linux-kernel
On Thu, Oct 17, 2024 at 09:04:47PM +0300, Dmitry Baryshkov wrote:
> On the Qualcomm SAR2130P platform the PCIe host is compatible with the
> DWC controller present on the SM8550 platorm, just using one additional
> clock.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Gracious ping, the patch has been acked by DT maintainers, but is still
not present in linux-next and got no other reviews.
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
> index 24cb38673581d7391f877d3af5fadd6096c8d5be..2b5498a35dcc1707e6ba7356389c33b3fcce9d0f 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
> @@ -20,6 +20,7 @@ properties:
> - const: qcom,pcie-sm8550
> - items:
> - enum:
> + - qcom,sar2130p-pcie
> - qcom,pcie-sm8650
> - const: qcom,pcie-sm8550
>
> @@ -39,7 +40,7 @@ properties:
>
> clocks:
> minItems: 7
> - maxItems: 8
> + maxItems: 9
>
> clock-names:
> minItems: 7
> @@ -52,6 +53,7 @@ properties:
> - const: ddrss_sf_tbu # PCIe SF TBU clock
> - const: noc_aggr # Aggre NoC PCIe AXI clock
> - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
> + - const: qmip_pcie_ahb # QMIP PCIe AHB clock
>
> interrupts:
> minItems: 8
>
> ---
> base-commit: 7df1e7189cecb6965ce672e820a5ec6cf499b65b
> change-id: 20241017-sar2130p-pci-dc0c22bea87e
>
> Best regards,
> --
> Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible
2024-10-17 18:04 [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible Dmitry Baryshkov
2024-10-18 7:17 ` Krzysztof Kozlowski
2024-10-31 17:31 ` Dmitry Baryshkov
@ 2024-11-03 20:33 ` Krzysztof Wilczyński
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Wilczyński @ 2024-11-03 20:33 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Lorenzo Pieralisi, Manivannan Sadhasivam, Rob Herring,
Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
linux-arm-msm, linux-pci, devicetree, linux-kernel
Hello,
> On the Qualcomm SAR2130P platform the PCIe host is compatible with the
> DWC controller present on the SM8550 platorm, just using one additional
> clock.
Applied to dt-bindings, thank you!
[01/01] dt-bindings: PCI: qcom,pcie-sm8550: Add SAR2130P compatible
https://git.kernel.org/pci/pci/c/d38cc57c14ff
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-10-17 18:04 [PATCH] dt-bindings: PCI: qcom,pcie-sm8550: add SAR2130P compatible Dmitry Baryshkov
2024-10-18 7:17 ` Krzysztof Kozlowski
2024-10-31 17:31 ` Dmitry Baryshkov
2024-11-03 20:33 ` Krzysztof Wilczyński
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