From: Rob Herring <robh@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: "Inochi Amaoto" <inochiama@gmail.com>,
"Chen Wang" <unicorn_wang@outlook.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Inochi Amaoto" <inochiama@outlook.com>,
"Yixun Lan" <dlan@gentoo.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 1/2] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts
Date: Mon, 21 Oct 2024 13:00:38 -0500 [thread overview]
Message-ID: <20241021180038.GA738756-robh@kernel.org> (raw)
In-Reply-To: <20241021-rosy-drove-1ae3c8985405@spud>
On Mon, Oct 21, 2024 at 01:21:58PM +0100, Conor Dooley wrote:
> On Mon, Oct 21, 2024 at 08:18:58PM +0800, Inochi Amaoto wrote:
> > On Mon, Oct 21, 2024 at 01:10:52PM +0100, Conor Dooley wrote:
> > > On Mon, Oct 21, 2024 at 03:26:05PM +0800, Inochi Amaoto wrote:
> > > > The UART of SG2044 is modified version of the standard Synopsys
> > > > DesignWare UART. The UART on SG2044 relys on the internal divisor
> > > > and can not set right clock rate for the common bitrates.
> > > >
> > > > Add compatibles string for the Sophgo SG2044 uarts.
> > > >
> > > > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > > > ---
> > > > .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++
> > > > 1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> > > > index 4cdb0dcaccf3..6963f89a1848 100644
> > > > --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> > > > +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> > > > @@ -58,6 +58,10 @@ properties:
> > > > - brcm,bcm11351-dw-apb-uart
> > > > - brcm,bcm21664-dw-apb-uart
> > > > - const: snps,dw-apb-uart
> > > > + - items:
> > > > + - enum:
> > > > + - sophgo,sg2044-uart
> > > > + - const: snps,dw-apb-uart
> > >
> > > Why does each vendor have an items entry of its own? Seems like needless
> > > clutter of the file IMO, except for the renesas bit.
> >
> > I just follow others when writing this binding. I think it may need
> > another patch to fix this problem, right?
>
> Yeah. But I'd hold off to see if someone gives a rationale for it being
> done this way before sending that. I've not deleted this thread, and
> will send an ack if someone justifies why the binding is written like
> this.
No reason to be separate.
Rob
next prev parent reply other threads:[~2024-10-21 18:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 7:26 [PATCH v2 0/2] serial: 8250_dw: Introduce SG2044 uart support Inochi Amaoto
2024-10-21 7:26 ` [PATCH v2 1/2] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts Inochi Amaoto
2024-10-21 12:10 ` Conor Dooley
2024-10-21 12:18 ` Inochi Amaoto
2024-10-21 12:21 ` Conor Dooley
2024-10-21 12:23 ` Inochi Amaoto
2024-10-22 17:25 ` Conor Dooley
2024-10-23 0:32 ` Inochi Amaoto
2024-10-23 18:53 ` Conor Dooley
2024-10-21 18:00 ` Rob Herring [this message]
2024-10-21 7:26 ` [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk Inochi Amaoto
2024-10-21 8:29 ` Andy Shevchenko
2024-10-21 8:52 ` Ilpo Järvinen
2024-10-21 10:08 ` Inochi Amaoto
2024-10-21 10:17 ` Ilpo Järvinen
2024-10-21 12:03 ` Andy Shevchenko
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