From: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Subject: [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board
Date: Wed, 23 Oct 2024 17:46:41 +0200 [thread overview]
Message-ID: <20241023154643.4025941-1-niklas.soderlund+renesas@ragnatech.se> (raw)
Hi Geert,
This small series wires up the Marvell 88Q2110 PHYs found on the Falcon
Ethernet breakout board. With this applied all five PHYs are probed
correctly.
mv88q2110 e6810000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6810000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6820000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6820000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6830000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6830000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6840000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6840000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6850000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6850000.ethernet-ffffffff:07, irq=POLL)
The wire-up works fine with unbind/bind cycles of the device and the PHY
can properly be probed again.
The primary issue we had with this in the past was due to an incorrect
PHY address. After studying the schematics (v100) I found the PHYs
address pins are wired differently on Falcon compared to other Gen4
boards. On Falcon they are pulled-down, while on other Gen4 boards they
are left unconnected and subjected to the PHYs internal pull-ups. This
gives the PHY an address where the lower 3 bits of the address is
inverted for Falcon.
Patch 1/2 is a simple preparation patch removing properties that should
not be set in the base SoC include and will produce warnings once the
mdio node is added. Patch 2/2 wires up the PHYs.
Most likely the change in 1/2 should be applied to AVB0 also, but
pending our discussion in a different patch about where to place the
reset-gpio property for mdio nodes that don't strictly need it I left
AVB0 as is.
See individual patches for changelog.
Niklas Söderlund (2):
arm64: dts: renesas: r8a779a0: Remove address- and size-cells from
AVB[1-5]
arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the
breakout board
.../dts/renesas/r8a779a0-falcon-ethernet.dtsi | 242 ++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 10 -
2 files changed, 242 insertions(+), 10 deletions(-)
--
2.46.2
next reply other threads:[~2024-10-23 15:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 15:46 Niklas Söderlund [this message]
2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund
2024-12-12 8:39 ` Geert Uytterhoeven
2024-12-12 8:52 ` Geert Uytterhoeven
2024-10-23 15:46 ` [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board Niklas Söderlund
2024-12-13 10:14 ` Geert Uytterhoeven
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