* [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board
@ 2024-10-23 15:46 Niklas Söderlund
2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund
2024-10-23 15:46 ` [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board Niklas Söderlund
0 siblings, 2 replies; 6+ messages in thread
From: Niklas Söderlund @ 2024-10-23 15:46 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-renesas-soc, devicetree
Cc: Niklas Söderlund
Hi Geert,
This small series wires up the Marvell 88Q2110 PHYs found on the Falcon
Ethernet breakout board. With this applied all five PHYs are probed
correctly.
mv88q2110 e6810000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6810000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6820000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6820000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6830000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6830000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6840000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6840000.ethernet-ffffffff:07, irq=POLL)
mv88q2110 e6850000.ethernet-ffffffff:07: attached PHY driver (mii_bus:phy_addr=e6850000.ethernet-ffffffff:07, irq=POLL)
The wire-up works fine with unbind/bind cycles of the device and the PHY
can properly be probed again.
The primary issue we had with this in the past was due to an incorrect
PHY address. After studying the schematics (v100) I found the PHYs
address pins are wired differently on Falcon compared to other Gen4
boards. On Falcon they are pulled-down, while on other Gen4 boards they
are left unconnected and subjected to the PHYs internal pull-ups. This
gives the PHY an address where the lower 3 bits of the address is
inverted for Falcon.
Patch 1/2 is a simple preparation patch removing properties that should
not be set in the base SoC include and will produce warnings once the
mdio node is added. Patch 2/2 wires up the PHYs.
Most likely the change in 1/2 should be applied to AVB0 also, but
pending our discussion in a different patch about where to place the
reset-gpio property for mdio nodes that don't strictly need it I left
AVB0 as is.
See individual patches for changelog.
Niklas Söderlund (2):
arm64: dts: renesas: r8a779a0: Remove address- and size-cells from
AVB[1-5]
arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the
breakout board
.../dts/renesas/r8a779a0-falcon-ethernet.dtsi | 242 ++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 10 -
2 files changed, 242 insertions(+), 10 deletions(-)
--
2.46.2
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] 2024-10-23 15:46 [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board Niklas Söderlund @ 2024-10-23 15:46 ` Niklas Söderlund 2024-12-12 8:39 ` Geert Uytterhoeven 2024-12-12 8:52 ` Geert Uytterhoeven 2024-10-23 15:46 ` [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board Niklas Söderlund 1 sibling, 2 replies; 6+ messages in thread From: Niklas Söderlund @ 2024-10-23 15:46 UTC (permalink / raw) To: Geert Uytterhoeven, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc, devicetree Cc: Niklas Söderlund When describing the PHYs on the Falcon Ethernet breakout board mdio nodes will be needed to describe the connections, and each mdio node will need to contain these two properties instead. This will make the address-cells and size-cells described in the base SoC include file redundant and they will produce warnings, remove them. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 7156b1a542e8..fe6d97859e4a 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -765,8 +765,6 @@ avb1: ethernet@e6810000 { rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; iommus = <&ipmmu_ds1 1>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -814,8 +812,6 @@ avb2: ethernet@e6820000 { rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; iommus = <&ipmmu_ds1 2>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -863,8 +859,6 @@ avb3: ethernet@e6830000 { rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; iommus = <&ipmmu_ds1 3>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -912,8 +906,6 @@ avb4: ethernet@e6840000 { rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; iommus = <&ipmmu_ds1 4>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -961,8 +953,6 @@ avb5: ethernet@e6850000 { rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; iommus = <&ipmmu_ds1 11>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; -- 2.46.2 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] 2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund @ 2024-12-12 8:39 ` Geert Uytterhoeven 2024-12-12 8:52 ` Geert Uytterhoeven 1 sibling, 0 replies; 6+ messages in thread From: Geert Uytterhoeven @ 2024-12-12 8:39 UTC (permalink / raw) To: Niklas Söderlund Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc, devicetree On Wed, Oct 23, 2024 at 5:47 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > When describing the PHYs on the Falcon Ethernet breakout board mdio > nodes will be needed to describe the connections, and each mdio node > will need to contain these two properties instead. This will make the > address-cells and size-cells described in the base SoC include file > redundant and they will produce warnings, remove them. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.14. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] 2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund 2024-12-12 8:39 ` Geert Uytterhoeven @ 2024-12-12 8:52 ` Geert Uytterhoeven 1 sibling, 0 replies; 6+ messages in thread From: Geert Uytterhoeven @ 2024-12-12 8:52 UTC (permalink / raw) To: Niklas Söderlund Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc, devicetree On Wed, Oct 23, 2024 at 5:47 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > When describing the PHYs on the Falcon Ethernet breakout board mdio > nodes will be needed to describe the connections, and each mdio node > will need to contain these two properties instead. This will make the > address-cells and size-cells described in the base SoC include file > redundant and they will produce warnings, remove them. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.14. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board 2024-10-23 15:46 [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board Niklas Söderlund 2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund @ 2024-10-23 15:46 ` Niklas Söderlund 2024-12-13 10:14 ` Geert Uytterhoeven 1 sibling, 1 reply; 6+ messages in thread From: Niklas Söderlund @ 2024-10-23 15:46 UTC (permalink / raw) To: Geert Uytterhoeven, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc, devicetree Cc: Niklas Söderlund Describe and connect the five Marvell 88Q2110 PHYs present on the Falcon Ethernet breakout board. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- * Changes since v1 - Remove the specific "ethernet-phy-id002b.0980" compatible value and depend on the MDIO bus properly probing the PHY. --- .../dts/renesas/r8a779a0-falcon-ethernet.dtsi | 242 ++++++++++++++++++ 1 file changed, 242 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi index e11bf9ace776..2a8537e13873 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi @@ -5,6 +5,121 @@ * Copyright (C) 2021 Glider bv */ +/ { + aliases { + ethernet1 = &avb1; + ethernet2 = &avb2; + ethernet3 = &avb3; + ethernet4 = &avb4; + ethernet5 = &avb5; + }; +}; + +&avb1 { + pinctrl-0 = <&avb1_pins>; + pinctrl-names = "default"; + phy-handle = <&avb1_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio5 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb1_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio5 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb2 { + pinctrl-0 = <&avb2_pins>; + pinctrl-names = "default"; + phy-handle = <&avb2_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb2_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb3 { + pinctrl-0 = <&avb3_pins>; + pinctrl-names = "default"; + phy-handle = <&avb3_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb3_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio7 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb4 { + pinctrl-0 = <&avb4_pins>; + pinctrl-names = "default"; + phy-handle = <&avb4_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio8 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb4_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio8 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb5 { + pinctrl-0 = <&avb5_pins>; + pinctrl-names = "default"; + phy-handle = <&avb5_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio9 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb5_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio9 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + &i2c0 { eeprom@53 { compatible = "rohm,br24g01", "atmel,24c01"; @@ -13,3 +128,130 @@ eeprom@53 { pagesize = <8>; }; }; + +&pfc { + avb1_pins: avb1 { + mux { + groups = "avb1_link", "avb1_mdio", "avb1_rgmii", + "avb1_txcrefclk"; + function = "avb1"; + }; + + link { + groups = "avb1_link"; + bias-disable; + }; + + mdio { + groups = "avb1_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb1_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb2_pins: avb2 { + mux { + groups = "avb2_link", "avb2_mdio", "avb2_rgmii", + "avb2_txcrefclk"; + function = "avb2"; + }; + + link { + groups = "avb2_link"; + bias-disable; + }; + + mdio { + groups = "avb2_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb2_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb3_pins: avb3 { + mux { + groups = "avb3_link", "avb3_mdio", "avb3_rgmii", + "avb3_txcrefclk"; + function = "avb3"; + }; + + link { + groups = "avb3_link"; + bias-disable; + }; + + mdio { + groups = "avb3_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb3_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb4_pins: avb4 { + mux { + groups = "avb4_link", "avb4_mdio", "avb4_rgmii", + "avb4_txcrefclk"; + function = "avb4"; + }; + + link { + groups = "avb4_link"; + bias-disable; + }; + + mdio { + groups = "avb4_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb4_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb5_pins: avb5 { + mux { + groups = "avb5_link", "avb5_mdio", "avb5_rgmii", + "avb5_txcrefclk"; + function = "avb5"; + }; + + link { + groups = "avb5_link"; + bias-disable; + }; + + mdio { + groups = "avb5_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb5_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; +}; -- 2.46.2 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board 2024-10-23 15:46 ` [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board Niklas Söderlund @ 2024-12-13 10:14 ` Geert Uytterhoeven 0 siblings, 0 replies; 6+ messages in thread From: Geert Uytterhoeven @ 2024-12-13 10:14 UTC (permalink / raw) To: Niklas Söderlund Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc, devicetree On Wed, Oct 23, 2024 at 5:47 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > Describe and connect the five Marvell 88Q2110 PHYs present on the Falcon > Ethernet breakout board. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > * Changes since v1 > - Remove the specific "ethernet-phy-id002b.0980" compatible value and > depend on the MDIO bus properly probing the PHY. (this time on the correct patch, instead of a duplicate tag on the first one) Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.14. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-12-13 10:14 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-10-23 15:46 [PATCH v2 0/2] arm64: dts: renesas: falcon: Wire-up Ethernet breakout board Niklas Söderlund 2024-10-23 15:46 ` [PATCH v2 1/2] arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] Niklas Söderlund 2024-12-12 8:39 ` Geert Uytterhoeven 2024-12-12 8:52 ` Geert Uytterhoeven 2024-10-23 15:46 ` [PATCH v2 2/2] arm64: dts: renesas: falcon: ethernet: Describe PHYs connected on the breakout board Niklas Söderlund 2024-12-13 10:14 ` Geert Uytterhoeven
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