[PATCH 0/2] riscv: dts: sophgo: cv18xx: add emmc and sdio support

[PATCH 0/2] riscv: dts: sophgo: cv18xx: add emmc and sdio support

[Inochi Amaoto]

Since the sdhci driver is already supported, it is possible to
add emmc and sdio device for cv18xx SoC.

Inochi Amaoto (2):
  riscv: dts: sophgo: Add sdio configuration for Huashan Pi
  riscv: dts: sophgo: Add emmc support for Huashan Pi

 .../boot/dts/sophgo/cv1812h-huashan-pi.dts    | 23 +++++++++++++++++++
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi       |  1 +
 arch/riscv/boot/dts/sophgo/cv181x.dtsi        | 21 +++++++++++++++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi        | 10 ++++++++
 arch/riscv/boot/dts/sophgo/sg2002.dtsi        |  1 +
 5 files changed, 56 insertions(+)
 create mode 100644 arch/riscv/boot/dts/sophgo/cv181x.dtsi

--
2.47.0

[PATCH 1/2] riscv: dts: sophgo: Add sdio configuration for Huashan Pi

[Inochi Amaoto]

Add configuration for sdio for Huashan Pi to support sdio wifi.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 11 +++++++++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi            | 10 ++++++++++
 2 files changed, 21 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
index 7b5f57853690..4ea27cd357dc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
@@ -52,6 +52,17 @@ &sdhci0 {
 	disable-wp;
 };
 
+&sdhci1 {
+	status = "okay";
+	bus-width = <4>;
+	cap-sdio-irq;
+	max-frequency = <50000000>;
+	no-mmc;
+	no-sd;
+	disable-wp;
+	non-removable;
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index bef89979df78..c18822ec849f 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -319,6 +319,16 @@ sdhci0: mmc@4310000 {
 			status = "disabled";
 		};
 
+		sdhci1: mmc@4320000 {
+			compatible = "sophgo,cv1800b-dwcmshc";
+			reg = <0x4320000 0x1000>;
+			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk CLK_AXI4_SD1>,
+				 <&clk CLK_SD1>;
+			clock-names = "core", "bus";
+			status = "disabled";
+		};
+
 		dmac: dma-controller@4330000 {
 			compatible = "snps,axi-dma-1.01a";
 			reg = <0x04330000 0x1000>;
-- 
2.47.0

[PATCH 2/2] riscv: dts: sophgo: Add emmc support for Huashan Pi

[Inochi Amaoto]

From: Inochi Amaoto <inochiama@outlook.com>

Add emmc node configuration for Huashan Pi.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 .../boot/dts/sophgo/cv1812h-huashan-pi.dts    | 12 +++++++++++
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi       |  1 +
 arch/riscv/boot/dts/sophgo/cv181x.dtsi        | 21 +++++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2002.dtsi        |  1 +
 4 files changed, 35 insertions(+)
 create mode 100644 arch/riscv/boot/dts/sophgo/cv181x.dtsi

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
index 4ea27cd357dc..26b57e15adc1 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
@@ -43,6 +43,18 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&emmc {
+	status = "okay";
+	bus-width = <4>;
+	max-frequency = <200000000>;
+	mmc-ddr-1_8v;
+	mmc-ddr-3_3v;
+	mmc-hs200-1_8v;
+	no-sd;
+	no-sdio;
+	non-removable;
+};
+
 &sdhci0 {
 	status = "okay";
 	bus-width = <4>;
diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
index 815114db54ed..8a1b95c5116b 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
 #include "cv18xx.dtsi"
+#include "cv181x.dtsi"
 
 / {
 	compatible = "sophgo,cv1812h";
diff --git a/arch/riscv/boot/dts/sophgo/cv181x.dtsi b/arch/riscv/boot/dts/sophgo/cv181x.dtsi
new file mode 100644
index 000000000000..5fd14dd1b14f
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/cv181x.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
+ */
+
+#include <dt-bindings/clock/sophgo,cv1800.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	soc {
+		emmc: mmc@4300000 {
+			compatible = "sophgo,cv1800b-dwcmshc";
+			reg = <0x4300000 0x1000>;
+			interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk CLK_AXI4_EMMC>,
+				 <&clk CLK_EMMC>;
+			clock-names = "core", "bus";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
index 242fde84443f..8c35cdc34d2d 100644
--- a/arch/riscv/boot/dts/sophgo/sg2002.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/pinctrl-sg2002.h>
 #include "cv18xx.dtsi"
+#include "cv181x.dtsi"
 
 / {
 	compatible = "sophgo,sg2002";
-- 
2.47.0

Re: [PATCH 0/2] riscv: dts: sophgo: cv18xx: add emmc and sdio support

[Inochi Amaoto]

On Fri, 25 Oct 2024 19:28:58 +0800, Inochi Amaoto wrote:
> Since the sdhci driver is already supported, it is possible to
> add emmc and sdio device for cv18xx SoC.
> 
> Inochi Amaoto (2):
>   riscv: dts: sophgo: Add sdio configuration for Huashan Pi
>   riscv: dts: sophgo: Add emmc support for Huashan Pi
> 
> [...]

Applied to for-next, thanks!

[1/2] riscv: dts: sophgo: Add sdio configuration for Huashan Pi
      https://github.com/sophgo/linux/commit/06133f48a87144de40bbd3934fcaad449ecc1b93
[2/2] riscv: dts: sophgo: Add emmc support for Huashan Pi
      https://github.com/sophgo/linux/commit/b5cf65cc0fd00aa30ff218ec8170dd48e3cbe78d

Thanks,
Inochi