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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Bjorn Andersson <andersson@kernel.org>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Taniya Das <quic_tdas@quicinc.com>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Philipp Zabel <p.zabel@pengutronix.de>,
	 Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH v5 09/11] clk: qcom: tcsrcc-sm8550: add SAR2130P support
Date: Sun, 27 Oct 2024 03:24:48 +0200	[thread overview]
Message-ID: <20241027-sar2130p-clocks-v5-9-ecad2a1432ba@linaro.org> (raw)
In-Reply-To: <20241027-sar2130p-clocks-v5-0-ecad2a1432ba@linaro.org>

The SAR2130P platform has the same TCSR Clock Controller as the SM8550,
except for the lack of the UFS clocks. Extend the SM8550 TCSRCC driver
to support SAR2130P.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/tcsrcc-sm8550.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/tcsrcc-sm8550.c b/drivers/clk/qcom/tcsrcc-sm8550.c
index e5e8f2e82b949dae592ec3dda585138bf89cab37..41d73f92a000ab924560a0c2c9d8e85a9aaeb1b0 100644
--- a/drivers/clk/qcom/tcsrcc-sm8550.c
+++ b/drivers/clk/qcom/tcsrcc-sm8550.c
@@ -129,6 +129,13 @@ static struct clk_branch tcsr_usb3_clkref_en = {
 	},
 };
 
+static struct clk_regmap *tcsr_cc_sar2130p_clocks[] = {
+	[TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
+	[TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr,
+	[TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr,
+	[TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr,
+};
+
 static struct clk_regmap *tcsr_cc_sm8550_clocks[] = {
 	[TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
 	[TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr,
@@ -146,6 +153,12 @@ static const struct regmap_config tcsr_cc_sm8550_regmap_config = {
 	.fast_io = true,
 };
 
+static const struct qcom_cc_desc tcsr_cc_sar2130p_desc = {
+	.config = &tcsr_cc_sm8550_regmap_config,
+	.clks = tcsr_cc_sar2130p_clocks,
+	.num_clks = ARRAY_SIZE(tcsr_cc_sar2130p_clocks),
+};
+
 static const struct qcom_cc_desc tcsr_cc_sm8550_desc = {
 	.config = &tcsr_cc_sm8550_regmap_config,
 	.clks = tcsr_cc_sm8550_clocks,
@@ -153,7 +166,8 @@ static const struct qcom_cc_desc tcsr_cc_sm8550_desc = {
 };
 
 static const struct of_device_id tcsr_cc_sm8550_match_table[] = {
-	{ .compatible = "qcom,sm8550-tcsr" },
+	{ .compatible = "qcom,sar2130p-tcsr", .data = &tcsr_cc_sar2130p_desc },
+	{ .compatible = "qcom,sm8550-tcsr", .data = &tcsr_cc_sm8550_desc },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, tcsr_cc_sm8550_match_table);
@@ -162,7 +176,7 @@ static int tcsr_cc_sm8550_probe(struct platform_device *pdev)
 {
 	struct regmap *regmap;
 
-	regmap = qcom_cc_map(pdev, &tcsr_cc_sm8550_desc);
+	regmap = qcom_cc_map(pdev, of_device_get_match_data(&pdev->dev));
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 

-- 
2.39.5


  parent reply	other threads:[~2024-10-27  1:25 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-27  1:24 [PATCH v5 00/11] clk: qcom: add support for clock controllers on the SAR2130P platform Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 01/11] dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 02/11] dt-bindings: clock: qcom: document SAR2130P Global Clock Controller Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 03/11] dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 04/11] dt-bindings: clock: qcom,sm8550-dispcc: " Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 05/11] dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 06/11] clk: qcom: rcg2: add clk_rcg2_shared_floor_ops Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 07/11] clk: qcom: rpmh: add support for SAR2130P Dmitry Baryshkov
2024-10-28  4:21   ` Taniya Das
2024-10-27  1:24 ` [PATCH v5 08/11] clk: qcom: add support for GCC on SAR2130P Dmitry Baryshkov
2024-10-27  1:24 ` Dmitry Baryshkov [this message]
2024-10-27  1:24 ` [PATCH v5 10/11] clk: qcom: dispcc-sm8550: enable support for SAR2130P Dmitry Baryshkov
2024-10-27  1:24 ` [PATCH v5 11/11] clk: qcom: add SAR2130P GPU Clock Controller support Dmitry Baryshkov
2024-11-06  0:53 ` (subset) [PATCH v5 00/11] clk: qcom: add support for clock controllers on the SAR2130P platform Bjorn Andersson

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