From: Lothar Rubusch <l.rubusch@gmail.com>
To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de
Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de,
s.trumtrar@pengutronix.de, l.rubusch@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCHv3 21/22] dt-bindings: altera: removal of generic PE1 dts
Date: Sun, 27 Oct 2024 14:36:53 +0000 [thread overview]
Message-ID: <20241027143654.28474-22-l.rubusch@gmail.com> (raw)
In-Reply-To: <20241027143654.28474-1-l.rubusch@gmail.com>
Remove the binding for the generic Mercury+ AA1 on PE1 carrier board.
The removed Mercury+ AA1 on PE1 carrier board is just a particular
setup case, which is actually replaced by the set of generic Mercury+
AA1 combinations patch.
In other words a combination of a Mercury+ AA1 on a PE1 base board,
with boot mode SD card is already covered by the generic AA1
combinations. There is no further reason to keep this particular case
now in a redundantly. Thus the redundant DT setup is removed.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
Documentation/devicetree/bindings/arm/altera.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 51f10ff8e..1561f0164 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -31,7 +31,6 @@ properties:
- description: Mercury+ AA1 boards
items:
- enum:
- - enclustra,mercury-pe1
- enclustra,mercury-aa1-pe1
- enclustra,mercury-aa1-pe3
- enclustra,mercury-aa1-st1
--
2.25.1
next prev parent reply other threads:[~2024-10-27 14:37 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-27 14:36 [PATCHv3 00/22] Add Enclustra Arria10 and Cyclone5 SoMs Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 01/22] ARM: dts: socfpga: fix typo Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 02/22] ARM: dts: socfpga: align bus name with bindings Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 03/22] ARM: dts: socfpga: align dma name with binding Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 04/22] ARM: dts: socfpga: align fpga-region name Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 05/22] ARM: dts: socfpga: add label to clock manager Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 06/22] ARM: dts: socfpga: add missing cells properties Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 07/22] ARM: dts: socfpga: fix missing ranges Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 08/22] ARM: dts: socfpga: add clock-frequency property Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 09/22] ARM: dts: socfpga: add ranges property to sram Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 10/22] ARM: dts: socfpga: remove arria10 reset-names Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 11/22] dt-bindings: net: snps,dwmac: add support for Arria10 Lothar Rubusch
2024-10-27 20:23 ` Krzysztof Kozlowski
2024-10-27 14:36 ` [PATCHv3 12/22] ARM: dts: socfpga: add Enclustra boot-mode dtsi Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 13/22] ARM: dts: socfpga: add Enclustra base-board dtsi Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 14/22] ARM: dts: socfpga: add Enclustra Mercury SA1 Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 15/22] dt-bindings: altera: " Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 16/22] ARM: dts: socfpga: add Enclustra Mercury+ SA2 Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 17/22] dt-bindings: altera: add binding for " Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 18/22] ARM: dts: socfpga: add Mercury AA1 combinations Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 19/22] dt-bindings: altera: " Lothar Rubusch
2024-10-27 14:36 ` [PATCHv3 20/22] ARM: dts: socfpga: removal of generic PE1 dts Lothar Rubusch
2024-10-28 8:42 ` Steffen Trumtrar
2024-10-27 14:36 ` Lothar Rubusch [this message]
2024-10-27 20:21 ` [PATCHv3 21/22] dt-bindings: altera: " Krzysztof Kozlowski
2024-10-27 14:36 ` [PATCHv3 22/22] ARM: dts: socfpga: add Enclustra SoM dts files Lothar Rubusch
2024-10-29 12:44 ` [PATCHv3 00/22] Add Enclustra Arria10 and Cyclone5 SoMs Rob Herring (Arm)
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