From: Aleksandar Rikalo <arikalo@gmail.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
Gregory CLEMENT <gregory.clement@bootlin.com>,
Theo Lebrun <theo.lebrun@bootlin.com>,
Arnd Bergmann <arnd@arndb.de>,
devicetree@vger.kernel.org,
Djordje Todorovic <djordje.todorovic@htecgroup.com>,
Chao-ying Fu <cfu@wavecomp.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Greg Ungerer <gerg@kernel.org>, Hauke Mehrtens <hauke@hauke-m.de>,
Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
Marc Zyngier <maz@kernel.org>,
Paul Burton <paulburton@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Serge Semin <fancer.lancer@gmail.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Aleksandar Rikalo <arikalo@gmail.com>
Subject: [PATCH v8 06/13] clocksource: mips-gic-timer: Enable counter when CPUs start
Date: Mon, 28 Oct 2024 18:59:28 +0100 [thread overview]
Message-ID: <20241028175935.51250-7-arikalo@gmail.com> (raw)
In-Reply-To: <20241028175935.51250-1-arikalo@gmail.com>
From: Paul Burton <paulburton@kernel.org>
In multi-cluster MIPS I6500 systems there is a GIC in each cluster,
each with its own counter. When a cluster powers up the counter will
be stopped, with the COUNTSTOP bit set in the GIC_CONFIG register.
In single cluster systems, it has been fine to clear COUNTSTOP once
in gic_clocksource_of_init() to start the counter. In multi-cluster
systems, this will only have started the counter in the boot cluster,
and any CPUs in other clusters will find their counter stopped which
will break the GIC clock_event_device.
Resolve this by having CPUs clear the COUNTSTOP bit when they come
online, using the existing gic_starting_cpu() CPU hotplug callback. This
will allow CPUs in secondary clusters to ensure that the cluster's GIC
counter is running as expected.
Signed-off-by: Paul Burton <paulburton@kernel.org>
Signed-off-by: Chao-ying Fu <cfu@wavecomp.com>
Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Aleksandar Rikalo <arikalo@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
drivers/clocksource/mips-gic-timer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 7907b740497a..abb685a080a5 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -115,6 +115,9 @@ static void gic_update_frequency(void *data)
static int gic_starting_cpu(unsigned int cpu)
{
+ /* Ensure the GIC counter is running */
+ clear_gic_config(GIC_CONFIG_COUNTSTOP);
+
gic_clockevent_cpu_init(cpu, this_cpu_ptr(&gic_clockevent_device));
return 0;
}
@@ -288,9 +291,6 @@ static int __init gic_clocksource_of_init(struct device_node *node)
pr_warn("Unable to register clock notifier\n");
}
- /* And finally start the counter */
- clear_gic_config(GIC_CONFIG_COUNTSTOP);
-
/*
* It's safe to use the MIPS GIC timer as a sched clock source only if
* its ticks are stable, which is true on either the platforms with
--
2.25.1
next prev parent reply other threads:[~2024-10-28 17:59 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-28 17:59 [PATCH v8 00/13] MIPS: Support I6500 multi-cluster configuration Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 01/13] irqchip/mips-gic: Introduce for_each_online_cpu_gic() Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 02/13] irqchip/mips-gic: Support multi-cluster in for_each_online_cpu_gic() Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 03/13] irqchip/mips-gic: Setup defaults in each cluster Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 04/13] irqchip/mips-gic: Multi-cluster support Aleksandar Rikalo
2024-10-28 19:45 ` Thomas Gleixner
2024-10-28 17:59 ` [PATCH v8 05/13] clocksource: mips-gic-timer: Always use cluster 0 counter as clocksource Aleksandar Rikalo
2024-10-28 17:59 ` Aleksandar Rikalo [this message]
2024-10-28 17:59 ` [PATCH v8 07/13] MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 08/13] MIPS: CPS: Introduce struct cluster_boot_config Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 09/13] MIPS: CPS: Boot CPUs in secondary clusters Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 10/13] dt-bindings: mips: cpu: Add property for broken HCI information Aleksandar Rikalo
2024-10-29 7:03 ` Krzysztof Kozlowski
2024-10-29 12:21 ` Aleksandar Rikalo
2024-10-29 16:08 ` Gregory CLEMENT
2024-10-29 16:11 ` Jiaxun Yang
2024-10-30 11:35 ` Jiaxun Yang
2024-10-31 8:13 ` Gregory CLEMENT
2024-10-31 14:42 ` Thomas Bogendoerfer
2024-10-31 15:27 ` Jiaxun Yang
2024-10-28 17:59 ` [PATCH v8 11/13] MIPS: CPS: Support broken HCI for multicluster Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 12/13] MIPS: mobileye: dts: eyeq6h: Enable cluster support Aleksandar Rikalo
2024-10-28 17:59 ` [PATCH v8 13/13] irqchip: mips-gic: Handle case with cluster without CPU cores Aleksandar Rikalo
2024-10-30 11:39 ` [PATCH v8 00/13] MIPS: Support I6500 multi-cluster configuration Jiaxun Yang
2024-11-01 1:47 ` Maciej W. Rozycki
2025-01-22 15:06 ` Gregory CLEMENT
2025-01-23 10:19 ` Aleksandar Rikalo
2025-01-23 15:35 ` Gregory CLEMENT
2025-02-19 10:46 ` Aleksandar Rikalo
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