From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Frank Li" <Frank.li@nxp.com>,
"Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Robert Foss" <rfoss@kernel.org>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Guido Gúnther" <agx@sigxcpu.org>,
"Robert Chiras" <robert.chiras@nxp.com>,
"open list:DRM DRIVERS" <dri-devel@lists.freedesktop.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list" <linux-kernel@vger.kernel.org>,
imx@lists.linux.dev
Subject: Re: [PATCH 1/1] dt-bindings: display: nwl-dsi: Allow 'data-lanes' property for port@1
Date: Thu, 31 Oct 2024 23:14:21 +0200 [thread overview]
Message-ID: <20241031211421.GG2473@pendragon.ideasonboard.com> (raw)
In-Reply-To: <jfvvw7rnkxp4xbcmcikyxyfmisx3bmng6uqc7yqsvkzhc3hhgq@arfzqn6raxcg>
On Thu, Oct 31, 2024 at 10:55:30PM +0200, Dmitry Baryshkov wrote:
> On Thu, Oct 31, 2024 at 04:20:10PM -0400, Frank Li wrote:
> > On Thu, Oct 31, 2024 at 09:59:26PM +0200, Dmitry Baryshkov wrote:
> > > On Thu, Oct 31, 2024 at 03:47:14PM -0400, Frank Li wrote:
> > > > Change $ref of port@1 from 'port' to 'port-base' and add 'endpoint'
> > > > property referencing video-interfaces.yaml. Allow 'data-lanes' values
> > > > 1, 2, 3, and 4 for port@1.
> > > >
> > > > Fix below CHECK_DTB warnings:
> > > > arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtb:
> > > > dsi@30a00000: ports:port@1:endpoint: Unevaluated properties are not allowed ('data-lanes' was unexpected)
> > > >
> > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > ---
> > > > .../bindings/display/bridge/nwl-dsi.yaml | 18 +++++++++++++++++-
> > > > 1 file changed, 17 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> > > > index 350fb8f400f02..5952e6448ed47 100644
> > > > --- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> > > > +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> > > > @@ -111,11 +111,27 @@ properties:
> > > > unevaluatedProperties: false
> > > >
> > > > port@1:
> > > > - $ref: /schemas/graph.yaml#/properties/port
> > > > + $ref: /schemas/graph.yaml#/$defs/port-base
> > > > + unevaluatedProperties: false
> > > > description:
> > > > DSI output port node to the panel or the next bridge
> > > > in the chain
> > > >
> > > > + properties:
> > > > + endpoint:
> > > > + $ref: /schemas/media/video-interfaces.yaml#
> > > > + unevaluatedProperties: false
> > > > +
> > > > + properties:
> > > > + data-lanes:
> > > > + description: array of physical DSI data lane indexes.
> > > > + minItems: 1
> > > > + items:
> > > > + - const: 1
> > > > + - const: 2
> > > > + - const: 3
> > > > + - const: 4
> > >
> > > Why are they indexed starting from 1?
> >
> > Not sure, git grep -r data-lanes Documentation/devicetree/bindings/
> > Most start from 1. Not sure latest DT team's intention.
>
> They usually start from 1, because just before the property comes
> 'clock-lanes = <0>'. Otherwise in most of the cases the lanes are
> indexed from 0.
I'm not sure what the rule is for DSI, but for CSI we number data lanes
starting at 1 regardless of whether or not the clock lane is
configurable. Consistency help for driver implementations.
> > > > +
> > > > required:
> > > > - port@0
> > > > - port@1
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2024-10-31 21:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-31 19:47 [PATCH 1/1] dt-bindings: display: nwl-dsi: Allow 'data-lanes' property for port@1 Frank Li
2024-10-31 19:59 ` Dmitry Baryshkov
2024-10-31 20:20 ` Frank Li
2024-10-31 20:55 ` Dmitry Baryshkov
2024-10-31 21:14 ` Laurent Pinchart [this message]
2024-11-04 15:40 ` Rob Herring
2024-12-05 21:07 ` Frank Li
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