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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=npXjDaGG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="npXjDaGG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2F5DC4CED1; Mon, 4 Nov 2024 12:07:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730722075; bh=vsi/33NO427ZAndINphaIY00QOvDA9ey0no25IMNd9Q=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=npXjDaGGZ80pU4vZ5j/r8KHDcCtmUDdEQC/2TlGdDWGbkKhfeTBrNjRXVd7bo7N3M Zf0PhHihION3wOtFDRHym/jLTMhd5BgFjLC4dZKe6ZCBsX0EeKJptLeGOyPMvZ+RCR TP3nYhIziZ8vdu67APyeHjs8ItLBeVBhP94zT/nGgHUxxed+aSSJPGroRnOH5EIZY9 QdocH/QeuOfA7dVrUer1mBV7sQj4EE5HN2j+T3C00hfXWDr1d4xGqUc/9PjK/JWDQo HMekwVt4NgTs/4OzDZYcc+ITCiSr5ojkNf6AH8bhqb14UkMNzb/M5FIIAoKwRX0RhE T6rnPFfharIUQ== Date: Mon, 4 Nov 2024 12:07:49 +0000 From: Conor Dooley To: =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= Cc: Inochi Amaoto , Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Krzysztof Kozlowski , Evan Green , Charlie Jenkins , Andrew Jones , Andy Chiu , Xiao Wang , Samuel Holland , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yixun Lan , Longbin Li Subject: Re: [PATCH v2 2/3] riscv: add ISA extension parsing for bfloat16 ISA extension Message-ID: <20241104-number-recall-85e044c9b72d@spud> References: <20241103074959.1135240-1-inochiama@gmail.com> <20241103074959.1135240-3-inochiama@gmail.com> <2e775421-0c3e-48ef-8a8c-6734f7fcf298@rivosinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="vFZn2GDfm8gUnKj9" Content-Disposition: inline In-Reply-To: <2e775421-0c3e-48ef-8a8c-6734f7fcf298@rivosinc.com> --vFZn2GDfm8gUnKj9 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Nov 04, 2024 at 10:15:56AM +0100, Cl=E9ment L=E9ger wrote: >=20 >=20 > On 03/11/2024 08:49, Inochi Amaoto wrote: > > Add parsing for Zfbmin, Zvfbfmin, Zvfbfwma ISA extension which > > were ratified in 4dc23d62 ("Added Chapter title to BF16") of > > the riscv-isa-manual. > >=20 > > Signed-off-by: Inochi Amaoto > > --- > > arch/riscv/include/asm/hwcap.h | 3 +++ > > arch/riscv/kernel/cpufeature.c | 3 +++ > > 2 files changed, 6 insertions(+) > >=20 > > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hw= cap.h > > index 46d9de54179e..97657fb63af6 100644 > > --- a/arch/riscv/include/asm/hwcap.h > > +++ b/arch/riscv/include/asm/hwcap.h > > @@ -93,6 +93,9 @@ > > #define RISCV_ISA_EXT_ZCMOP 84 > > #define RISCV_ISA_EXT_ZAWRS 85 > > #define RISCV_ISA_EXT_SVVPTC 86 > > +#define RISCV_ISA_EXT_ZFBFMIN 87 > > +#define RISCV_ISA_EXT_ZVFBFMIN 88 > > +#define RISCV_ISA_EXT_ZVFBFWMA 89 > > =20 > > #define RISCV_ISA_EXT_XLINUXENVCFG 127 > > =20 > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeat= ure.c > > index 3a8eeaa9310c..1b286f5bc591 100644 > > --- a/arch/riscv/kernel/cpufeature.c > > +++ b/arch/riscv/kernel/cpufeature.c > > @@ -325,6 +325,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D= { > > __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS), > > __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS), > > __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), > > + __RISCV_ISA_EXT_DATA(zfbfmin, RISCV_ISA_EXT_ZFBFMIN), > > __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH), > > __RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN), > > __RISCV_ISA_EXT_DATA(zca, RISCV_ISA_EXT_ZCA), > > @@ -357,6 +358,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D= { > > __RISCV_ISA_EXT_SUPERSET(zve64d, RISCV_ISA_EXT_ZVE64D, riscv_zve64d_e= xts), > > __RISCV_ISA_EXT_SUPERSET(zve64f, RISCV_ISA_EXT_ZVE64F, riscv_zve64f_e= xts), > > __RISCV_ISA_EXT_SUPERSET(zve64x, RISCV_ISA_EXT_ZVE64X, riscv_zve64x_e= xts), > > + __RISCV_ISA_EXT_DATA(zvfbfmin, RISCV_ISA_EXT_ZVFBFMIN), > > + __RISCV_ISA_EXT_DATA(zvfbfwma, RISCV_ISA_EXT_ZVFBFWMA), >=20 > @Conor, >=20 > Should we wait for your V/F validation support to be merged before this > one ? Uh, I don't really see a reason to hold this up on my account. I can easily rebase on top when I get the motivation to do more work on that series. --vFZn2GDfm8gUnKj9 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZyi5FQAKCRB4tDGHoIJi 0nLvAP9dZnNwlwpdYASHbLLL4ZVIYfSR0JyUNfivFOkfosM0aQEAhemaFYVfqvPL YewSufLQLOeK2QCh4rruU59GZSdYwAQ= =uyWh -----END PGP SIGNATURE----- --vFZn2GDfm8gUnKj9--