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AJvYcCWir4y0Lli+RrKErj4gxnypbtRfQTMuqfL0avL+x10Y9ZoRVbcSox6v2P1nG5K8coDnn2zojfhoB5Ok@vger.kernel.org X-Gm-Message-State: AOJu0YyFw3f4W9g2TcaLviPtXLuDkx4ORUw2PDEK6Ben3t7iLehpoHv5 L11xb7AfdjgrIm94YOQwJXB59qrHJTgORWVtnCQDknyu9pfJ92QCm5F1EgvFtw== X-Google-Smtp-Source: AGHT+IGabkTqfzJ7F61xnkcjI95zLPKfJGfkK+pvHWTH/TvMDmJ1L9QNKaKVIJTm7qh/u3tDNf6Mrw== X-Received: by 2002:a17:902:f544:b0:20c:f27f:fbf with SMTP id d9443c01a7336-211d0d7687fmr23670135ad.25.1731652877101; Thu, 14 Nov 2024 22:41:17 -0800 (PST) Received: from thinkpad ([117.193.208.47]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-211d0f56e10sm6129835ad.242.2024.11.14.22.41.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2024 22:41:16 -0800 (PST) Date: Fri, 15 Nov 2024 12:11:06 +0530 From: Manivannan Sadhasivam To: Richard Zhu Cc: l.stach@pengutronix.de, bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Message-ID: <20241115064106.iwrorgimt6yenalx@thinkpad> References: <20241101070610.1267391-1-hongxing.zhu@nxp.com> <20241101070610.1267391-4-hongxing.zhu@nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241101070610.1267391-4-hongxing.zhu@nxp.com> On Fri, Nov 01, 2024 at 03:06:03PM +0800, Richard Zhu wrote: > Since dbi2 and atu regs are added for i.MX8M PCIes. Fetch the dbi2 and > iATU base addresses from DT directly, and remove the useless codes. > It'd be useful to mention where the base addresses were extraced. Like by the DWC common driver. > Upsteam dts's have not enabled EP function. So no function broken for > old upsteam's dtb. > > Signed-off-by: Richard Zhu Reviewed-by: Manivannan Sadhasivam - Mani > --- > drivers/pci/controller/dwc/pci-imx6.c | 20 -------------------- > 1 file changed, 20 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index bc8567677a67..462decd1d589 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -1115,7 +1115,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, > struct platform_device *pdev) > { > int ret; > - unsigned int pcie_dbi2_offset; > struct dw_pcie_ep *ep; > struct dw_pcie *pci = imx_pcie->pci; > struct dw_pcie_rp *pp = &pci->pp; > @@ -1125,25 +1124,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, > ep = &pci->ep; > ep->ops = &pcie_ep_ops; > > - switch (imx_pcie->drvdata->variant) { > - case IMX8MQ_EP: > - case IMX8MM_EP: > - case IMX8MP_EP: > - pcie_dbi2_offset = SZ_1M; > - break; > - default: > - pcie_dbi2_offset = SZ_4K; > - break; > - } > - > - pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset; > - > - /* > - * FIXME: Ideally, dbi2 base address should come from DT. But since only IMX95 is defining > - * "dbi2" in DT, "dbi_base2" is set to NULL here for that platform alone so that the DWC > - * core code can fetch that from DT. But once all platform DTs were fixed, this and the > - * above "dbi_base2" setting should be removed. > - */ > if (device_property_match_string(dev, "reg-names", "dbi2") >= 0) > pci->dbi_base2 = NULL; > > -- > 2.37.1 > -- மணிவண்ணன் சதாசிவம்