From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B036D13B2B4; Mon, 18 Nov 2024 05:34:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731908056; cv=none; b=cx1H2G3lrszfbkZDLLM4x97i9adKiVhbq2ABl58or5X3LjVsSO6hfHi65NDeEgeMdCAz3OXZ5SxxIXnyfGYUfzFxsPH1muBOuECc8rJjQYb26oEHXDQPh3jG9UrBxqVI0jZrdyGRorcn0GohGXLwo5hJUFmaweM7f7cg/xI94T8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731908056; c=relaxed/simple; bh=1aDbknj/vOp3nimyJr0mCrnh1jF9Z8rnmubNf5Bccdw=; h=From:Subject:Date:Message-ID:MIME-Version:Content-Type:To:CC; b=GNg1vfDh+dzw60uZWg+kL5s6FqWXs1h6P0BHyPeviBsvQsPQ4PFJbQ4SlLqGBFr4y8mhvLQtbkNFMWpjNKGqQRClU2QXPGgOEmzMzlN82WZXuLAOkMVE7PRtXSmYRsyVb75dVjAb+wwSgAW/BEFCMYYOgPY3B3lpbfdIY+eoO7E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=vFUrg9h7; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vFUrg9h7" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 4AI5Y8rJ031967; Sun, 17 Nov 2024 23:34:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1731908048; bh=/Gv4FihppQNNBVUuce2/24rNSfyawZefVO6AC+eDXS4=; h=From:Subject:Date:To:CC; b=vFUrg9h7fd2I8T6pTXkZlFzOt0/LL36KWY9LmfQ3mDgEjN905vF2OS5Q+CHq+mF/a KXUAqGTQ8EIKBdrVfOpYcAWgduHzbPFZAsI0uxZGb+h8r489bKmTctoqxbl3pOTbpf jJqyTka07okCZJzxL66UWX+7XVrahNmbvaqLT91U= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4AI5Y8HI013775; Sun, 17 Nov 2024 23:34:08 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sun, 17 Nov 2024 23:34:08 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sun, 17 Nov 2024 23:34:08 -0600 Received: from localhost (bb.dhcp.ti.com [128.247.81.12]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4AI5Y7jS041445; Sun, 17 Nov 2024 23:34:08 -0600 From: Bryan Brattlof Subject: [PATCH 0/2] arm64: dts: ti: introduce basic support for the AM62L Date: Sun, 17 Nov 2024 23:34:06 -0600 Message-ID: <20241117-am62lx-v1-0-4e71e42d781d@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAM7ROmcC/z3MQQrCMBCF4auUWRuZGTRSV95DukjTqR2wrSQlV Erubqzg8n88vg2iBJUI12qDIEmjzlMJOlTgBzc9xGhXGhj5RMhn40bLz9Ug1763zgsiQTm/gvS 67tC9KT1oXObw3t1E3/VHEP6JRAZN29Xs0LaCF3tb9OjnEZqc8wdMsL1KmQAAAA== To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Bryan Brattlof X-Mailer: b4 0.13.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Hello Everyone, This small series adds the initial support (currently just a UART for TI's AM62L SoC family. The AM62L is a lite, low power and performance optimized family of application processors that are built for Linux application development. AM62L is well suited for a wide range of general-purpose applications with scalable ARM Cortex-A53 core performance and embedded features such as: Multimedia DSI/DPI support, integrated ADC on chip, advanced lower power management modes, and extensive security options for IP protection with the built-in security features. Additionally, the AM62Lx devices includes an extensive set of peripherals that make it a well-suited for a broad range of industrial applications while offering intelligent features and optimized power architecture as well. In addition, the extensive set of peripherals included in AM62Lx enables system-level connectivity, such as: USB, MMC/SD, OSPI, CAN-FD and an ADC. AM62L is a general purpose processor, however some of the applications well suited for it include: Human Machine Interfaces (HMI), Medical patient monitoring , Building automation, Smart secure gateways, Smart Thermostats, EV charging stations, Smart Metering, Solar energy and more. Some highlights of AM62L SoC are: - Single to Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem up to 1.25GHz Integrated Giga-bit Ethernet switch supporting up to a total of two external - 16-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. - Display support: 1x display support over MIPI DSI (4 lanes DPHY) or DPI (24-bit RGB LVCMOS) - Multiple low power modes support, ex: Deep sleep and Standby - Support for secure boot, Trusted Execution Environment (TEE) & Cryptographic Acceleration For more information check out our Technical Reference Manual (TRM) which is loacted here: https://www.ti.com/lit/ug/sprujb4/sprujb4.pdf Happy Hacking ~Bryan Signed-off-by: Bryan Brattlof --- Vignesh Raghavendra (2): arm64: dts: ti: k3-am62l: add initial infrastructure arm64: dts: ti: k3-am62l: add initial reference board file Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++ arch/arm64/boot/dts/ti/Makefile | 3 + arch/arm64/boot/dts/ti/k3-am62l-main.dtsi | 52 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi | 33 +++++++++ arch/arm64/boot/dts/ti/k3-am62l.dtsi | 89 ++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62l3-evm.dts | 54 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62l3.dtsi | 67 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-pinctrl.h | 2 + 8 files changed, 306 insertions(+) --- base-commit: 767b6a0d0900c951e8b42306bd636268481a97ae change-id: 20241025-am62lx-029cf6ace001 Best regards, -- Bryan Brattlof