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From: Jonathan Cameron <jic23@kernel.org>
To: David Lechner <dlechner@baylibre.com>
Cc: "Mark Brown" <broonie@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Michael Hennerich" <Michael.Hennerich@analog.com>,
	"Lars-Peter Clausen" <lars@metafoo.de>,
	"David Jander" <david@protonic.nl>,
	"Martin Sperl" <kernel@martin.sperl.org>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,
	linux-pwm@vger.kernel.org
Subject: Re: [PATCH v5 16/16] doc: iio: ad4695: add SPI offload support
Date: Sun, 24 Nov 2024 17:38:19 +0000	[thread overview]
Message-ID: <20241124173819.224b5940@jic23-huawei> (raw)
In-Reply-To: <20241115-dlech-mainline-spi-engine-offload-2-v5-16-bea815bd5ea5@baylibre.com>

On Fri, 15 Nov 2024 14:18:55 -0600
David Lechner <dlechner@baylibre.com> wrote:

> Document SPI offload support for the ad4695 driver.
> 
> Signed-off-by: David Lechner <dlechner@baylibre.com>
> ---
> 
> v5 changes: new patch in v5
> ---
>  Documentation/iio/ad4695.rst | 68 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 68 insertions(+)
> 
> diff --git a/Documentation/iio/ad4695.rst b/Documentation/iio/ad4695.rst
> index 9ec8bf466c15..8009a0c272bc 100644
> --- a/Documentation/iio/ad4695.rst
> +++ b/Documentation/iio/ad4695.rst
> @@ -47,6 +47,36 @@ In this mode, CNV and CS are tied together and there is a single SDO line.
>  To use this mode, in the device tree, omit the ``cnv-gpios`` and
>  ``spi-rx-bus-width`` properties.
>  
> +SPI offload wiring
> +^^^^^^^^^^^^^^^^^^
> +
> +When used with a SPI offload, the supported wiring configuration is:
> +
> +.. code-block::
> +
> +    +-------------+         +-------------+
> +    |    GP0/BUSY |-------->| TRIGGER     |
> +    |          CS |<--------| CS          |
> +    |             |         |             |
> +    |     ADC     |         |     SPI     |
> +    |             |         |             |
> +    |         SDI |<--------| SDO         |
> +    |         SDO |-------->| SDI         |
> +    |        SCLK |<--------| SCLK        |
> +    |             |         |             |
> +    |             |         +-------------+
> +    |         CNV |<-----+--| PWM         |
> +    |             |      +--| GPIO        |
> +    +-------------+         +-------------+
> +
> +In this case, both the ``cnv-gpios`` and  ``pwms`` properties are required.
> +The ``#trigger-source-cells = <2>`` property is also required to connect back
> +to the SPI offload. The SPI offload will have ``trigger-sources`` property
> +with cells to indicate the busy signal and which GPx pin is used, e.g
> +``<&ad4695 AD4695_TRIGGER_EVENT_BUSY AD4695_TRIGGER_PIN_GP0>``.
> +
> +.. seealso:: `SPI offload support`_
> +
>  Channel configuration
>  ---------------------
>  
> @@ -158,6 +188,27 @@ Unimplemented features
>  - GPIO support
>  - CRC support
>  
> +SPI offload support
> +===================
> +
> +To be able to achieve the maximum sample rate, the driver can be used with the
> +`AXI SPI Engine`_ to provide SPI offload support.
> +
> +.. _AXI SPI Engine: http://analogdevicesinc.github.io/hdl/projects/ad469x_fmc/index.html
> +
> +.. seealso:: `SPI offload wiring`_
> +
> +When SPI offload is being used, some attributes will be different.
> +
> +* ``trigger`` directory is removed.
> +* ``in_voltage0_sampling_frequency`` attributes are added for setting the sample
> +  rate.
> +* ``in_voltage0_sampling_frequency_available`` attributes are added for querying
> +  the max sample rate.
> +* ``timestamp`` channel is removed.
> +* Buffer data format may be different compared to when offload is not used,
> +  e.g. the ``in_voltage0_type`` attribute.
> +
>  Device buffers
>  ==============
>  
> @@ -165,3 +216,20 @@ This driver supports hardware triggered buffers. This uses the "advanced
>  sequencer" feature of the chip to trigger a burst of conversions.
>  
>  Also see :doc:`iio_devbuf` for more general information.
> +
> +Effective sample rate for buffered reads
> +----------------------------------------
> +
> +When SPI offload is not used, the sample rate is determined by the trigger that
> +is manually configured in userspace. All enabled channels will be read in a
> +burst when the trigger is received.
> +
> +When SPI offload is used, the sample rate is configured per channel. All
> +all channels will have the same rate, so only one ``sampling_frequency``
Double all.
> +attribute needs to be set. Since this rate determines the delay between each
> +individual conversion, the effective sample rate for each sample is actually
> +the sum of the periods of each enabled channel in a buffered read. In other
> +words, it is the value of the ``sampling_frequency`` attribute divided by the
> +number of enabled channels. So if 4 channels are enabled, with the
> +``sampling_frequency`` attributes set to 1 MHz, the effective sample rate is
> +250 kHz.
If you are exposing that as a single sampling_frequency I think we should be
adjusting the frequency so it represents the same thing in both modes.

So divide by the number of channels (conversely run faster if more channels
enabled).

Jonathan
> 


  reply	other threads:[~2024-11-24 17:38 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-15 20:18 [PATCH v5 00/16] spi: axi-spi-engine: add offload support David Lechner
2024-11-15 20:18 ` [PATCH v5 01/16] spi: add basic support for SPI offloading David Lechner
2024-11-24 16:32   ` Jonathan Cameron
2024-11-24 18:01     ` David Lechner
2024-11-25 21:29       ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 02/16] spi: offload: add support for hardware triggers David Lechner
2024-11-24 16:40   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 03/16] spi: dt-bindings: add trigger-source.yaml David Lechner
2024-11-19 16:44   ` Rob Herring
2024-11-15 20:18 ` [PATCH v5 04/16] spi: dt-bindings: add PWM SPI offload trigger David Lechner
2024-11-19 16:37   ` Rob Herring
2024-11-15 20:18 ` [PATCH v5 05/16] spi: offload-trigger: add PWM trigger driver David Lechner
2024-11-24 16:44   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 06/16] spi: add offload TX/RX streaming APIs David Lechner
2024-11-24 16:50   ` Jonathan Cameron
2024-11-24 17:54     ` David Lechner
2024-11-25 21:30       ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 07/16] spi: dt-bindings: axi-spi-engine: add SPI offload properties David Lechner
2024-11-19 16:56   ` Rob Herring
2024-11-19 17:02     ` David Lechner
2024-11-15 20:18 ` [PATCH v5 08/16] spi: axi-spi-engine: implement offload support David Lechner
2024-11-24 17:02   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 09/16] iio: buffer-dmaengine: document iio_dmaengine_buffer_setup_ext David Lechner
2024-11-24 17:04   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 10/16] iio: buffer-dmaengine: add devm_iio_dmaengine_buffer_setup_ext2() David Lechner
2024-11-24 17:16   ` Jonathan Cameron
2024-12-06 21:36     ` David Lechner
2024-12-06 22:04       ` David Lechner
2024-12-08 18:32         ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 11/16] iio: adc: ad7944: don't use storagebits for sizing David Lechner
2024-11-15 20:18 ` [PATCH v5 12/16] iio: adc: ad7944: add support for SPI offload David Lechner
2024-11-24 17:24   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 13/16] doc: iio: ad7944: describe offload support David Lechner
2024-11-24 17:25   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 14/16] dt-bindings: iio: adc: adi,ad4695: add SPI offload properties David Lechner
2024-11-19 16:58   ` Rob Herring
2024-11-15 20:18 ` [PATCH v5 15/16] iio: adc: ad4695: Add support for SPI offload David Lechner
2024-11-24 17:35   ` Jonathan Cameron
2024-11-15 20:18 ` [PATCH v5 16/16] doc: iio: ad4695: add SPI offload support David Lechner
2024-11-24 17:38   ` Jonathan Cameron [this message]
2024-11-24 18:09     ` David Lechner

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