[PATCH 00/12] Add support for Renesas RZ/G3E SoC and SMARC-EVK platform

Biju Das
2024-11-22T12:46:20Z

Hi all,

This patch series adds initial support for the Renesas RZ/G3E SoC and
RZ/G3E SMARC EVK platform. The RZ/G3E device is a general-purpose
microprocessor with a quad-core CA-55, single core CM-33, Ethos-U55 NPU
, Mali-G52 3-D Graphics and other peripherals.

Support for below list of blocks added on SoC DTSI (r9a09g047.dtsi):
- EXT CLKs
- 4X CA55
- SCIF
- CPG
- GIC
- ARMv8 Timer

This adds also support for the RZ/G3E SMARC EVK board
(r9a09g047e57-smarc.dts) and enable the following peripheral:
- SCIF

Note:
This patch series gives a boot console with serial driver support.
Later there is a plan to add support for SoC Identification using
SYSC driver and pin controller support were also added.

Test logs:
/ # uname -r
6.12.0-next-20241122-12513-g189628626a52

/ # cat /proc/cpuinfo
processor : 0
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0

processor : 1
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0

processor : 2
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0

processor : 3
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0

/ #

/ # cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
11: 436 539 467 446 GICv3 27 Level arch_timer
14: 0 0 0 0 GICv3 561 Level 11c01400.serial:rx err
15: 0 0 0 0 GICv3 564 Level 11c01400.serial:rx full
16: 391 0 0 0 GICv3 565 Level 11c01400.serial:tx empty
17: 0 0 0 0 GICv3 562 Level 11c01400.serial:break
18: 67 0 0 0 GICv3 566 Level 11c01400.serial:rx ready
19: 0 0 0 0 GICv3 563 Level 11c01400.serial:tx end
IPI0: 3 12 12 25 Rescheduling interrupts
IPI1: 299 276 347 82 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop NMIs
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 0 0 0 0 IRQ work interrupts
IPI6: 0 0 0 0 CPU backtrace interrupts
IPI7: 0 0 0 0 KGDB roundup interrupts
Err: 0
/ #

/ # cat /proc/meminfo
MemTotal: 3882652 kB
MemFree: 3846048 kB
MemAvailable: 3775780 kB

Biju Das (12):
dt-bindings: serial: renesas: Document RZ/G3E (r9a09g047) scif
dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II
EVK
dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
soc: renesas: Add RZ/G3E (R9A09G047) config option
clk: renesas: Add support for RZ/G3E SoC
clk: renesas: rzv2h-cpg: Add MSTOP support
arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC
arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM
arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK
board
arm64: defconfig: Enable R9A09G047 SoC
HACK-DO-NOT-APPLY-defconfig: Enable INIT RAMFS

.../bindings/clock/renesas,rzv2h-cpg.yaml | 15 +-
.../bindings/serial/renesas,scif.yaml | 5 +
.../bindings/soc/renesas/renesas.yaml | 17 +++
arch/arm64/boot/dts/renesas/Makefile | 2 +
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 144 ++++++++++++++++++
arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi | 18 +++
.../boot/dts/renesas/r9a09g047e57-smarc.dts | 18 +++
arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi | 13 ++
.../boot/dts/renesas/renesas-smarc2.dtsi | 24 +++
.../boot/dts/renesas/rzg3e-smarc-som.dtsi | 28 ++++
arch/arm64/configs/defconfig | 2 +
drivers/clk/renesas/Kconfig | 7 +-
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r9a09g047-cpg.c | 100 ++++++++++++
drivers/clk/renesas/r9a09g057-cpg.c | 117 +++++++++-----
drivers/clk/renesas/rzv2h-cpg.c | 98 +++++++++++-
drivers/clk/renesas/rzv2h-cpg.h | 23 ++-
drivers/soc/renesas/Kconfig | 5 +
.../dt-bindings/clock/renesas,r9a09g047-cpg.h | 21 +++
19 files changed, 604 insertions(+), 54 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
create mode 100644 drivers/clk/renesas/r9a09g047-cpg.c
create mode 100644 include/dt-bindings/clock/renesas,r9a09g047-cpg.h

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2.43.0