From: Neha Malcom Francis <n-francis@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<u-kumar1@ti.com>, <n-francis@ti.com>
Subject: [PATCH 1/2] dt-bindings: misc: bist: Add BIST dt-binding for TI K3 devices
Date: Thu, 28 Nov 2024 19:38:24 +0530 [thread overview]
Message-ID: <20241128140825.263216-2-n-francis@ti.com> (raw)
In-Reply-To: <20241128140825.263216-1-n-francis@ti.com>
Document the binding for TI K3 BIST (Built-In Self Test) block.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
.../bindings/misc/ti,j784s4-bist.yaml | 66 +++++++++++++++++++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/ti,j784s4-bist.yaml
diff --git a/Documentation/devicetree/bindings/misc/ti,j784s4-bist.yaml b/Documentation/devicetree/bindings/misc/ti,j784s4-bist.yaml
new file mode 100644
index 000000000000..bd1b42734b3d
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/ti,j784s4-bist.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2024 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/ti,j784s4-bist.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 BIST
+
+maintainers:
+ - Neha Malcom Francis <n-francis@ti.com>
+
+description:
+ The BIST (Built-In Self Test) module is an IP block present in K3 devices
+ that support triggering of BIST tests, both PBIST (Memory BIST) and LBIST
+ (Logic BIST) on a core. Both tests are destructive in nature. At boot, BIST
+ is executed by hardware for the MCU domain automatically as part of HW POST.
+
+properties:
+ compatible:
+ const: ti,j784s4-bist
+
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: cfg
+ - const: ctrl_mmr
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ ti,bist-instance:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ the BIST instance in the SoC represented as an integer
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - ti,bist-instance
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/soc/ti,sci_pm_domain.h>
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ bist@33c0000 {
+ compatible = "ti,j784s4-bist";
+ reg = <0x00 0x033c0000 0x00 0x400>,
+ <0x00 0x0010c1a0 0x00 0x01c>;
+ reg-names = "cfg", "ctrl_mmr";
+ clocks = <&k3_clks 237 7>;
+ power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+ ti,bist-instance = <14>;
+ };
+ };
--
2.34.1
next prev parent reply other threads:[~2024-11-28 14:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 14:08 [PATCH 0/2] Add support for K3 BIST Neha Malcom Francis
2024-11-28 14:08 ` Neha Malcom Francis [this message]
2024-11-29 7:20 ` [PATCH 1/2] dt-bindings: misc: bist: Add BIST dt-binding for TI K3 devices Krzysztof Kozlowski
2024-11-29 7:43 ` Neha Malcom Francis
2024-11-29 9:15 ` Krzysztof Kozlowski
2025-03-13 11:14 ` Neha Malcom Francis
2025-03-19 7:46 ` Krzysztof Kozlowski
2025-03-19 9:02 ` Neha Malcom Francis
2025-03-24 7:23 ` Krzysztof Kozlowski
2025-03-27 4:12 ` Neha Malcom Francis
2024-11-28 14:08 ` [PATCH 2/2] arm64: dts: ti: k3-j784s4-main: Add PBIST_14 node Neha Malcom Francis
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