From: David Lechner <dlechner@baylibre.com>
To: "Mark Brown" <broonie@kernel.org>,
"Jonathan Cameron" <jic23@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Nuno Sá" <nuno.sa@analog.com>
Cc: "Uwe Kleine-König" <ukleinek@kernel.org>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"David Jander" <david@protonic.nl>,
"Martin Sperl" <kernel@martin.sperl.org>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,
linux-pwm@vger.kernel.org,
"David Lechner" <dlechner@baylibre.com>
Subject: [PATCH v6 15/17] doc: iio: ad4695: add SPI offload support
Date: Wed, 11 Dec 2024 14:54:52 -0600 [thread overview]
Message-ID: <20241211-dlech-mainline-spi-engine-offload-2-v6-15-88ee574d5d03@baylibre.com> (raw)
In-Reply-To: <20241211-dlech-mainline-spi-engine-offload-2-v6-0-88ee574d5d03@baylibre.com>
Document SPI offload support for the ad4695 driver.
Signed-off-by: David Lechner <dlechner@baylibre.com>
---
v6 changes:
* Fixed double "all"
* Don't abbreviate "sampling_frequency" attribute names for clarity.
v5 changes: new patch in v5
---
Documentation/iio/ad4695.rst | 68 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/Documentation/iio/ad4695.rst b/Documentation/iio/ad4695.rst
index 9ec8bf466c15bf94cbae2ebdb61875f66af1264f..ead0faadff4b5aede2a34bac52e103e375da6f21 100644
--- a/Documentation/iio/ad4695.rst
+++ b/Documentation/iio/ad4695.rst
@@ -47,6 +47,36 @@ In this mode, CNV and CS are tied together and there is a single SDO line.
To use this mode, in the device tree, omit the ``cnv-gpios`` and
``spi-rx-bus-width`` properties.
+SPI offload wiring
+^^^^^^^^^^^^^^^^^^
+
+When used with a SPI offload, the supported wiring configuration is:
+
+.. code-block::
+
+ +-------------+ +-------------+
+ | GP0/BUSY |-------->| TRIGGER |
+ | CS |<--------| CS |
+ | | | |
+ | ADC | | SPI |
+ | | | |
+ | SDI |<--------| SDO |
+ | SDO |-------->| SDI |
+ | SCLK |<--------| SCLK |
+ | | | |
+ | | +-------------+
+ | CNV |<-----+--| PWM |
+ | | +--| GPIO |
+ +-------------+ +-------------+
+
+In this case, both the ``cnv-gpios`` and ``pwms`` properties are required.
+The ``#trigger-source-cells = <2>`` property is also required to connect back
+to the SPI offload. The SPI offload will have ``trigger-sources`` property
+with cells to indicate the busy signal and which GPx pin is used, e.g
+``<&ad4695 AD4695_TRIGGER_EVENT_BUSY AD4695_TRIGGER_PIN_GP0>``.
+
+.. seealso:: `SPI offload support`_
+
Channel configuration
---------------------
@@ -158,6 +188,27 @@ Unimplemented features
- GPIO support
- CRC support
+SPI offload support
+===================
+
+To be able to achieve the maximum sample rate, the driver can be used with the
+`AXI SPI Engine`_ to provide SPI offload support.
+
+.. _AXI SPI Engine: http://analogdevicesinc.github.io/hdl/projects/ad469x_fmc/index.html
+
+.. seealso:: `SPI offload wiring`_
+
+When SPI offload is being used, some attributes will be different.
+
+* ``trigger`` directory is removed.
+* ``in_voltage0_sampling_frequency`` attributes are added for setting the sample
+ rate.
+* ``in_voltage0_sampling_frequency_available`` attributes are added for querying
+ the max sample rate.
+* ``timestamp`` channel is removed.
+* Buffer data format may be different compared to when offload is not used,
+ e.g. the ``buffer0/in_voltage0_type`` attribute.
+
Device buffers
==============
@@ -165,3 +216,20 @@ This driver supports hardware triggered buffers. This uses the "advanced
sequencer" feature of the chip to trigger a burst of conversions.
Also see :doc:`iio_devbuf` for more general information.
+
+Effective sample rate for buffered reads
+----------------------------------------
+
+When SPI offload is not used, the sample rate is determined by the trigger that
+is manually configured in userspace. All enabled channels will be read in a
+burst when the trigger is received.
+
+When SPI offload is used, the sample rate is configured per channel. All
+channels will have the same rate, so only one ``in_voltageY_sampling_frequency``
+attribute needs to be set. Since this rate determines the delay between each
+individual conversion, the effective sample rate for each sample is actually
+the sum of the periods of each enabled channel in a buffered read. In other
+words, it is the value of the ``in_voltageY_sampling_frequency`` attribute
+divided by the number of enabled channels. So if 4 channels are enabled, with
+the ``in_voltageY_sampling_frequency`` attributes set to 1 MHz, the effective
+sample rate is 250 kHz.
--
2.43.0
next prev parent reply other threads:[~2024-12-11 20:55 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-11 20:54 [PATCH v6 00/17] spi: axi-spi-engine: add offload support David Lechner
2024-12-11 20:54 ` [PATCH v6 01/17] spi: add basic support for SPI offloading David Lechner
2024-12-17 11:21 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 02/17] spi: offload: add support for hardware triggers David Lechner
2024-12-17 11:30 ` Nuno Sá
2024-12-17 15:35 ` David Lechner
2024-12-11 20:54 ` [PATCH v6 03/17] dt-bindings: trigger-source: add generic PWM trigger source David Lechner
2024-12-14 14:25 ` Jonathan Cameron
2024-12-17 14:32 ` Rob Herring (Arm)
2024-12-11 20:54 ` [PATCH v6 04/17] spi: offload-trigger: add PWM trigger driver David Lechner
2024-12-17 11:36 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 05/17] spi: add offload TX/RX streaming APIs David Lechner
2024-12-14 14:28 ` Jonathan Cameron
2024-12-17 11:43 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 06/17] spi: dt-bindings: axi-spi-engine: add SPI offload properties David Lechner
2024-12-14 14:30 ` Jonathan Cameron
2024-12-17 14:33 ` Rob Herring (Arm)
2024-12-11 20:54 ` [PATCH v6 07/17] spi: axi-spi-engine: implement offload support David Lechner
2024-12-17 11:48 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 08/17] iio: buffer-dmaengine: split requesting DMA channel from allocating buffer David Lechner
2024-12-14 14:37 ` Jonathan Cameron
2024-12-17 11:50 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 09/17] iio: buffer-dmaengine: add devm_iio_dmaengine_buffer_setup_with_handle() David Lechner
2024-12-14 14:39 ` Jonathan Cameron
2024-12-17 11:51 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 10/17] iio: adc: ad7944: don't use storagebits for sizing David Lechner
2024-12-14 16:56 ` Jonathan Cameron
2024-12-17 11:52 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 11/17] iio: adc: ad7944: add support for SPI offload David Lechner
2024-12-17 12:02 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 12/17] doc: iio: ad7944: describe offload support David Lechner
2024-12-11 20:54 ` [PATCH v6 13/17] dt-bindings: iio: adc: adi,ad4695: add SPI offload properties David Lechner
2024-12-14 16:59 ` Jonathan Cameron
2024-12-17 14:36 ` Rob Herring (Arm)
2024-12-11 20:54 ` [PATCH v6 14/17] iio: adc: ad4695: Add support for SPI offload David Lechner
2024-12-17 12:15 ` Nuno Sá
2024-12-11 20:54 ` David Lechner [this message]
2024-12-11 20:54 ` [PATCH v6 16/17] iio: dac: ad5791: sort include directives David Lechner
2024-12-17 12:15 ` Nuno Sá
2024-12-11 20:54 ` [PATCH v6 17/17] iio: dac: ad5791: Add offload support David Lechner
2024-12-14 17:12 ` Jonathan Cameron
2024-12-17 12:18 ` Nuno Sá
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