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X-CSE-ConnectionGUID: X7eBo5qDSHGmoB2KOB0mWA== X-CSE-MsgGUID: nYcxBAjORR6JFd3VQnsHnQ== X-IronPort-AV: E=McAfee;i="6700,10204,11282"; a="37901799" X-IronPort-AV: E=Sophos;i="6.12,223,1728975600"; d="scan'208";a="37901799" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2024 10:35:23 -0800 X-CSE-ConnectionGUID: qMcCP1BFTf6GYnBNbWFPfQ== X-CSE-MsgGUID: uQSxdHw8SI2pdZwNqnwP6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,223,1728975600"; d="scan'208";a="95321237" Received: from lkp-server01.sh.intel.com (HELO 82a3f569d0cb) ([10.239.97.150]) by fmviesa007.fm.intel.com with ESMTP; 10 Dec 2024 10:35:18 -0800 Received: from kbuild by 82a3f569d0cb with local (Exim 4.96) (envelope-from ) id 1tL54l-0005r9-3A; Tue, 10 Dec 2024 18:35:15 +0000 Date: Wed, 11 Dec 2024 02:34:16 +0800 From: kernel test robot To: Chen Wang , u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com Cc: oe-kbuild-all@lists.linux.dev Subject: Re: [PATCH v2 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller Message-ID: <202412110248.fdcNDwnt-lkp@intel.com> References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Hi Chen, kernel test robot noticed the following build warnings: [auto build test WARNING on fac04efc5c793dccbd07e2d59af9f90b7fc0dca4] url: https://github.com/intel-lab-lkp/linux/commits/Chen-Wang/dt-bindings-interrupt-controller-Add-Sophgo-SG2042-MSI/20241209-151429 base: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4 patch link: https://lore.kernel.org/r/c882fe329932409131be76ce47b81a6155595ce4.1733726057.git.unicorn_wang%40outlook.com patch subject: [PATCH v2 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller config: arm-randconfig-r131-20241210 (https://download.01.org/0day-ci/archive/20241211/202412110248.fdcNDwnt-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 14.2.0 reproduce: (https://download.01.org/0day-ci/archive/20241211/202412110248.fdcNDwnt-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202412110248.fdcNDwnt-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/irqchip/irq-sg2042-msi.c:64:9: sparse: sparse: cast removes address space '__iomem' of expression >> drivers/irqchip/irq-sg2042-msi.c:64:9: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void volatile [noderef] __iomem *addr @@ got unsigned int * @@ drivers/irqchip/irq-sg2042-msi.c:64:9: sparse: expected void volatile [noderef] __iomem *addr drivers/irqchip/irq-sg2042-msi.c:64:9: sparse: got unsigned int * vim +/__iomem +64 drivers/irqchip/irq-sg2042-msi.c 58 59 static void sg2042_msi_irq_ack(struct irq_data *d) 60 { 61 struct sg2042_msi_data *data = irq_data_get_irq_chip_data(d); 62 int bit_off = d->hwirq - data->irq_first; 63 > 64 writel(1 << bit_off, (unsigned int *)data->reg_clr); 65 66 irq_chip_ack_parent(d); 67 } 68 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki