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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241204212559.GA3007963@bhelgaas> On Wed, Dec 04, 2024 at 03:25:59PM -0600, Bjorn Helgaas wrote: > On Tue, Nov 12, 2024 at 08:31:33PM +0530, Krishna chaitanya chundru wrote: > > Add binding describing the Qualcomm PCIe switch, QPS615, > > which provides Ethernet MAC integrated to the 3rd downstream port > > and two downstream PCIe ports. > > > +$defs: > > + qps615-node: > > + type: object > > + > > + properties: > > + qcom,l0s-entry-delay-ns: > > + description: Aspm l0s entry delay. > > + > > + qcom,l1-entry-delay-ns: > > + description: Aspm l1 entry delay. > > To match spec usage: > s/Aspm/ASPM/ > s/l0s/L0s/ > s/l1/L1/ > > Other than the fact that qps615 needs the driver to configure these, > there's nothing qcom-specific here, so I suggest the names should omit > "qcom" and include "aspm". > In that case, these properties should be documented in dt-schema: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-bus-common.yaml - Mani -- மணிவண்ணன் சதாசிவம்