From: Rob Herring <robh@kernel.org>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Magnus Damm <magnus.damm@gmail.com>,
Wolfram Sang <wsa+renesas@sang-engineering.com>,
linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-watchdog@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v2 4/6] dt-bindings: watchdog: renesas: Document `renesas,syscon-cpg-error-rst` property
Date: Thu, 2 Jan 2025 15:46:22 -0600 [thread overview]
Message-ID: <20250102214622.GB614405-robh@kernel.org> (raw)
In-Reply-To: <20241227190210.69025-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
On Fri, Dec 27, 2024 at 07:02:08PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> The RZ/V2H(P) CPG block includes Error Reset Registers (CPG_ERROR_RSTm).
> A system reset is triggered in response to error interrupt factors, and
> the corresponding bit is set in the CPG_ERROR_RSTm register. These
> registers can be utilized by various IP blocks as needed.
>
> In the event of a watchdog overflow or underflow, a system reset is issued,
> and the CPG_ERROR_RST2[0/1/2/3] bits are set depending on the watchdog in
> use: CM33 = 0, CA55 = 1, CR8_0 = 2, CR8_1 = 3. For the watchdog driver to
> determine and report the current boot status, it needs to read the
> CPG_ERROR_RST2[0/1/2/3]bits and provide this information to the user upon
> request.
>
> To facilitate this operation, add `renesas,syscon-cpg-error-rst`
> property to the WDT node, which maps to the `syscon` CPG node, enabling
> retrieval of the necessary information.
>
> Additionally, the property is marked as required for the RZ/V2H(P) SoC to
> ensure future compatibility (e.g., where the same IP block is present on
> the RZ/G3E SoC) and explicitly disallowed for other SoCs.
This is the other half of the ABI change.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v1->v2
> - Renamed `renesas,r9a09g057-syscon-wdt-errorrst` to `renesas,syscon-cpg-error-rst`
> - Updated commit message
> ---
> .../bindings/watchdog/renesas,wdt.yaml | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> index 29ada89fdcdc..ca62ae8b1b0c 100644
> --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> @@ -112,6 +112,19 @@ properties:
>
> timeout-sec: true
>
> + renesas,syscon-cpg-error-rst:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + The first cell is a phandle to the SYSCON entry required to obtain
> + the current boot status. The second cell specifies the CPG_ERROR_RSTm
> + register offset within the SYSCON, and the third cell indicates the
> + bit within the CPG_ERROR_RSTm register.
> + items:
> + - items:
> + - description: Phandle to the CPG node
> + - description: The CPG_ERROR_RSTm register offset
> + - description: The bit within CPG_ERROR_RSTm register of interest
> +
> required:
> - compatible
> - reg
> @@ -182,7 +195,11 @@ allOf:
> properties:
> interrupts: false
> interrupt-names: false
> + required:
> + - renesas,syscon-cpg-error-rst
New required property == ABI break
Once the OS driver relies on this being present, then older DTs will
break.
That's all fine if you spell it out in the commit message and any users
are fine with the breakage.
Rob
next prev parent reply other threads:[~2025-01-02 21:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-27 19:02 [PATCH v2 0/6] Add support to retrieve the bootstatus from watchdog for RZ/V2H(P) SoC Prabhakar
2024-12-27 19:02 ` [PATCH v2 1/6] dt-bindings: clock: rzv2h-cpg: Add syscon compatible for CPG block Prabhakar
2025-01-02 21:42 ` Rob Herring
2024-12-27 19:02 ` [PATCH v2 2/6] arm64: dts: renesas: r9a09g047: Add `syscon` compatible for CPG node Prabhakar
2024-12-27 19:02 ` [PATCH v2 3/6] arm64: dts: renesas: r9a09g057: " Prabhakar
2024-12-27 19:02 ` [PATCH v2 4/6] dt-bindings: watchdog: renesas: Document `renesas,syscon-cpg-error-rst` property Prabhakar
2025-01-02 21:46 ` Rob Herring [this message]
2025-01-02 22:06 ` Lad, Prabhakar
2024-12-27 19:02 ` [PATCH v2 5/6] watchdog: rzv2h_wdt: Add support to retrieve the bootstatus information Prabhakar
2024-12-27 19:02 ` [PATCH v2 6/6] arm64: dts: renesas: r9a09g057: Add `renesas,syscon-cpg-error-rst` property to WDT node Prabhakar
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