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Mon, 06 Jan 2025 08:24:04 -0800 (PST) Date: Mon, 6 Jan 2025 21:53:52 +0530 From: Manivannan Sadhasivam To: Jianjun Wang Cc: Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Xavier Chang Subject: Re: [PATCH 5/5] PCI: mediatek-gen3: Keep PCIe power and clocks if suspend-to-idle Message-ID: <20250106162352.neo5pkunbdakizar@thinkpad> References: <20250103060035.30688-1-jianjun.wang@mediatek.com> <20250103060035.30688-6-jianjun.wang@mediatek.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250103060035.30688-6-jianjun.wang@mediatek.com> On Fri, Jan 03, 2025 at 02:00:15PM +0800, Jianjun Wang wrote: > If the target system sleep state is suspend-to-idle, the bridge is > supposed to stay in D0, and the framework will not help to restore its > configuration space, so keep its power and clocks during suspend. > > It's recommended to enable L1ss support, so the link can be changed to > L1.2 state during suspend. > > Signed-off-by: Jianjun Wang > --- > drivers/pci/controller/pcie-mediatek-gen3.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c > index 48f83c2d91f7..11da68910502 100644 > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > @@ -1291,6 +1291,19 @@ static int mtk_pcie_suspend_noirq(struct device *dev) > int err; > u32 val; > > + /* > + * If the target system sleep state is suspend-to-idle, the bridge is supposed to stay in > + * D0, and the framework will not help to restore its configuration space, so keep it's > + * power and clocks during suspend. > + * > + * It's recommended to enable L1ss support, so the link can be changed to L1.2 state during > + * suspend. > + */ > + if (pm_suspend_default_s2idle()) { I think you need: if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) here and below. > + dev_info(dev, "System enter s2idle state, keep PCIe power and clocks\n"); There is absolutely no reason to print this message every time system suspend happens. Even dev_dbg() seems unnecessary to me. - Mani > + return 0; > + } > + > /* Trigger link to L2 state */ > err = mtk_pcie_turn_off_link(pcie); > if (err) { > @@ -1316,6 +1329,11 @@ static int mtk_pcie_resume_noirq(struct device *dev) > struct mtk_gen3_pcie *pcie = dev_get_drvdata(dev); > int err; > > + if (pm_suspend_default_s2idle()) { > + dev_info(dev, "System enter s2idle state, no need to reinitialization\n"); > + return 0; > + } > + > err = pcie->soc->power_up(pcie); > if (err) > return err; > -- > 2.46.0 > -- மணிவண்ணன் சதாசிவம்