[PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[niravkumar.l.rabara]

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Removed invalid sys-mgr properties for stratix10 and fixed
dtbs_check warnings like:

socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: cpu1-start-addr: False schema
does not allow 4291846704
from schema $id:
http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#
socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: 'interrupts' does not match
any of the regexes: 'pinctrl-[0-9]+'
from schema $id:
http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202501091748.L2W2RwE5-lkp@intel.com/
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
index 0d837d3e65a5..fce1dc2ebad0 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
@@ -110,6 +110,4 @@ &rst {
 
 &sysmgr {
 	reg = <0xffd12000 0x1000>;
-	interrupts = <0x0 0x10 0x4>;
-	cpu1-start-addr = <0xffd06230>;
 };
-- 
2.25.1

Re: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[Krzysztof Kozlowski]

On 10/01/2025 12:26, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Removed invalid sys-mgr properties for stratix10 and fixed

"Remove"

> dtbs_check warnings like:
> 
> socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: cpu1-start-addr: False schema
> does not allow 4291846704
> from schema $id:
> http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#
> socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: 'interrupts' does not match
> any of the regexes: 'pinctrl-[0-9]+'
> from schema $id:
> http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#

This message is not readable. Don't wrap it.

> 
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202501091748.L2W2RwE5-lkp@intel.com/
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
>  arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> index 0d837d3e65a5..fce1dc2ebad0 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> @@ -110,6 +110,4 @@ &rst {
>  
>  &sysmgr {
>  	reg = <0xffd12000 0x1000>;
> -	interrupts = <0x0 0x10 0x4>;

Is this correct? Some background would be useful.

Best regards,
Krzysztof

RE: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[Rabara, Niravkumar L]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Friday, 10 January, 2025 7:37 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>; Dinh Nguyen
> <dinguyen@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: lkp <lkp@intel.com>
> Subject: Re: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid
> sysmgr properties
> 
> On 10/01/2025 12:26, niravkumar.l.rabara@intel.com wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> >
> > Removed invalid sys-mgr properties for stratix10 and fixed
> 
> "Remove"
> 
> > dtbs_check warnings like:
> >
> > socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: cpu1-start-addr: False
> > schema does not allow 4291846704 from schema $id:
> > http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#
> > socfpga_stratix10_swvp.dtb: sysmgr@ffd12000: 'interrupts' does not
> > match any of the regexes: 'pinctrl-[0-9]+'
> > from schema $id:
> > http://devicetree.org/schemas/soc/altera/altr,sys-mgr.yaml#
> 
> This message is not readable. Don't wrap it.

Will fix this in v2. 
> 
> >
> > Reported-by: kernel test robot <lkp@intel.com>
> > Closes:
> > https://lore.kernel.org/oe-kbuild-all/202501091748.L2W2RwE5-lkp@intel.
> > com/
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > ---
> >  arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts | 2 --
> >  1 file changed, 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> > b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> > index 0d837d3e65a5..fce1dc2ebad0 100644
> > --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> > +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
> > @@ -110,6 +110,4 @@ &rst {
> >
> >  &sysmgr {
> >  	reg = <0xffd12000 0x1000>;
> > -	interrupts = <0x0 0x10 0x4>;
> 
> Is this correct? Some background would be useful.

stratix10_swvp.dts is for legacy Stratix10 SW Virtual Platform.
The socfpga system manager dt binding does not include "interrupt" property
and the existing socfpga board files does not use it for sysmgr.
(e.g. Cyclon5/Arria10/stratix10/Agilex)

Socfpga system manager drivers (altera-sysmgr.c/socfpga.c) also does not use
interrupt property.
The stratix10_swvp.dts has this property since beginning(unused) but 
dtbs_check warning only appeared recently when I convert system manger binding
from txt to yaml.

Thanks,
Nirav

Re: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[Krzysztof Kozlowski]

On 10/01/2025 13:39, Rabara, Niravkumar L wrote:
>>>  &sysmgr {
>>>  	reg = <0xffd12000 0x1000>;
>>> -	interrupts = <0x0 0x10 0x4>;
>>
>> Is this correct? Some background would be useful.
> 
> stratix10_swvp.dts is for legacy Stratix10 SW Virtual Platform.
> The socfpga system manager dt binding does not include "interrupt" property
> and the existing socfpga board files does not use it for sysmgr.
> (e.g. Cyclon5/Arria10/stratix10/Agilex)
> 
> Socfpga system manager drivers (altera-sysmgr.c/socfpga.c) also does not use
> interrupt property.
> The stratix10_swvp.dts has this property since beginning(unused) but 
> dtbs_check warning only appeared recently when I convert system manger binding
> from txt to yaml.
All this I deduced from the change, but it still not answer about hardware.

Best regards,
Krzysztof

RE: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr properties

[Rabara, Niravkumar L]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Friday, 10 January, 2025 8:57 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>; Dinh Nguyen
> <dinguyen@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: lkp <lkp@intel.com>
> Subject: Re: [PATCH] arm64: dts: socfpga: stratix10_swvp: remove invalid sysmgr
> properties
> 
> On 10/01/2025 13:39, Rabara, Niravkumar L wrote:
> >>>  &sysmgr {
> >>>  	reg = <0xffd12000 0x1000>;
> >>> -	interrupts = <0x0 0x10 0x4>;
> >>
> >> Is this correct? Some background would be useful.
> >
> > stratix10_swvp.dts is for legacy Stratix10 SW Virtual Platform.
> > The socfpga system manager dt binding does not include "interrupt"
> > property and the existing socfpga board files does not use it for sysmgr.
> > (e.g. Cyclon5/Arria10/stratix10/Agilex)
> >
> > Socfpga system manager drivers (altera-sysmgr.c/socfpga.c) also does
> > not use interrupt property.
> > The stratix10_swvp.dts has this property since beginning(unused) but
> > dtbs_check warning only appeared recently when I convert system manger
> > binding from txt to yaml.
> All this I deduced from the change, but it still not answer about hardware.

System Manager hardware block contains control and status registers for
some IPs like EMAC, FPGA to SOC bridge, ECC, USB etc.
e.g 
For EMAC, to configure/check PHY interface selection for GMII/RGMII/RMII.
For ECC, interrupt mask and status register for USB, Onchip RAM, EMAC etc. 
Scratch pad registers to pass handoff data from FPGA Secure device manager
to bootloader. 

There is a global system manager interrupt(System Manger -> GIC -> CPU)
to serve single/double bit ECC interrupt to CPU. 
Since its dedicated for ECC usage in HW it is not included in system manager
dt bindings instead it’s a part of ECC manager bindings.

Thanks,
Nirav