* [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible
@ 2025-01-10 10:03 Romain Naour
2025-01-10 10:03 ` [PATCH v5 2/2] arm64: dts: ti: k3-j721e-beagleboneai64: Enable ACSPCIE output for PCIe1 Romain Naour
2025-01-10 15:35 ` [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Rob Herring
0 siblings, 2 replies; 5+ messages in thread
From: Romain Naour @ 2025-01-10 10:03 UTC (permalink / raw)
To: devicetree
Cc: linux-arm-kernel, linux-omap, conor+dt, krzk+dt, robh, kristo,
vigneshr, nm, afd, Romain Naour
From: Romain Naour <romain.naour@skf.com>
The ACSPCIE_PROXY_CTRL registers within the CTRL_MMR space of TI's J721e
SoC are used to drive the reference clock to the PCIe Endpoint device via
the PAD IO Buffers. Add the compatible for allowing the PCIe driver to
obtain the regmap for the ACSPCIE_CTRL register within the System
Controller device-tree node in order to enable the PAD IO Buffers.
Using the ti,j721e-acspcie-proxy-ctrl compatible imply to use "Proxy1"
address (1A090h) instead of "Proxy0" (18090h) to access
CTRLMMR_ACSPCIE0_CTRL register:
CTRLMMR_ACSPCIE0_CTRL Register (Proxy0 Offset = 18090h; Proxy1 Offset = 1A090h)
"Proxy0" is used as the default access path that can be locked with the
help of "CTRLMMR_LOCK0_KICK0" and "CTRLMMR_LOCK0_KICK1" registers.
The Technical Reference Manual for J721e SoC with details of the
ASCPCIE_CTRL registers is available at:
https://www.ti.com/lit/zip/spruil1
Signed-off-by: Romain Naour <romain.naour@skf.com>
---
v5:
- Add missing change to the J721e system controller binding
to avoid DT check warning when the new acspcie0_proxy_ctrl (syscon)
will be added to J721e system controller node (Andrew Davis).
https://lore.kernel.org/linux-devicetree/90f47fae-a493-471d-8fe6-e7df741161be@ti.com/
- Explain why "Proxy1" address (1A090h) should be used while using
ti,j721e-acspcie-proxy-ctrl compatible (Siddharth Vadapalli).
https://lore.kernel.org/linux-devicetree/begojbvvrpyjfr3pye7mqwiw73ucw5ynepdfujssr4jx4vs33a@pwahnph3qesl/
v4: Add missing change in the second list (From Andrew Davis) [1]
Rebase after the ti,j784s4-acspcie-proxy-ctrl compatible fix [2]
[1] https://lore.kernel.org/linux-devicetree/20250103174524.28768-1-afd@ti.com/
[2] https://lore.kernel.org/linux-devicetree/20250103174524.28768-2-afd@ti.com/
v3: new commit
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++
.../bindings/soc/ti/ti,j721e-system-controller.yaml | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 0e68c69e7bc9..1f3e67f432e7 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -115,6 +115,7 @@ select:
- ti,am625-dss-oldi-io-ctrl
- ti,am62p-cpsw-mac-efuse
- ti,am654-dss-oldi-io-ctrl
+ - ti,j721e-acspcie-proxy-ctrl
- ti,j784s4-acspcie-proxy-ctrl
- ti,j784s4-pcie-ctrl
- ti,keystone-pllctrl
@@ -213,6 +214,7 @@ properties:
- ti,am625-dss-oldi-io-ctrl
- ti,am62p-cpsw-mac-efuse
- ti,am654-dss-oldi-io-ctrl
+ - ti,j721e-acspcie-proxy-ctrl
- ti,j784s4-acspcie-proxy-ctrl
- ti,j784s4-pcie-ctrl
- ti,keystone-pllctrl
diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
index 378e9cc5fac2..16929218d611 100644
--- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
+++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
@@ -68,6 +68,12 @@ patternProperties:
description:
The node corresponding to SoC chip identification.
+ "^syscon@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/mfd/syscon.yaml#
+ description:
+ This is the ASPCIe control region.
+
required:
- compatible
- reg
--
2.47.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v5 2/2] arm64: dts: ti: k3-j721e-beagleboneai64: Enable ACSPCIE output for PCIe1 2025-01-10 10:03 [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Romain Naour @ 2025-01-10 10:03 ` Romain Naour 2025-01-10 15:35 ` [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Rob Herring 1 sibling, 0 replies; 5+ messages in thread From: Romain Naour @ 2025-01-10 10:03 UTC (permalink / raw) To: devicetree Cc: linux-arm-kernel, linux-omap, conor+dt, krzk+dt, robh, kristo, vigneshr, nm, afd, Romain Naour, Siddharth Vadapalli From: Romain Naour <romain.naour@skf.com> Unlike the SK-TDA4VM (k3-j721e-sk) board, there is no clock generator (CDCI6214RGET) on the BeagleBone AI-64 (k3-j721e-beagleboneai64) to provide PCIe refclk signal to PCIe Endponts. So the ACSPCIE module must provide refclk through PCIe_REFCLK pins. Use the new "ti,syscon-acspcie-proxy-ctrl" property to enable ACSPCIE module's PAD IO Buffers. Using "ti,j721e-acspcie-proxy-ctrl" imply to use use "Proxy1" address (1A090h) instead of "Proxy0" (18090h) to access CTRLMMR_ACSPCIE0_CTRL register: CTRLMMR_ACSPCIE0_CTRL Register (Proxy0 Offset = 18090h; Proxy1 Offset = 1A090h) So use "syscon@1a090" for acspcie0_proxy_ctrl node. Cc: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Romain Naour <romain.naour@skf.com> --- With this patch, we can remove "HACK: Sierra: Drive clock out" patch applied on vendor kernel for BeagleBone AI-64: https://openbeagle.org/beagleboard/linux/-/commit/ad65d7ef675966cdbc5d75f2bd545fad1914ba9b v5: - update the acspcie0_proxy_ctrl node address to use really use the "PROXY" register implied by ti,j721e-acspcie-proxy-ctrl compatible. https://lore.kernel.org/linux-devicetree/begojbvvrpyjfr3pye7mqwiw73ucw5ynepdfujssr4jx4vs33a@pwahnph3qesl/ v4: no change v3: - update "acspcie0_proxy_ctrl" compatible to "ti,j721e-acspcie-proxy-ctrl" since this property is specific to j721e variant. v2: - use generic style comments - use "syscon" as generic node name for "acspcie0_proxy_ctrl" node - Keep the compatible "ti,j784s4-acspcie-proxy-ctrl" since the ACSPCIE buffer and its functionality is the same across all K3 SoCs. (Siddharth Vadapalli) "The compatible "ti,j784s4-acspcie-pcie-ctrl" should be reused for J721E and all other K3 SoCs. For example, see: https://lore.kernel.org/r/20240402105708.4114146-1-s-vadapalli@ti.com/ which introduced "ti,am62p-cpsw-mac-efuse" compatible. The same compatible is reused across all K3 SoCs: https://lore.kernel.org/r/20240628151518.40100-1-afd@ti.com/ " --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 5 +++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 10 ++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index fb899c99753e..741ad2ba6fdb 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -859,6 +859,11 @@ &pcie1_rc { num-lanes = <2>; max-link-speed = <3>; reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>; + /* + * There is no on-board or external reference clock generators, + * use refclk from the ACSPCIE module's PAD IO Buffers. + */ + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; }; &ufs_wrapper { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index af3d730154ac..bc016c551710 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -5,6 +5,7 @@ * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/phy/phy.h> +#include <dt-bindings/phy/phy-cadence.h> #include <dt-bindings/phy/phy-ti.h> #include <dt-bindings/mux/mux.h> @@ -82,6 +83,11 @@ ehrpwm_tbclk: clock-controller@4140 { reg = <0x4140 0x18>; #clock-cells = <1>; }; + + acspcie0_proxy_ctrl: syscon@1a090 { + compatible = "ti,j721e-acspcie-proxy-ctrl", "syscon"; + reg = <0x1a090 0x4>; + }; }; main_ehrpwm0: pwm@3000000 { @@ -979,8 +985,8 @@ pcie1_rc: pcie@2910000 { max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 240 1>; - clock-names = "fck"; + clocks = <&k3_clks 240 1>, <&serdes1 CDNS_SIERRA_DERIVED_REFCLK>; + clock-names = "fck", "pcie_refclk"; #address-cells = <3>; #size-cells = <2>; bus-range = <0x0 0xff>; -- 2.47.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible 2025-01-10 10:03 [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Romain Naour 2025-01-10 10:03 ` [PATCH v5 2/2] arm64: dts: ti: k3-j721e-beagleboneai64: Enable ACSPCIE output for PCIe1 Romain Naour @ 2025-01-10 15:35 ` Rob Herring 2025-01-10 16:17 ` Andrew Davis 1 sibling, 1 reply; 5+ messages in thread From: Rob Herring @ 2025-01-10 15:35 UTC (permalink / raw) To: Romain Naour Cc: devicetree, linux-arm-kernel, linux-omap, conor+dt, krzk+dt, kristo, vigneshr, nm, afd, Romain Naour On Fri, Jan 10, 2025 at 11:03:30AM +0100, Romain Naour wrote: > From: Romain Naour <romain.naour@skf.com> > > The ACSPCIE_PROXY_CTRL registers within the CTRL_MMR space of TI's J721e > SoC are used to drive the reference clock to the PCIe Endpoint device via > the PAD IO Buffers. Add the compatible for allowing the PCIe driver to > obtain the regmap for the ACSPCIE_CTRL register within the System > Controller device-tree node in order to enable the PAD IO Buffers. > > Using the ti,j721e-acspcie-proxy-ctrl compatible imply to use "Proxy1" > address (1A090h) instead of "Proxy0" (18090h) to access > CTRLMMR_ACSPCIE0_CTRL register: > > CTRLMMR_ACSPCIE0_CTRL Register (Proxy0 Offset = 18090h; Proxy1 Offset = 1A090h) > > "Proxy0" is used as the default access path that can be locked with the > help of "CTRLMMR_LOCK0_KICK0" and "CTRLMMR_LOCK0_KICK1" registers. > > The Technical Reference Manual for J721e SoC with details of the > ASCPCIE_CTRL registers is available at: > https://www.ti.com/lit/zip/spruil1 > > Signed-off-by: Romain Naour <romain.naour@skf.com> > --- > v5: > - Add missing change to the J721e system controller binding > to avoid DT check warning when the new acspcie0_proxy_ctrl (syscon) > will be added to J721e system controller node (Andrew Davis). > > https://lore.kernel.org/linux-devicetree/90f47fae-a493-471d-8fe6-e7df741161be@ti.com/ > > - Explain why "Proxy1" address (1A090h) should be used while using > ti,j721e-acspcie-proxy-ctrl compatible (Siddharth Vadapalli). > > https://lore.kernel.org/linux-devicetree/begojbvvrpyjfr3pye7mqwiw73ucw5ynepdfujssr4jx4vs33a@pwahnph3qesl/ > > v4: Add missing change in the second list (From Andrew Davis) [1] > Rebase after the ti,j784s4-acspcie-proxy-ctrl compatible fix [2] > [1] https://lore.kernel.org/linux-devicetree/20250103174524.28768-1-afd@ti.com/ > [2] https://lore.kernel.org/linux-devicetree/20250103174524.28768-2-afd@ti.com/ > > v3: new commit > --- > Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ > .../bindings/soc/ti/ti,j721e-system-controller.yaml | 6 ++++++ > 2 files changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > index 0e68c69e7bc9..1f3e67f432e7 100644 > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > @@ -115,6 +115,7 @@ select: > - ti,am625-dss-oldi-io-ctrl > - ti,am62p-cpsw-mac-efuse > - ti,am654-dss-oldi-io-ctrl > + - ti,j721e-acspcie-proxy-ctrl > - ti,j784s4-acspcie-proxy-ctrl > - ti,j784s4-pcie-ctrl > - ti,keystone-pllctrl > @@ -213,6 +214,7 @@ properties: > - ti,am625-dss-oldi-io-ctrl > - ti,am62p-cpsw-mac-efuse > - ti,am654-dss-oldi-io-ctrl > + - ti,j721e-acspcie-proxy-ctrl > - ti,j784s4-acspcie-proxy-ctrl How do these 2 compare? Are they compatible? > - ti,j784s4-pcie-ctrl > - ti,keystone-pllctrl > diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > index 378e9cc5fac2..16929218d611 100644 > --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > @@ -68,6 +68,12 @@ patternProperties: > description: > The node corresponding to SoC chip identification. > > + "^syscon@[0-9a-f]+$": > + type: object > + $ref: /schemas/mfd/syscon.yaml# > + description: > + This is the ASPCIe control region. So this is a syscon child of a syscon. The primary reason for 'syscon' compatible is to create a regmap. Why can't you use the parent's syscon? Rob ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible 2025-01-10 15:35 ` [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Rob Herring @ 2025-01-10 16:17 ` Andrew Davis 2025-01-10 17:35 ` Rob Herring 0 siblings, 1 reply; 5+ messages in thread From: Andrew Davis @ 2025-01-10 16:17 UTC (permalink / raw) To: Rob Herring, Romain Naour Cc: devicetree, linux-arm-kernel, linux-omap, conor+dt, krzk+dt, kristo, vigneshr, nm, Romain Naour On 1/10/25 9:35 AM, Rob Herring wrote: > On Fri, Jan 10, 2025 at 11:03:30AM +0100, Romain Naour wrote: >> From: Romain Naour <romain.naour@skf.com> >> >> The ACSPCIE_PROXY_CTRL registers within the CTRL_MMR space of TI's J721e >> SoC are used to drive the reference clock to the PCIe Endpoint device via >> the PAD IO Buffers. Add the compatible for allowing the PCIe driver to >> obtain the regmap for the ACSPCIE_CTRL register within the System >> Controller device-tree node in order to enable the PAD IO Buffers. >> >> Using the ti,j721e-acspcie-proxy-ctrl compatible imply to use "Proxy1" >> address (1A090h) instead of "Proxy0" (18090h) to access >> CTRLMMR_ACSPCIE0_CTRL register: >> >> CTRLMMR_ACSPCIE0_CTRL Register (Proxy0 Offset = 18090h; Proxy1 Offset = 1A090h) >> >> "Proxy0" is used as the default access path that can be locked with the >> help of "CTRLMMR_LOCK0_KICK0" and "CTRLMMR_LOCK0_KICK1" registers. >> >> The Technical Reference Manual for J721e SoC with details of the >> ASCPCIE_CTRL registers is available at: >> https://www.ti.com/lit/zip/spruil1 >> >> Signed-off-by: Romain Naour <romain.naour@skf.com> >> --- >> v5: >> - Add missing change to the J721e system controller binding >> to avoid DT check warning when the new acspcie0_proxy_ctrl (syscon) >> will be added to J721e system controller node (Andrew Davis). >> >> https://lore.kernel.org/linux-devicetree/90f47fae-a493-471d-8fe6-e7df741161be@ti.com/ >> >> - Explain why "Proxy1" address (1A090h) should be used while using >> ti,j721e-acspcie-proxy-ctrl compatible (Siddharth Vadapalli). >> >> https://lore.kernel.org/linux-devicetree/begojbvvrpyjfr3pye7mqwiw73ucw5ynepdfujssr4jx4vs33a@pwahnph3qesl/ >> >> v4: Add missing change in the second list (From Andrew Davis) [1] >> Rebase after the ti,j784s4-acspcie-proxy-ctrl compatible fix [2] >> [1] https://lore.kernel.org/linux-devicetree/20250103174524.28768-1-afd@ti.com/ >> [2] https://lore.kernel.org/linux-devicetree/20250103174524.28768-2-afd@ti.com/ >> >> v3: new commit >> --- >> Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ >> .../bindings/soc/ti/ti,j721e-system-controller.yaml | 6 ++++++ >> 2 files changed, 8 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml >> index 0e68c69e7bc9..1f3e67f432e7 100644 >> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml >> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml >> @@ -115,6 +115,7 @@ select: >> - ti,am625-dss-oldi-io-ctrl >> - ti,am62p-cpsw-mac-efuse >> - ti,am654-dss-oldi-io-ctrl >> + - ti,j721e-acspcie-proxy-ctrl >> - ti,j784s4-acspcie-proxy-ctrl >> - ti,j784s4-pcie-ctrl >> - ti,keystone-pllctrl >> @@ -213,6 +214,7 @@ properties: >> - ti,am625-dss-oldi-io-ctrl >> - ti,am62p-cpsw-mac-efuse >> - ti,am654-dss-oldi-io-ctrl > >> + - ti,j721e-acspcie-proxy-ctrl >> - ti,j784s4-acspcie-proxy-ctrl > > How do these 2 compare? Are they compatible? > Yes, they are 100% identical and compatible, but we were told to make a new string anyway.. [0] [0] https://lore.kernel.org/all/1bfdf1f1-7542-4149-a85d-2ac4b659b26b@kernel.org/ >> - ti,j784s4-pcie-ctrl >> - ti,keystone-pllctrl >> diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml >> index 378e9cc5fac2..16929218d611 100644 >> --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml >> +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml >> @@ -68,6 +68,12 @@ patternProperties: >> description: >> The node corresponding to SoC chip identification. >> >> + "^syscon@[0-9a-f]+$": >> + type: object >> + $ref: /schemas/mfd/syscon.yaml# >> + description: >> + This is the ASPCIe control region. > > So this is a syscon child of a syscon. The primary reason for 'syscon' > compatible is to create a regmap. Why can't you use the parent's syscon? > The parent node will not be a syscon soon. We made this whole bus a "syscon" so we could just poke any register we wanted which was a hacky solution we want to fix. The parent will be converted into a normal "simple-bus". Most of the IP in this region can be described using normal DT devices, but there are still just a couple registers like this where we need a raw syscon (or we could make a proper device driver for these registers, but that might be excessive, instead seems easy enough to just poke them directly from the PCIe driver). Andrew > Rob ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible 2025-01-10 16:17 ` Andrew Davis @ 2025-01-10 17:35 ` Rob Herring 0 siblings, 0 replies; 5+ messages in thread From: Rob Herring @ 2025-01-10 17:35 UTC (permalink / raw) To: Andrew Davis Cc: Romain Naour, devicetree, linux-arm-kernel, linux-omap, conor+dt, krzk+dt, kristo, vigneshr, nm, Romain Naour On Fri, Jan 10, 2025 at 10:17:15AM -0600, Andrew Davis wrote: > On 1/10/25 9:35 AM, Rob Herring wrote: > > On Fri, Jan 10, 2025 at 11:03:30AM +0100, Romain Naour wrote: > > > From: Romain Naour <romain.naour@skf.com> > > > > > > The ACSPCIE_PROXY_CTRL registers within the CTRL_MMR space of TI's J721e > > > SoC are used to drive the reference clock to the PCIe Endpoint device via > > > the PAD IO Buffers. Add the compatible for allowing the PCIe driver to > > > obtain the regmap for the ACSPCIE_CTRL register within the System > > > Controller device-tree node in order to enable the PAD IO Buffers. > > > > > > Using the ti,j721e-acspcie-proxy-ctrl compatible imply to use "Proxy1" > > > address (1A090h) instead of "Proxy0" (18090h) to access > > > CTRLMMR_ACSPCIE0_CTRL register: > > > > > > CTRLMMR_ACSPCIE0_CTRL Register (Proxy0 Offset = 18090h; Proxy1 Offset = 1A090h) > > > > > > "Proxy0" is used as the default access path that can be locked with the > > > help of "CTRLMMR_LOCK0_KICK0" and "CTRLMMR_LOCK0_KICK1" registers. > > > > > > The Technical Reference Manual for J721e SoC with details of the > > > ASCPCIE_CTRL registers is available at: > > > https://www.ti.com/lit/zip/spruil1 > > > > > > Signed-off-by: Romain Naour <romain.naour@skf.com> > > > --- > > > v5: > > > - Add missing change to the J721e system controller binding > > > to avoid DT check warning when the new acspcie0_proxy_ctrl (syscon) > > > will be added to J721e system controller node (Andrew Davis). > > > > > > https://lore.kernel.org/linux-devicetree/90f47fae-a493-471d-8fe6-e7df741161be@ti.com/ > > > > > > - Explain why "Proxy1" address (1A090h) should be used while using > > > ti,j721e-acspcie-proxy-ctrl compatible (Siddharth Vadapalli). > > > > > > https://lore.kernel.org/linux-devicetree/begojbvvrpyjfr3pye7mqwiw73ucw5ynepdfujssr4jx4vs33a@pwahnph3qesl/ > > > > > > v4: Add missing change in the second list (From Andrew Davis) [1] > > > Rebase after the ti,j784s4-acspcie-proxy-ctrl compatible fix [2] > > > [1] https://lore.kernel.org/linux-devicetree/20250103174524.28768-1-afd@ti.com/ > > > [2] https://lore.kernel.org/linux-devicetree/20250103174524.28768-2-afd@ti.com/ > > > > > > v3: new commit > > > --- > > > Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ > > > .../bindings/soc/ti/ti,j721e-system-controller.yaml | 6 ++++++ > > > 2 files changed, 8 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > > > index 0e68c69e7bc9..1f3e67f432e7 100644 > > > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > > > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > > > @@ -115,6 +115,7 @@ select: > > > - ti,am625-dss-oldi-io-ctrl > > > - ti,am62p-cpsw-mac-efuse > > > - ti,am654-dss-oldi-io-ctrl > > > + - ti,j721e-acspcie-proxy-ctrl > > > - ti,j784s4-acspcie-proxy-ctrl > > > - ti,j784s4-pcie-ctrl > > > - ti,keystone-pllctrl > > > @@ -213,6 +214,7 @@ properties: > > > - ti,am625-dss-oldi-io-ctrl > > > - ti,am62p-cpsw-mac-efuse > > > - ti,am654-dss-oldi-io-ctrl > > > > > + - ti,j721e-acspcie-proxy-ctrl > > > - ti,j784s4-acspcie-proxy-ctrl > > > > How do these 2 compare? Are they compatible? > > > > Yes, they are 100% identical and compatible, but we were told > to make a new string anyway.. [0] > > [0] https://lore.kernel.org/all/1bfdf1f1-7542-4149-a85d-2ac4b659b26b@kernel.org/ Then you should have: "ti,j721e-acspcie-proxy-ctrl", "ti,j784s4-acspcie-proxy-ctrl", "syscon" > > > > > - ti,j784s4-pcie-ctrl > > > - ti,keystone-pllctrl > > > diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > > > index 378e9cc5fac2..16929218d611 100644 > > > --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > > > +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml > > > @@ -68,6 +68,12 @@ patternProperties: > > > description: > > > The node corresponding to SoC chip identification. > > > + "^syscon@[0-9a-f]+$": > > > + type: object > > > + $ref: /schemas/mfd/syscon.yaml# > > > + description: > > > + This is the ASPCIe control region. > > > > So this is a syscon child of a syscon. The primary reason for 'syscon' > > compatible is to create a regmap. Why can't you use the parent's syscon? > > > > The parent node will not be a syscon soon. We made this whole bus a "syscon" > so we could just poke any register we wanted which was a hacky solution we > want to fix. The parent will be converted into a normal "simple-bus". Sigh... And that can be done without ABI breakage? > Most of the IP in this region can be described using normal DT devices, > but there are still just a couple registers like this where we need a raw > syscon (or we could make a proper device driver for these registers, but > that might be excessive, instead seems easy enough to just poke them > directly from the PCIe driver). Given it was already a syscon, keeping that is fine. Rob ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-01-10 17:35 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-01-10 10:03 [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Romain Naour 2025-01-10 10:03 ` [PATCH v5 2/2] arm64: dts: ti: k3-j721e-beagleboneai64: Enable ACSPCIE output for PCIe1 Romain Naour 2025-01-10 15:35 ` [PATCH v5 1/2] dt-bindings: mfd: syscon: Add ti,j721e-acspcie-proxy-ctrl compatible Rob Herring 2025-01-10 16:17 ` Andrew Davis 2025-01-10 17:35 ` Rob Herring
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