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From: Bjorn Helgaas <helgaas@kernel.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: "Rob Herring" <robh@kernel.org>,
	"Saravana Kannan" <saravanak@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	imx@lists.linux.dev
Subject: Re: [PATCH v8 2/7] PCI: dwc: Use devicetree 'ranges' property to get rid of cpu_addr_fixup() callback
Date: Thu, 16 Jan 2025 17:13:58 -0600	[thread overview]
Message-ID: <20250116231358.GA616783@bhelgaas> (raw)
In-Reply-To: <20241119-pci_fixup_addr-v8-2-c4bfa5193288@nxp.com>

On Tue, Nov 19, 2024 at 02:44:20PM -0500, Frank Li wrote:
> parent_bus_addr in struct of_range can indicate address information just
> ahead of PCIe controller. Most system's bus fabric use 1:1 map between
> input and output address. but some hardware like i.MX8QXP doesn't use 1:1
> map. See below diagram:
> 
>             ┌─────────┐                    ┌────────────┐
>  ┌─────┐    │         │ IA: 0x8ff8_0000    │            │
>  │ CPU ├───►│   ┌────►├─────────────────┐  │ PCI        │
>  └─────┘    │   │     │ IA: 0x8ff0_0000 │  │            │
>   CPU Addr  │   │  ┌─►├─────────────┐   │  │ Controller │
> 0x7ff8_0000─┼───┘  │  │             │   │  │            │
>             │      │  │             │   │  │            │   PCI Addr
> 0x7ff0_0000─┼──────┘  │             │   └──► IOSpace   ─┼────────────►
>             │         │             │      │            │    0
> 0x7000_0000─┼────────►├─────────┐   │      │            │
>             └─────────┘         │   └──────► CfgSpace  ─┼────────────►
>              BUS Fabric         │          │            │    0
>                                 │          │            │
>                                 └──────────► MemSpace  ─┼────────────►
>                         IA: 0x8000_0000    │            │  0x8000_0000
>                                            └────────────┘
> 
> bus@5f000000 {
> 	compatible = "simple-bus";
> 	#address-cells = <1>;
> 	#size-cells = <1>;
> 	ranges = <0x80000000 0x0 0x70000000 0x10000000>;
> 
> 	pcie@5f010000 {
> 		compatible = "fsl,imx8q-pcie";
> 		reg = <0x5f010000 0x10000>, <0x8ff00000 0x80000>;
> 		reg-names = "dbi", "config";
> 		#address-cells = <3>;
> 		#size-cells = <2>;
> 		device_type = "pci";
> 		bus-range = <0x00 0xff>;
> 		ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>,
> 			 <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>;
> 	...
> 	};
> };
> 
> Term internal address (IA) here means the address just before PCIe
> controller. After ATU use this IA instead CPU address, cpu_addr_fixup() can
> be removed.

> @@ -730,9 +779,15 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
>  
>  		atu.index = i;
>  		atu.type = PCIE_ATU_TYPE_MEM;
> -		atu.cpu_addr = entry->res->start;
> +		parent_bus_addr = entry->res->start;
>  		atu.pci_addr = entry->res->start - entry->offset;
>  
> +		ret = dw_pcie_get_parent_addr(pci, entry->res->start, &parent_bus_addr);
> +		if (ret)
> +			return ret;
> +
> +		atu.cpu_addr = parent_bus_addr;

Here you set atu.cpu_addr to the intermediate bus address instead
of the CPU physical address before calling
dw_pcie_prog_outbound_atu().

But what about other callers of dw_pcie_prog_outbound_atu()?  Don't
all of them need to use the intermediate bus address?

Maybe struct dw_pcie_ob_atu_cfg.cpu_addr should be renamed since it is
not necessarily a CPU physical address?

> +	if (pci->ops && pci->ops->cpu_addr_fixup) {
> +		/*
> +		 * If the parent 'ranges' property in DT correctly describes
> +		 * the address translation, cpu_addr_fixup() callback is not
> +		 * needed.
> +		 */
> +		dev_warn_once(pci->dev, "cpu_addr_fixup() usage detected. Please fix DT!\n");
> +	}

I kinda wish this warning were in a separate patch because it will be
a little cleaner if we ever want to revert or remove the warning.

  parent reply	other threads:[~2025-01-16 23:14 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-19 19:44 [PATCH v8 0/7] PCI: dwc: opitimaze RC Host/EP pci_fixup_addr() Frank Li
2024-11-19 19:44 ` [PATCH v8 1/7] of: address: Add parent_bus_addr to struct of_pci_range Frank Li
2024-11-19 19:44 ` [PATCH v8 2/7] PCI: dwc: Use devicetree 'ranges' property to get rid of cpu_addr_fixup() callback Frank Li
2024-11-24 14:33   ` Manivannan Sadhasivam
2025-01-16  1:47     ` Krzysztof Wilczyński
2025-01-16  1:56       ` Frank Li
2025-01-16 23:13   ` Bjorn Helgaas [this message]
2025-01-16 23:29     ` Bjorn Helgaas
2025-01-17 15:42       ` Frank Li
2025-01-23 15:21         ` Frank Li
2025-01-23 19:04           ` Bjorn Helgaas
2025-01-23 19:15             ` Frank Li
2025-01-27 15:24               ` Niklas Cassel
2025-01-23 19:09         ` Bjorn Helgaas
2025-01-17 15:50     ` Frank Li
2024-11-19 19:44 ` [PATCH v8 3/7] PCI: dwc: ep: Add bus_addr_base for outbound window Frank Li
2025-01-16 15:32   ` Bjorn Helgaas
2025-01-16 18:04     ` Frank Li
2025-01-16 19:45       ` Bjorn Helgaas
2025-01-16 20:02         ` Frank Li
2025-01-16 22:49           ` Bjorn Helgaas
2025-01-17 14:35             ` Manivannan Sadhasivam
2025-01-17 15:17               ` Frank Li
2024-11-19 19:44 ` [PATCH v8 4/7] PCI: imx6: Remove cpu_addr_fixup() Frank Li
2024-11-19 19:44 ` [PATCH v8 5/7] dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep Frank Li
2024-11-19 19:44 ` [PATCH v8 6/7] PCI: imx6: Pass correct sub mode when calling phy_set_mode_ext() Frank Li
2024-11-19 19:44 ` [PATCH v8 7/7] PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support Frank Li
2024-11-24 14:38 ` [PATCH v8 0/7] PCI: dwc: opitimaze RC Host/EP pci_fixup_addr() Manivannan Sadhasivam
2024-12-10 22:16   ` Frank Li
2024-12-19 19:55     ` Frank Li
2025-01-06 17:14       ` Frank Li
2025-01-07 17:59         ` Frank Li
2025-01-16  1:56         ` Krzysztof Wilczyński
2025-01-15 11:42 ` Krzysztof Wilczyński

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