From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 660E4196; Tue, 21 Jan 2025 13:17:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737465462; cv=none; b=ZGoQJDqjkWu4D/fuUzHwerCpBe5dx/KShNGhsBD1TYX4z2va/AlIuQG0OCXeI6/m8Efi2TDOtNQXohsw+Emb4dbJOyWK9JOoDRnSU20UiFA3dIzfa0s0wQkAlcRC7ZLgAiuIUguS41WP9TFl53DfTTfugsHu5lt5q7Zqi1bSnz4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737465462; c=relaxed/simple; bh=PyMyepQmOdRuzXddw1qE2FlaKeXSd3MmvLlHwE88UKs=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DDUDNoX/qF8vJh6c/RB3k87ErqdOSS6h+53+/RmNUTftcz903NmBzCego6liMynjoy/+oYrVUBBNLRBJlAITjgsH63m7bgPRNwLd5ThXjQSkffbyarFT5twsQa9SWEdeny84FjoVZthEGcWlm1GTTwTKp022v1F8JSM9BjlZ+oU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=TNTNMZF5; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="TNTNMZF5" Received: by mail.gandi.net (Postfix) with ESMTPSA id E8AAC1C000E; Tue, 21 Jan 2025 13:17:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737465457; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lE9ukk/VXHGDjSc+qLMUCRMXuWtuucO2/B4Z5t1Tgpo=; b=TNTNMZF5Pn/+YxXwDMkaY1a81PhSSuG7MtXztSCFNzqqQHsvhdOQpIO5LUuBNfsxlOfeVn 3dvxnNhdreayztRnkQGdLI4ysUmHCsNv48m4haAWOwMxN4lagRYlL0YV02nogWy/xrjVwd oklk8cLfd+a88IkulEjOXXDOlXnr+Pl0Y0KQLDiAOYCs7WMik0wMwt5+/2DX0GBz2ZiCVS 2sLpiqz00K7VnaI7yhZa3hP6QTEvS/F5NvyD6PDYBLkIMO2syadr5pX0ABAFSHezMj93Fm 1k9jgaAqfG/pXm1wCu2aDaO5IJZTRoLa3w1tOqhF0fATo7JxqWinB8YIcNEcUA== Date: Tue, 21 Jan 2025 14:17:34 +0100 From: Maxime Chevallier To: Yijie Yang Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Maxime Coquelin , Alexandre Torgue , Bjorn Andersson , Konrad Dybcio , Richard Cochran , , , , , , Subject: Re: [PATCH v3 2/4] net: stmmac: dwmac-qcom-ethqos: Mask PHY mode if configured with rgmii-id Message-ID: <20250121141734.164ef891@device-291.home> In-Reply-To: <20250121-dts_qcs615-v3-2-fa4496950d8a@quicinc.com> References: <20250121-dts_qcs615-v3-0-fa4496950d8a@quicinc.com> <20250121-dts_qcs615-v3-2-fa4496950d8a@quicinc.com> Organization: Bootlin X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-GND-Sasl: maxime.chevallier@bootlin.com Hi, On Tue, 21 Jan 2025 15:54:54 +0800 Yijie Yang wrote: > The Qualcomm board always chooses the MAC to provide the delay instead of > the PHY, which is completely opposite to the suggestion of the Linux > kernel. The usage of phy-mode in legacy DTS was also incorrect. Change the > phy_mode passed from the DTS to the driver from PHY_INTERFACE_MODE_RGMII_ID > to PHY_INTERFACE_MODE_RGMII to ensure correct operation and adherence to > the definition. > To address the ABI compatibility issue between the kernel and DTS caused by > this change, handle the compatible string 'qcom,qcs404-evb-4000' in the > code, as it is the only legacy board that mistakenly uses the 'rgmii' > phy-mode. > > Signed-off-by: Yijie Yang > --- > .../net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > index 2a5b38723635b5ef9233ca4709e99dd5ddf06b77..e228a62723e221d58d8c4f104109e0dcf682d06d 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c > @@ -401,14 +401,11 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) > static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) > { > struct device *dev = ðqos->pdev->dev; > - int phase_shift; > + int phase_shift = 0; > int loopback; > > /* Determine if the PHY adds a 2 ns TX delay or the MAC handles it */ > - if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID || > - ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID) > - phase_shift = 0; > - else > + if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID) > phase_shift = RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN; So this looks like a driver modification to deal with errors in devicetree, and these modifications don't seem to be correct. You should set RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN (i.e. adding a delay n the TX line) when the PHY does not add internal delays on that line (so, when the mode is rgmii or rgmii-rxid. The previous logic looks correct in that regard. Can you elaborate a bit more on the issue you are seeing ? On what hardware is this happening ? What's the RGMII setup used (i.e. which PHY, which mode, is there any delay lines on the PCB ?) Thanks, Maxime