* [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure
@ 2025-01-14 5:11 Bjorn Andersson
2025-01-14 5:11 ` [PATCH v3 01/12] dt-bindings: usb: snps,dwc3: Split core description Bjorn Andersson
` (13 more replies)
0 siblings, 14 replies; 27+ messages in thread
From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan,
Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio,
Frank Li
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Bjorn Andersson
The USB IP-block found in most Qualcomm platforms is modelled in the
Linux kernel as 3 different independent device drivers, but as shown by
the already existing layering violations in the Qualcomm glue driver
they can not be operated independently.
With the current implementation, the glue driver registers the core and
has no way to know when this is done. As a result, e.g. the suspend
callbacks needs to guard against NULL pointer dereferences when trying
to peek into the struct dwc3 found in the drvdata of the child.
Missing from the upstream Qualcomm USB support is proper handling of
role switching, in which the glue needs to be notified upon DRD mode
changes. Several attempts has been made through the years to register
callbacks etc, but they always fall short when it comes to handling of
the core's probe deferral on resources etc.
Furhtermore, the DeviceTree binding is a direct representation of the
Linux driver model, and doesn't necessarily describe "the USB IP-block".
This series therefor attempts to flatten the driver split, and operate
the glue and core out of the same platform_device instance. And in order
to do this, the DeviceTree representation of the IP block is flattened.
To avoid littering the dwc3-qcom driver with the migration code - which
we should be able to drop again in a LTS or two - this is now placed in
drivers/of/overlays.
A patch to convert a single platform - sc8280xp - is included in the
series. The broader conversion will be submitted in a follow up series.
---
Changes in v3:
- Replaced the handcoded migration logic of compatible, reg, interrupts,
phys with overlays.
- Move the migration logic (and overlays) to a new drivers/of/overlays
directory and apply this at postcore, so that it takes effect prior to
the relevant platform_devices are created
- struct dwc3 is embedded in the glue context, rather than having a
separate object allocated
- The hack of using of_address_to_resource() to avoid platform_resource
being stale is removed (thanks to applying migration at postcore)
- Link to v2: https://lore.kernel.org/r/20240811-dwc3-refactor-v2-0-91f370d61ad2@quicinc.com
Changes in v2:
- Rewrite after ACPI removal, multiport support and interrupt fixes
- Completely changed strategy for DeviceTree binding, as previous idea
of using snps,dwc3 as a generic fallback required unreasonable changes
to that binding.
- Abandoned idea of supporting both flattened and unflattened device
model in the one driver. As Johan pointed out, it will leave the race
condition holes and will make the code harder to understand.
Furthermore, the role switching logic that we intend to introduce
following this would have depended on the user updating their
DeviceTree blobs.
- Per above, introduced the dynamic DeviceTree rewrite
- Link to v1: https://lore.kernel.org/all/20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com/
---
Bjorn Andersson (12):
dt-bindings: usb: snps,dwc3: Split core description
dt-bindings: usb: Introduce qcom,snps-dwc3
of: dynamic: Add of_changeset_add_prop_copy()
of: overlays: Introduce dwc3 flattening overlay
of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays
of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays
of: overlays: dwc3-flattening: Provide overlay symbols
usb: dwc3: core: Expose core driver as library
usb: dwc3: core: Don't touch resets and clocks
usb: dwc3: qcom: Don't rely on drvdata during probe
usb: dwc3: qcom: Transition to flattened model
arm64: dts: qcom: sc8280x: Flatten the USB nodes
.../devicetree/bindings/usb/qcom,dwc3.yaml | 13 +-
.../devicetree/bindings/usb/qcom,snps-dwc3.yaml | 618 ++++++++
.../devicetree/bindings/usb/snps,dwc3-common.yaml | 415 ++++++
.../devicetree/bindings/usb/snps,dwc3.yaml | 391 +----
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +-
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +-
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +-
.../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts | 10 +-
.../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 11 +-
.../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 10 +-
.../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 18 +-
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 157 +-
drivers/of/Kconfig | 2 +
drivers/of/Makefile | 2 +
drivers/of/dynamic.c | 20 +
drivers/of/overlays/Kconfig | 15 +
drivers/of/overlays/Makefile | 3 +
drivers/of/overlays/dwc3-flattening/Makefile | 94 ++
.../of/overlays/dwc3-flattening/dwc3-flattening.c | 1552 ++++++++++++++++++++
.../of/overlays/dwc3-flattening/dwc3-flattening.h | 188 +++
.../overlays/dwc3-flattening/dwc3-qcom_apq8094.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_apq8096.dts | 60 +
.../dwc3-qcom_apq8096_inforce_ifc6640.dts | 58 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts | 36 +
.../dwc3-qcom_ipq4018_8dev_jalapeno.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts | 28 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts | 58 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts | 54 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts | 40 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts | 58 +
.../overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts | 29 +
.../overlays/dwc3-flattening/dwc3-qcom_msm8953.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_msm8992.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_msm8994.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_msm8996.dts | 58 +
.../dwc3-qcom_msm8996_oneplus_oneplus3.dts | 56 +
.../dwc3-qcom_msm8996_oneplus_oneplus3t.dts | 56 +
.../dwc3-qcom_msm8996_sony_dora_row.dts | 57 +
.../dwc3-qcom_msm8996_sony_kagura_row.dts | 57 +
.../dwc3-qcom_msm8996_sony_keyaki_row.dts | 57 +
.../dwc3-qcom_msm8996_xiaomi_gemini.dts | 56 +
.../dwc3-qcom_msm8996_xiaomi_natrium.dts | 56 +
.../dwc3-qcom_msm8996_xiaomi_scorpio.dts | 56 +
.../overlays/dwc3-flattening/dwc3-qcom_msm8998.dts | 34 +
.../dwc3-qcom_msm8998_fxtec_pro1.dts | 35 +
.../dwc3-qcom_msm8998_oneplus_cheeseburger.dts | 32 +
.../dwc3-qcom_msm8998_oneplus_dumpling.dts | 32 +
.../dwc3-qcom_msm8998_sony_xperia_lilac.dts | 35 +
.../dwc3-qcom_msm8998_sony_xperia_maple.dts | 35 +
.../dwc3-qcom_msm8998_sony_xperia_poplar.dts | 35 +
.../dwc3-qcom_msm8998_xiaomi_sagit.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts | 63 +
.../overlays/dwc3-flattening/dwc3-qcom_qcs404.dts | 56 +
.../overlays/dwc3-flattening/dwc3-qcom_qcs615.dts | 62 +
.../overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts | 62 +
.../overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_qru1000.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts | 71 +
.../overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts | 129 ++
.../overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts | 90 ++
.../dwc3-flattening/dwc3-qcom_sar2130p.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sc7180.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sc7280.dts | 63 +
.../overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts | 109 ++
.../dwc3-flattening/dwc3-qcom_sc8280xp.dts | 129 ++
.../dwc3-qcom_sc8280xp_microsoft_blackrock.dts | 121 ++
.../overlays/dwc3-flattening/dwc3-qcom_sda660.dts | 59 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm450.dts | 33 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm630.dts | 57 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm632.dts | 32 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm636.dts | 59 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm660.dts | 57 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm670.dts | 36 +
.../overlays/dwc3-flattening/dwc3-qcom_sdm845.dts | 64 +
.../dwc3-qcom_sdm845_lenovo_yoga_c630.dts | 67 +
.../dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts | 67 +
.../dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts | 67 +
.../dwc3-qcom_sdm845_qcom_sdm845_mtp.dts | 67 +
.../dwc3-qcom_sdm845_samsung_starqltechn.dts | 67 +
.../dwc3-qcom_sdm845_samsung_w737.dts | 67 +
.../dwc3-qcom_sdm845_shift_axolotl.dts | 67 +
.../dwc3-qcom_sdm845_thundercomm_db845c.dts | 67 +
.../dwc3-qcom_sdm845_xiaomi_beryllium.dts | 67 +
.../dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts | 67 +
.../overlays/dwc3-flattening/dwc3-qcom_sdx55.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_sdx65.dts | 38 +
.../overlays/dwc3-flattening/dwc3-qcom_sdx75.dts | 36 +
.../overlays/dwc3-flattening/dwc3-qcom_sm4250.dts | 37 +
.../dwc3-qcom_sm4250_oneplus_billie2.dts | 35 +
.../overlays/dwc3-flattening/dwc3-qcom_sm6115.dts | 37 +
.../dwc3-qcom_sm6115_lenovo_j606f.dts | 35 +
.../overlays/dwc3-flattening/dwc3-qcom_sm6125.dts | 36 +
.../overlays/dwc3-flattening/dwc3-qcom_sm6350.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sm6375.dts | 36 +
.../overlays/dwc3-flattening/dwc3-qcom_sm7125.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sm7225.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sm7325.dts | 60 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8150.dts | 67 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8250.dts | 67 +
.../dwc3-qcom_sm8250_xiaomi_elish.dts | 64 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8350.dts | 67 +
.../dwc3-qcom_sm8350_microsoft_surface_duo2.dts | 67 +
.../dwc3-qcom_sm8350_qcom_sm8350_hdk.dts | 69 +
.../dwc3-qcom_sm8350_qcom_sm8350_mtp.dts | 67 +
.../dwc3-qcom_sm8350_sony_pdx214_generic.dts | 67 +
.../dwc3-qcom_sm8350_sony_pdx215_generic.dts | 67 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8450.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8550.dts | 39 +
.../overlays/dwc3-flattening/dwc3-qcom_sm8650.dts | 39 +
.../dwc3-flattening/dwc3-qcom_x1e80100.dts | 153 ++
.../dwc3-qcom_x1e80100_hp_omnibook_x14.dts | 149 ++
drivers/usb/dwc3/core.c | 167 ++-
drivers/usb/dwc3/dwc3-qcom.c | 149 +-
drivers/usb/dwc3/glue.h | 22 +
include/linux/of.h | 3 +
118 files changed, 8389 insertions(+), 670 deletions(-)
---
base-commit: 6ecd20965bdc21b265a0671ccf36d9ad8043f5ab
change-id: 20231016-dwc3-refactor-931e3b08a8b9
Best regards,
--
Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH v3 01/12] dt-bindings: usb: snps,dwc3: Split core description 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 02/12] dt-bindings: usb: Introduce qcom,snps-dwc3 Bjorn Andersson ` (12 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The Synopsys DWC3 core is found either as a standalone block or integrated with vendor glue logic. So far the latter has been described as two separate IP blocks in DeviceTree, but the two parts are not separate. In the case where the core is integrated together with vendor glue, resources such as clock and resets are often customized by the vendor, such that the standard properties doesn't make sense. Split the snps,dwc3 binding in a description of the core properties and the standard "glue" properties, in order to allow vendor bindings to inherit the core properties. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- .../devicetree/bindings/usb/snps,dwc3-common.yaml | 415 +++++++++++++++++++++ .../devicetree/bindings/usb/snps,dwc3.yaml | 391 +------------------ 2 files changed, 416 insertions(+), 390 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml new file mode 100644 index 000000000000..c956053fd036 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml @@ -0,0 +1,415 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare USB3 Controller common properties + +maintainers: + - Felipe Balbi <balbi@kernel.org> + +description: + Defines the properties of the DWC3 core as being embedded in either an + vendor-specific implementation or as a standalone component. + +allOf: + - $ref: usb-drd.yaml# + - if: + properties: + dr_mode: + const: peripheral + + required: + - dr_mode + then: + $ref: usb.yaml# + else: + $ref: usb-xhci.yaml# + +properties: + extcon: + maxItems: 1 + deprecated: true + + usb-phy: + minItems: 1 + items: + - description: USB2/HS PHY + - description: USB3/SS PHY + + phys: + minItems: 1 + maxItems: 19 + + phy-names: + minItems: 1 + maxItems: 19 + oneOf: + - items: + enum: [ usb2-phy, usb3-phy ] + - items: + pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$" + + snps,usb2-lpm-disable: + description: Indicate if we don't want to enable USB2 HW LPM for host + mode. + type: boolean + + snps,usb3_lpm_capable: + description: Determines if platform is USB3 LPM capable + type: boolean + + snps,usb2-gadget-lpm-disable: + description: Indicate if we don't want to enable USB2 HW LPM for gadget + mode. + type: boolean + + snps,dis-start-transfer-quirk: + description: + When set, disable isoc START TRANSFER command failure SW work-around + for DWC_usb31 version 1.70a-ea06 and prior. + type: boolean + + snps,disable_scramble_quirk: + description: + True when SW should disable data scrambling. Only really useful for FPGA + builds. + type: boolean + + snps,has-lpm-erratum: + description: True when DWC3 was configured with LPM Erratum enabled + type: boolean + + snps,lpm-nyet-threshold: + description: LPM NYET threshold + $ref: /schemas/types.yaml#/definitions/uint8 + + snps,u2exit_lfps_quirk: + description: Set if we want to enable u2exit lfps quirk + type: boolean + + snps,u2ss_inp3_quirk: + description: Set if we enable P3 OK for U2/SS Inactive quirk + type: boolean + + snps,req_p1p2p3_quirk: + description: + When set, the core will always request for P1/P2/P3 transition sequence. + type: boolean + + snps,del_p1p2p3_quirk: + description: + When set core will delay P1/P2/P3 until a certain amount of 8B10B errors + occur. + type: boolean + + snps,del_phy_power_chg_quirk: + description: When set core will delay PHY power change from P0 to P1/P2/P3. + type: boolean + + snps,lfps_filter_quirk: + description: When set core will filter LFPS reception. + type: boolean + + snps,rx_detect_poll_quirk: + description: + when set core will disable a 400us delay to start Polling LFPS after + RX.Detect. + type: boolean + + snps,tx_de_emphasis_quirk: + description: When set core will set Tx de-emphasis value + type: boolean + + snps,tx_de_emphasis: + description: + The value driven to the PHY is controlled by the LTSSM during USB3 + Compliance mode. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: + - 0 # -6dB de-emphasis + - 1 # -3.5dB de-emphasis + - 2 # No de-emphasis + + snps,dis_u3_susphy_quirk: + description: When set core will disable USB3 suspend phy + type: boolean + + snps,dis_u2_susphy_quirk: + description: When set core will disable USB2 suspend phy + type: boolean + + snps,dis_enblslpm_quirk: + description: + When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal + to the PHY. + type: boolean + + snps,dis-u1-entry-quirk: + description: Set if link entering into U1 needs to be disabled + type: boolean + + snps,dis-u2-entry-quirk: + description: Set if link entering into U2 needs to be disabled + type: boolean + + snps,dis_rxdet_inp3_quirk: + description: + When set core will disable receiver detection in PHY P3 power state. + type: boolean + + snps,dis-u2-freeclk-exists-quirk: + description: + When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 + PHY doesn't provide a free-running PHY clock. + type: boolean + + snps,dis-del-phy-power-chg-quirk: + description: + When set core will change PHY power from P0 to P1/P2/P3 without delay. + type: boolean + + snps,dis-tx-ipgap-linecheck-quirk: + description: When set, disable u2mac linestate check during HS transmit + type: boolean + + snps,parkmode-disable-ss-quirk: + description: + When set, all SuperSpeed bus instances in park mode are disabled. + type: boolean + + snps,parkmode-disable-hs-quirk: + description: + When set, all HighSpeed bus instances in park mode are disabled. + type: boolean + + snps,dis_metastability_quirk: + description: + When set, disable metastability workaround. CAUTION! Use only if you are + absolutely sure of it. + type: boolean + + snps,dis-split-quirk: + description: + When set, change the way URBs are handled by the driver. Needed to + avoid -EPROTO errors with usbhid on some devices (Hikey 970). + type: boolean + + snps,gfladj-refclk-lpm-sel-quirk: + description: + When set, run the SOF/ITP counter based on ref_clk. + type: boolean + + snps,resume-hs-terminations: + description: + Fix the issue of HS terminations CRC error on resume by enabling this + quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end + of resume. This option is to support certain legacy ULPI PHYs. + type: boolean + + snps,ulpi-ext-vbus-drv: + description: + Some ULPI USB PHY does not support internal VBUS supply, and driving + the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL + bit. When set, the xhci host will configure the USB2 PHY drives VBUS + with an external supply. + type: boolean + + snps,is-utmi-l1-suspend: + description: + True when DWC3 asserts output signal utmi_l1_suspend_n, false when + asserts utmi_sleep_n. + type: boolean + + snps,hird-threshold: + description: HIRD threshold + $ref: /schemas/types.yaml#/definitions/uint8 + + snps,hsphy_interface: + description: + High-Speed PHY interface selection between UTMI+ and ULPI when the + DWC_USB3_HSPHY_INTERFACE has value 3. + $ref: /schemas/types.yaml#/definitions/string + enum: [utmi, ulpi] + + snps,quirk-frame-length-adjustment: + description: + Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame + length adjustment when the fladj_30mhz_sdbnd signal is invalid or + incorrect. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0x3f + + snps,ref-clock-period-ns: + description: + Value for REFCLKPER field of GUCTL register for reference clock period in + nanoseconds, when the hardware set default does not match the actual + clock. + + This binding is deprecated. Instead, provide an appropriate reference clock. + minimum: 8 + maximum: 62 + deprecated: true + + snps,rx-thr-num-pkt: + description: + USB RX packet threshold count. In host mode, this field specifies + the space that must be available in the RX FIFO before the core can + start the corresponding USB RX transaction (burst). + In device mode, this field specifies the space that must be + available in the RX FIFO before the core can send ERDY for a + flow-controlled endpoint. It is only used for SuperSpeed. + The valid values for this field are from 1 to 15. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,rx-max-burst: + description: + Max USB RX burst size. In host mode, this field specifies the + Maximum Bulk IN burst the DWC_usb3 core can perform. When the system + bus is slower than the USB, RX FIFO can overrun during a long burst. + You can program a smaller value to this field to limit the RX burst + size that the core can perform. It only applies to SS Bulk, + Isochronous, and Interrupt IN endpoints in the host mode. + In device mode, this field specifies the NUMP value that is sent in + ERDY for an OUT endpoint. + The valid values for this field are from 1 to 16. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-thr-num-pkt: + description: + USB TX packet threshold count. This field specifies the number of + packets that must be in the TXFIFO before the core can start + transmission for the corresponding USB transaction (burst). + This count is valid in both host and device modes. It is only used + for SuperSpeed operation. + Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,tx-max-burst: + description: + Max USB TX burst size. When the system bus is slower than the USB, + TX FIFO can underrun during a long burst. Program a smaller value + to this field to limit the TX burst size that the core can execute. + In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt + OUT endpoints. This value is not used in device mode. + Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,rx-thr-num-pkt-prd: + description: + Periodic ESS RX packet threshold count (host mode only). Set this and + snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.4) to enable periodic ESS RX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,rx-max-burst-prd: + description: + Max periodic ESS RX burst size (host mode only). Set this and + snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.4) to enable periodic ESS RX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-thr-num-pkt-prd: + description: + Periodic ESS TX packet threshold count (host mode only). Set this and + snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.3) to enable periodic ESS TX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-max-burst-prd: + description: + Max periodic ESS TX burst size (host mode only). Set this and + snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 + programming guide section 1.2.3) to enable periodic ESS TX threshold. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + tx-fifo-resize: + description: Determines if the TX fifos can be dynamically resized depending + on the number of IN endpoints used and if bursting is supported. This + may help improve bandwidth on platforms with higher system latencies, as + increased fifo space allows for the controller to prefetch data into its + internal memory. + type: boolean + + tx-fifo-max-num: + description: Specifies the max number of packets the txfifo resizing logic + can account for when higher endpoint bursting is used. (bMaxBurst > 6) The + higher the number, the more fifo space the txfifo resizing logic will + allocate for that endpoint. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 3 + + snps,incr-burst-type-adjustment: + description: + Value for INCR burst type of GSBUSCFG0 register, undefined length INCR + burst type enable and INCRx type. A single value means INCRX burst mode + enabled. If more than one value specified, undefined length INCR burst + type will be enabled with burst lengths utilized up to the maximum + of the values passed in this property. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + uniqueItems: true + items: + enum: [1, 4, 8, 16, 32, 64, 128, 256] + + num-hc-interrupters: + maximum: 8 + default: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + description: + This port is used with the 'usb-role-switch' property to connect the + dwc3 to type C connector. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Those ports should be used with any connector to the data bus of this + controller using the OF graph bindings specified if the "usb-role-switch" + property is used. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: High Speed (HS) data bus. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) data bus. + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enable USB remote wakeup. + +required: + - compatible + - reg + +additionalProperties: true +... + diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 1cd0ca90127d..4380bb6fa2f0 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -15,18 +15,7 @@ description: compatible string. allOf: - - $ref: usb-drd.yaml# - - if: - properties: - dr_mode: - const: peripheral - - required: - - dr_mode - then: - $ref: usb.yaml# - else: - $ref: usb-xhci.yaml# + - $ref: snps,dwc3-common.yaml# properties: compatible: @@ -70,32 +59,9 @@ properties: dma-coherent: true - extcon: - maxItems: 1 - deprecated: true - iommus: maxItems: 1 - usb-phy: - minItems: 1 - items: - - description: USB2/HS PHY - - description: USB3/SS PHY - - phys: - minItems: 1 - maxItems: 19 - - phy-names: - minItems: 1 - maxItems: 19 - oneOf: - - items: - enum: [ usb2-phy, usb3-phy ] - - items: - pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$" - power-domains: description: The DWC3 has 2 power-domains. The power management unit (PMU) and @@ -109,361 +75,6 @@ properties: resets: minItems: 1 - snps,usb2-lpm-disable: - description: Indicate if we don't want to enable USB2 HW LPM for host - mode. - type: boolean - - snps,usb3_lpm_capable: - description: Determines if platform is USB3 LPM capable - type: boolean - - snps,usb2-gadget-lpm-disable: - description: Indicate if we don't want to enable USB2 HW LPM for gadget - mode. - type: boolean - - snps,dis-start-transfer-quirk: - description: - When set, disable isoc START TRANSFER command failure SW work-around - for DWC_usb31 version 1.70a-ea06 and prior. - type: boolean - - snps,disable_scramble_quirk: - description: - True when SW should disable data scrambling. Only really useful for FPGA - builds. - type: boolean - - snps,has-lpm-erratum: - description: True when DWC3 was configured with LPM Erratum enabled - type: boolean - - snps,lpm-nyet-threshold: - description: LPM NYET threshold - $ref: /schemas/types.yaml#/definitions/uint8 - - snps,u2exit_lfps_quirk: - description: Set if we want to enable u2exit lfps quirk - type: boolean - - snps,u2ss_inp3_quirk: - description: Set if we enable P3 OK for U2/SS Inactive quirk - type: boolean - - snps,req_p1p2p3_quirk: - description: - When set, the core will always request for P1/P2/P3 transition sequence. - type: boolean - - snps,del_p1p2p3_quirk: - description: - When set core will delay P1/P2/P3 until a certain amount of 8B10B errors - occur. - type: boolean - - snps,del_phy_power_chg_quirk: - description: When set core will delay PHY power change from P0 to P1/P2/P3. - type: boolean - - snps,lfps_filter_quirk: - description: When set core will filter LFPS reception. - type: boolean - - snps,rx_detect_poll_quirk: - description: - when set core will disable a 400us delay to start Polling LFPS after - RX.Detect. - type: boolean - - snps,tx_de_emphasis_quirk: - description: When set core will set Tx de-emphasis value - type: boolean - - snps,tx_de_emphasis: - description: - The value driven to the PHY is controlled by the LTSSM during USB3 - Compliance mode. - $ref: /schemas/types.yaml#/definitions/uint8 - enum: - - 0 # -6dB de-emphasis - - 1 # -3.5dB de-emphasis - - 2 # No de-emphasis - - snps,dis_u3_susphy_quirk: - description: When set core will disable USB3 suspend phy - type: boolean - - snps,dis_u2_susphy_quirk: - description: When set core will disable USB2 suspend phy - type: boolean - - snps,dis_enblslpm_quirk: - description: - When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal - to the PHY. - type: boolean - - snps,dis-u1-entry-quirk: - description: Set if link entering into U1 needs to be disabled - type: boolean - - snps,dis-u2-entry-quirk: - description: Set if link entering into U2 needs to be disabled - type: boolean - - snps,dis_rxdet_inp3_quirk: - description: - When set core will disable receiver detection in PHY P3 power state. - type: boolean - - snps,dis-u2-freeclk-exists-quirk: - description: - When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 - PHY doesn't provide a free-running PHY clock. - type: boolean - - snps,dis-del-phy-power-chg-quirk: - description: - When set core will change PHY power from P0 to P1/P2/P3 without delay. - type: boolean - - snps,dis-tx-ipgap-linecheck-quirk: - description: When set, disable u2mac linestate check during HS transmit - type: boolean - - snps,parkmode-disable-ss-quirk: - description: - When set, all SuperSpeed bus instances in park mode are disabled. - type: boolean - - snps,parkmode-disable-hs-quirk: - description: - When set, all HighSpeed bus instances in park mode are disabled. - type: boolean - - snps,dis_metastability_quirk: - description: - When set, disable metastability workaround. CAUTION! Use only if you are - absolutely sure of it. - type: boolean - - snps,dis-split-quirk: - description: - When set, change the way URBs are handled by the driver. Needed to - avoid -EPROTO errors with usbhid on some devices (Hikey 970). - type: boolean - - snps,gfladj-refclk-lpm-sel-quirk: - description: - When set, run the SOF/ITP counter based on ref_clk. - type: boolean - - snps,resume-hs-terminations: - description: - Fix the issue of HS terminations CRC error on resume by enabling this - quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end - of resume. This option is to support certain legacy ULPI PHYs. - type: boolean - - snps,ulpi-ext-vbus-drv: - description: - Some ULPI USB PHY does not support internal VBUS supply, and driving - the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL - bit. When set, the xhci host will configure the USB2 PHY drives VBUS - with an external supply. - type: boolean - - snps,is-utmi-l1-suspend: - description: - True when DWC3 asserts output signal utmi_l1_suspend_n, false when - asserts utmi_sleep_n. - type: boolean - - snps,hird-threshold: - description: HIRD threshold - $ref: /schemas/types.yaml#/definitions/uint8 - - snps,hsphy_interface: - description: - High-Speed PHY interface selection between UTMI+ and ULPI when the - DWC_USB3_HSPHY_INTERFACE has value 3. - $ref: /schemas/types.yaml#/definitions/string - enum: [utmi, ulpi] - - snps,quirk-frame-length-adjustment: - description: - Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame - length adjustment when the fladj_30mhz_sdbnd signal is invalid or - incorrect. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 0x3f - - snps,ref-clock-period-ns: - description: - Value for REFCLKPER field of GUCTL register for reference clock period in - nanoseconds, when the hardware set default does not match the actual - clock. - - This binding is deprecated. Instead, provide an appropriate reference clock. - minimum: 8 - maximum: 62 - deprecated: true - - snps,rx-thr-num-pkt: - description: - USB RX packet threshold count. In host mode, this field specifies - the space that must be available in the RX FIFO before the core can - start the corresponding USB RX transaction (burst). - In device mode, this field specifies the space that must be - available in the RX FIFO before the core can send ERDY for a - flow-controlled endpoint. It is only used for SuperSpeed. - The valid values for this field are from 1 to 15. (DWC3 SuperSpeed - USB 3.0 Controller Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 15 - - snps,rx-max-burst: - description: - Max USB RX burst size. In host mode, this field specifies the - Maximum Bulk IN burst the DWC_usb3 core can perform. When the system - bus is slower than the USB, RX FIFO can overrun during a long burst. - You can program a smaller value to this field to limit the RX burst - size that the core can perform. It only applies to SS Bulk, - Isochronous, and Interrupt IN endpoints in the host mode. - In device mode, this field specifies the NUMP value that is sent in - ERDY for an OUT endpoint. - The valid values for this field are from 1 to 16. (DWC3 SuperSpeed - USB 3.0 Controller Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-thr-num-pkt: - description: - USB TX packet threshold count. This field specifies the number of - packets that must be in the TXFIFO before the core can start - transmission for the corresponding USB transaction (burst). - This count is valid in both host and device modes. It is only used - for SuperSpeed operation. - Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller - Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 15 - - snps,tx-max-burst: - description: - Max USB TX burst size. When the system bus is slower than the USB, - TX FIFO can underrun during a long burst. Program a smaller value - to this field to limit the TX burst size that the core can execute. - In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt - OUT endpoints. This value is not used in device mode. - Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller - Databook) - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,rx-thr-num-pkt-prd: - description: - Periodic ESS RX packet threshold count (host mode only). Set this and - snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.4) to enable periodic ESS RX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,rx-max-burst-prd: - description: - Max periodic ESS RX burst size (host mode only). Set this and - snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.4) to enable periodic ESS RX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-thr-num-pkt-prd: - description: - Periodic ESS TX packet threshold count (host mode only). Set this and - snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.3) to enable periodic ESS TX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - snps,tx-max-burst-prd: - description: - Max periodic ESS TX burst size (host mode only). Set this and - snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 - programming guide section 1.2.3) to enable periodic ESS TX threshold. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 1 - maximum: 16 - - tx-fifo-resize: - description: Determines if the TX fifos can be dynamically resized depending - on the number of IN endpoints used and if bursting is supported. This - may help improve bandwidth on platforms with higher system latencies, as - increased fifo space allows for the controller to prefetch data into its - internal memory. - type: boolean - - tx-fifo-max-num: - description: Specifies the max number of packets the txfifo resizing logic - can account for when higher endpoint bursting is used. (bMaxBurst > 6) The - higher the number, the more fifo space the txfifo resizing logic will - allocate for that endpoint. - $ref: /schemas/types.yaml#/definitions/uint8 - minimum: 3 - - snps,incr-burst-type-adjustment: - description: - Value for INCR burst type of GSBUSCFG0 register, undefined length INCR - burst type enable and INCRx type. A single value means INCRX burst mode - enabled. If more than one value specified, undefined length INCR burst - type will be enabled with burst lengths utilized up to the maximum - of the values passed in this property. - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 1 - maxItems: 8 - uniqueItems: true - items: - enum: [1, 4, 8, 16, 32, 64, 128, 256] - - num-hc-interrupters: - maximum: 8 - default: 1 - - port: - $ref: /schemas/graph.yaml#/properties/port - description: - This port is used with the 'usb-role-switch' property to connect the - dwc3 to type C connector. - - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: - Those ports should be used with any connector to the data bus of this - controller using the OF graph bindings specified if the "usb-role-switch" - property is used. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: High Speed (HS) data bus. - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: Super Speed (SS) data bus. - - wakeup-source: - $ref: /schemas/types.yaml#/definitions/flag - description: - Enable USB remote wakeup. - unevaluatedProperties: false required: -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 02/12] dt-bindings: usb: Introduce qcom,snps-dwc3 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 01/12] dt-bindings: usb: snps,dwc3: Split core description Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 03/12] of: dynamic: Add of_changeset_add_prop_copy() Bjorn Andersson ` (11 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The Qualcomm USB glue is not separate of the Synopsys DWC3 core and several of the snps,dwc3 properties (such as clocks and reset) conflicts in expectation with the Qualcomm integration. Using the newly split out Synopsys DWC3 core properties, describe the Qualcomm USB block in a single block. The new binding is a copy of qcom,dwc3 with the needed modifications. It would have been convenient to retain the two structures with the same compatibles, but as there exist no way to select a binding based on the absence of a subnode/patternProperty, a new generic compatible is introduced to describe this binding. To avoid redefining all the platform-specific compatibles, "select" is used to tell the DeviceTree validator which binding to use solely on the generic compatible. (Otherwise if the specific compatible matches during validation, the generic one must match as well) Mark qcom,dwc3 deprecated, to favor expressing future platforms using the new combined binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 13 +- .../devicetree/bindings/usb/qcom,snps-dwc3.yaml | 618 +++++++++++++++++++++ 2 files changed, 630 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 8fd02e8aaaa5..09907e492563 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -4,11 +4,22 @@ $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm SuperSpeed DWC3 USB SoC controller +title: Legacy Qualcomm SuperSpeed DWC3 USB SoC controller maintainers: - Wesley Cheng <quic_wcheng@quicinc.com> +# Use the combined qcom,snps-dwc3 instead +deprecated: true + +select: + properties: + compatible: + contains: + const: qcom,dwc3 + required: + - compatible + properties: compatible: items: diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml new file mode 100644 index 000000000000..e0369964d495 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -0,0 +1,618 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SuperSpeed DWC3 USB SoC controller + +maintainers: + - Wesley Cheng <quic_wcheng@quicinc.com> + +description: + Describes the Qualcomm USB block, based on Synopsys DWC3. + +select: + properties: + compatible: + contains: + const: qcom,snps-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + - qcom,x1e80100-dwc3 + - const: qcom,snps-dwc3 + + reg: + description: Offset and length of register set for QSCRATCH wrapper + maxItems: 1 + + power-domains: + description: specifies a phandle to PM domain provider node + maxItems: 1 + + required-opps: + maxItems: 1 + + clocks: + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + + iommus: + maxItems: 1 + + resets: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: usb-ddr + - const: apps-usb + + interrupts: + description: | + Different types of interrupts are used based on HS PHY used on target: + - dwc_usb3: Core DWC3 interrupt + - pwr_event: Used for wakeup based on other power events. + - hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is + hs_phy_irq which is not triggered by default and its + functionality is mutually exclusive to that of + {dp/dm}_hs_phy_irq and qusb2_phy_irq. + - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and + expose only a single IRQ whose behavior can be modified + by the QUSB2PHY_INTR_CTRL register. The required DPSE/ + DMSE configuration is done in QUSB2PHY_INTR_CTRL register + of PHY address space. + - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/ + DM pads of the SoC. These are used for wakeup + only on SoCs with non-QUSB2 targets with + exception of SDM670/SDM845/SM6350. + - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. + minItems: 3 + maxItems: 19 + + interrupt-names: + minItems: 3 + maxItems: 19 + + qcom,select-utmi-as-pipe-clk: + description: + If present, disable USB3 pipe_clk requirement. + Used when dwc3 operates without SSPHY and only + HS/FS/LS modes are supported. + type: boolean + + wakeup-source: true + +# Required child node: + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +allOf: + - $ref: snps,dwc3-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcs8300-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + - qcom,qdu1000-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,x1e80100-dwc3 + - qcom,x1e80100-dwc3-mp + then: + properties: + clocks: + maxItems: 9 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: noc_aggr + - const: noc_aggr_north + - const: noc_aggr_south + - const: noc_sys + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 4 + maxItems: 5 + clock-names: + oneOf: + - items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-dwc3 + - qcom,qcs615-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8074-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8998-dwc3 + then: + properties: + interrupts: + minItems: 3 + maxItems: 4 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-dwc3 + - qcom,qcs404-dwc3 + - qcom,sdm660-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + then: + properties: + interrupts: + minItems: 4 + maxItems: 5 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5332-dwc3 + then: + properties: + interrupts: + maxItems: 4 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,x1e80100-dwc3 + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq8064-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + interrupts: + minItems: 5 + maxItems: 6 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: hs_phy_irq + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-dwc3-mp + - qcom,x1e80100-dwc3-mp + then: + properties: + interrupts: + minItems: 11 + maxItems: 11 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: hs_phy_1 + - const: hs_phy_2 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: ss_phy_1 + - const: ss_phy_2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + minItems: 19 + maxItems: 19 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: hs_phy_1 + - const: hs_phy_2 + - const: hs_phy_3 + - const: hs_phy_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb@a600000 { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0x100000>; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>, + <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>, + <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + iommus = <&apps_smmu 0x740 0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; +... -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 03/12] of: dynamic: Add of_changeset_add_prop_copy() 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 01/12] dt-bindings: usb: snps,dwc3: Split core description Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 02/12] dt-bindings: usb: Introduce qcom,snps-dwc3 Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 04/12] of: overlays: Introduce dwc3 flattening overlay Bjorn Andersson ` (10 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson When implementing migration between bindings with different structure, properties might move from one node to another. Introduce a helper function to do this, releaving the caller from having to care about the datatype of the property and/or peek into the struct property. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/of/dynamic.c | 20 ++++++++++++++++++++ include/linux/of.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index 0aba760f7577..e4d7ff53a892 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -1073,6 +1073,26 @@ int of_changeset_add_prop_bool(struct of_changeset *ocs, struct device_node *np, } EXPORT_SYMBOL_GPL(of_changeset_add_prop_bool); +/** + * of_changeset_add_prop_copy() - Add a property with name and value copied + * from an existing property, to a changeset. + * + * @ocs: changeset pointer + * @np: device node pointer + * @prop: existing property to copy + * + * Create a new property with name and value copied from a provided property, + * to a changeset. + * + * Return: 0 on success, a negative error value in case of an error. + */ +int of_changeset_add_prop_copy(struct of_changeset *ocs, struct device_node *np, + const struct property *prop) +{ + return of_changeset_add_prop_helper(ocs, np, prop); +} +EXPORT_SYMBOL_GPL(of_changeset_add_prop_copy); + static int of_changeset_update_prop_helper(struct of_changeset *ocs, struct device_node *np, const struct property *pp) diff --git a/include/linux/of.h b/include/linux/of.h index f921786cb8ac..6a9bcdf9d629 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1667,6 +1667,9 @@ int of_changeset_update_prop_string(struct of_changeset *ocs, int of_changeset_add_prop_bool(struct of_changeset *ocs, struct device_node *np, const char *prop_name); +int of_changeset_add_prop_copy(struct of_changeset *ocs, struct device_node *np, + const struct property *prop); + #else /* CONFIG_OF_DYNAMIC */ static inline int of_reconfig_notifier_register(struct notifier_block *nb) { -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 04/12] of: overlays: Introduce dwc3 flattening overlay 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (2 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 03/12] of: dynamic: Add of_changeset_add_prop_copy() Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 05/12] of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays Bjorn Andersson ` (9 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The Synopsys DWC3 core is often found together with vendor glue logic. While being a single piece of hardware this has been expressed as two independent (although with parent/child relationship) nodes in DeviceTree - but they are not separate components, and the separation prevents implementation of certain features (such as role switching, when this involved both parts). The newly introduced qcom,snps-dwc3 binding changes this representation of the Qualcomm implementation to a single node, and in an upcoming change the implementation follows suite - combining the two separate drivers into a single device instance. In order to avoid two separate implementations of the Qualcomm DWC3 glue driver, and/or continue to live with the documented race conditions in the driver, the driver will be changed to only operate on the new - flattened - DeviceTree binding. As both the Qualcomm glue driver and the dwc3 core driver is parsing DeviceTree, the only sensible way to handle this - while maintaining backwards compatibility with exiting DeviceTree blobs, is to convert the representation at runtime. The conversion between qcom,dwc3 and qcom,snps-dwc3 is performed here in the form of an independent overlay-based mechanism, to avoid sprinkling DeviceTree-translation code into the glue driver, which over time is expected to allow hiding some internals of the OF-code. But this should also make it suitable for other (than Qualcomm) vendors to reuse the translation logic as they flatten their glue/dwc3 implementations. The migration is implemented using two steps: 1) SoC/board integration is migrated using embedded overlays, which are applied based on machine compatible matching. This handles the complex cases such as merging "reg" and "interrupt" properties. 2) Standard snps properties, which might be board-specific, are migrated using of_changeset logic. Notably the of_graph is migrated this way, to avoid having to provide overlays for every single board dtb out there. The migration code can only be enabled once the dwc3 glue driver supports the new binding, but in order to avoid having to support both bindings in the dwc3 glue a kill-switch is left in place, to be removed at the instant the driver is converted. The newly introduced Kconfig option is defaulted to follow USB_DWC3_QCOM in order to maximize the chances of people not losing USB functionality in defconfig or distro builds. Over time this can probably be phased out, followed by the overlay solution itself. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/of/Kconfig | 2 + drivers/of/Makefile | 2 + drivers/of/overlays/Kconfig | 15 ++ drivers/of/overlays/Makefile | 3 + drivers/of/overlays/dwc3-flattening/Makefile | 4 + .../of/overlays/dwc3-flattening/dwc3-flattening.c | 160 +++++++++++++++++++++ .../of/overlays/dwc3-flattening/dwc3-flattening.h | 7 + 7 files changed, 193 insertions(+) diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index 50697cc3b07e..b5f3cd69bad9 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -126,4 +126,6 @@ config OF_OVERLAY_KUNIT_TEST config OF_NUMA bool +source "drivers/of/overlays/Kconfig" + endif # OF diff --git a/drivers/of/Makefile b/drivers/of/Makefile index 379a0afcbdc0..1ff9d0befb38 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -25,3 +25,5 @@ obj-$(CONFIG_OF_OVERLAY_KUNIT_TEST) += overlay-test.o overlay-test-y := overlay_test.o kunit_overlay_test.dtbo.o obj-$(CONFIG_OF_UNITTEST) += unittest-data/ + +obj-y += overlays/ diff --git a/drivers/of/overlays/Kconfig b/drivers/of/overlays/Kconfig new file mode 100644 index 000000000000..8f07e6db3dc3 --- /dev/null +++ b/drivers/of/overlays/Kconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0 + +config OF_OVERLAYS_DWC3_FLATTENING + bool "DeviceTree overlay for migrating DWC3 glue bindings" + depends on OF + select OF_DYNAMIC + select OF_OVERLAY + default USB_DWC3_QCOM + help + This option enables the migration of the loaded DeviceTree from the + binding that splits DWC3 representation in glue and core nodes (such + as "qcom,dwc3"), to the unified binding ("qcom,snps-dwc3"). + + Enable this if you intend to boot the Linux kernel on a system with a + DeviceTree blob using the non-flattened binding. diff --git a/drivers/of/overlays/Makefile b/drivers/of/overlays/Makefile new file mode 100644 index 000000000000..44dd5c09ac8d --- /dev/null +++ b/drivers/of/overlays/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening/ diff --git a/drivers/of/overlays/dwc3-flattening/Makefile b/drivers/of/overlays/dwc3-flattening/Makefile new file mode 100644 index 000000000000..78ed59517887 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening-overlay.o +dwc3-flattening-overlay-y += dwc3-flattening.o diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c new file mode 100644 index 000000000000..fe8e42627fe3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define pr_fmt(fmt) "dwc3-flattening: " fmt + +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/slab.h> +#include "dwc3-flattening.h" + +struct dwc3_overlay_symbol { + const char *symbol; + const char *path; +}; + +struct dwc3_overlay_data { + const void *fdt; + const void *end; + const char *migrate_match; +}; + +static const struct of_device_id dwc3_flatten_of_match[] = { + {} +}; + +static int dwc3_flattening_copy_snps_properties(struct of_changeset *ocs, + struct device_node *np, + struct device_node *dwc3) +{ + struct property *prop; + int ret = 0; + + for_each_property_of_node(dwc3, prop) { + if (strncmp(prop->name, "snps,", 5) && + strcmp(prop->name, "usb-role-switch") && + strcmp(prop->name, "dr_mode") && + strcmp(prop->name, "tx-fifo-resize") && + strcmp(prop->name, "maximum-speed")) + continue; + + ret = of_changeset_add_prop_copy(ocs, np, prop); + if (ret) + break; + } + + return ret; +} + +static int dwc3_flattening_copy_ports_tree(struct of_changeset *ocs, + struct device_node *new_parent, + struct device_node *old_node) +{ + struct device_node *new_node; + struct property *prop; + int ret; + + new_node = of_changeset_create_node(ocs, new_parent, old_node->full_name); + if (!new_node) + return -ENOMEM; + + for_each_property_of_node(old_node, prop) { + of_changeset_add_prop_copy(ocs, new_node, prop); + } + + for_each_child_of_node_scoped(old_node, child) { + ret = dwc3_flattening_copy_ports_tree(ocs, new_node, child); + if (ret) + return ret; + } + + return of_changeset_detach_node(ocs, old_node); +} + +static int dwc3_flattening_migrate(struct of_changeset *ocs, + struct device_node *np) +{ + struct device_node *ports; + struct device_node *dwc3; + int ret; + + dwc3 = of_get_compatible_child(np, "snps,dwc3"); + if (!dwc3) + return 0; + + ret = dwc3_flattening_copy_snps_properties(ocs, np, dwc3); + if (ret) { + pr_err("failed to copy properties of %pOF", dwc3); + goto out; + } + + ports = of_get_child_by_name(dwc3, "ports"); + if (ports) { + ret = dwc3_flattening_copy_ports_tree(ocs, np, ports); + of_node_put(ports); + if (ret) { + pr_err("failed to clone ports child of %pOF", dwc3); + goto out; + } + } + + ret = of_changeset_detach_node(ocs, dwc3); + +out: + of_node_put(dwc3); + + return ret; +} + +static int dwc3_flattening_init(void) +{ + const struct dwc3_overlay_data *data; + const struct of_device_id *match; + struct of_changeset migrate_ocs; + struct device_node *np; + int overlay_ovcs; + int ret; + + /* TODO: Remove kill-switch as dwc3-qcom is migrated to qcom,snps-dwc */ + return 0; + + match = of_match_node(dwc3_flatten_of_match, of_root); + if (!match) + return 0; + + data = match->data; + + np = of_find_compatible_node(NULL, NULL, data->migrate_match); + if (!np) { + pr_debug("already applied\n"); + return 0; + } + of_node_put(np); + + of_changeset_init(&migrate_ocs); + for_each_compatible_node(np, NULL, data->migrate_match) { + ret = dwc3_flattening_migrate(&migrate_ocs, np); + if (ret < 0) { + of_node_put(np); + goto out_migrate_destroy; + } + } + + ret = of_changeset_apply(&migrate_ocs); + if (ret < 0) + goto out_migrate_destroy; + + ret = of_overlay_fdt_apply(data->fdt, data->end - data->fdt, &overlay_ovcs, NULL); + if (ret < 0) { + of_overlay_remove(&overlay_ovcs); + of_changeset_revert(&migrate_ocs); + } + +out_migrate_destroy: + of_changeset_destroy(&migrate_ocs); + + return ret; +} +postcore_initcall(dwc3_flattening_init); diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h new file mode 100644 index 000000000000..6147376d3c92 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DWC3_FLATTENING_H__ +#define __DWC3_FLATTENING_H__ + +#include <linux/kernel.h> + +#endif -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 05/12] of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (3 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 04/12] of: overlays: Introduce dwc3 flattening overlay Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays Bjorn Andersson ` (8 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson Introduce the overlays necessary for migrating Qualcomm Arm32 boards currently present in the upstream Linux kernel. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/of/overlays/dwc3-flattening/Makefile | 6 ++++ .../of/overlays/dwc3-flattening/dwc3-flattening.c | 42 ++++++++++++++++++++++ .../of/overlays/dwc3-flattening/dwc3-flattening.h | 13 +++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts | 36 +++++++++++++++++++ .../dwc3-qcom_ipq4018_8dev_jalapeno.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts | 40 +++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_sdx55.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_sdx65.dts | 38 ++++++++++++++++++++ 9 files changed, 289 insertions(+) diff --git a/drivers/of/overlays/dwc3-flattening/Makefile b/drivers/of/overlays/dwc3-flattening/Makefile index 78ed59517887..248ddabd424e 100644 --- a/drivers/of/overlays/dwc3-flattening/Makefile +++ b/drivers/of/overlays/dwc3-flattening/Makefile @@ -2,3 +2,9 @@ obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening-overlay.o dwc3-flattening-overlay-y += dwc3-flattening.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4018.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4018_8dev_jalapeno.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4019.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq8064.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdx55.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdx65.dtb.o diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c index fe8e42627fe3..0a3a31c5088b 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -21,7 +21,49 @@ struct dwc3_overlay_data { const char *migrate_match; }; +static const struct dwc3_overlay_data dwc3_qcom_ipq4018_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4018_begin, + .end = __dtb_dwc3_qcom_ipq4018_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq4018_8dev_jalapeno_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin, + .end = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq4019_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4019_begin, + .end = __dtb_dwc3_qcom_ipq4019_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq8064_overlay = { + .fdt = __dtb_dwc3_qcom_ipq8064_begin, + .end = __dtb_dwc3_qcom_ipq8064_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdx55_overlay = { + .fdt = __dtb_dwc3_qcom_sdx55_begin, + .end = __dtb_dwc3_qcom_sdx55_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdx65_overlay = { + .fdt = __dtb_dwc3_qcom_sdx65_begin, + .end = __dtb_dwc3_qcom_sdx65_end, + .migrate_match = "qcom,dwc3", +}; + static const struct of_device_id dwc3_flatten_of_match[] = { + { .compatible = "8dev,jalapeno", .data = &dwc3_qcom_ipq4018_8dev_jalapeno_overlay }, + { .compatible = "qcom,ipq4018", .data = &dwc3_qcom_ipq4018_overlay }, + { .compatible = "qcom,ipq4019", .data = &dwc3_qcom_ipq4019_overlay }, + { .compatible = "qcom,ipq8064", .data = &dwc3_qcom_ipq8064_overlay }, + { .compatible = "qcom,sdx55", .data = &dwc3_qcom_sdx55_overlay }, + { .compatible = "qcom,sdx65", .data = &dwc3_qcom_sdx65_overlay }, {} }; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h index 6147376d3c92..57d7dbc94980 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h @@ -4,4 +4,17 @@ #include <linux/kernel.h> +extern u8 __dtb_dwc3_qcom_ipq4018_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4018_end[]; +extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end[]; +extern u8 __dtb_dwc3_qcom_ipq4019_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4019_end[]; +extern u8 __dtb_dwc3_qcom_ipq8064_begin[]; +extern u8 __dtb_dwc3_qcom_ipq8064_end[]; +extern u8 __dtb_dwc3_qcom_sdx55_begin[]; +extern u8 __dtb_dwc3_qcom_sdx55_end[]; +extern u8 __dtb_dwc3_qcom_sdx65_begin[]; +extern u8 __dtb_dwc3_qcom_sdx65_end[]; + #endif diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts new file mode 100644 index 000000000000..1bd86a1852ba --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts new file mode 100644 index 000000000000..bdc76b73c1fe --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>, + <&usb3_ss_phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts new file mode 100644 index 000000000000..bdc76b73c1fe --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>, + <&usb3_ss_phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts new file mode 100644 index 000000000000..8e29a17472c6 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@100f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq8064-dwc3", "qcom,snps-dwc3"; + reg = <0x10000000 0x14d00>; + phys = <&hs_phy_0>, + <&ss_phy_0>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@110f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq8064-dwc3", "qcom,snps-dwc3"; + reg = <0x11000000 0x14d00>; + phys = <&hs_phy_1>, + <&ss_phy_1>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts new file mode 100644 index 000000000000..9ebb5d42f355 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@a6f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,sdx55-dwc3", "qcom,snps-dwc3"; + reg = <0x0a600000 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 51 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1a0 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts new file mode 100644 index 000000000000..239caec1f80d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc/usb@a6f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,sdx65-dwc3", "qcom,snps-dwc3"; + reg = <0x0a600000 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>, + <&pdc 18 IRQ_TYPE_EDGE_BOTH>, + <&pdc 76 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1a0 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (4 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 05/12] of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 17:42 ` Rob Herring 2025-01-14 5:11 ` [PATCH v3 07/12] of: overlays: dwc3-flattening: Provide overlay symbols Bjorn Andersson ` (7 subsequent siblings) 13 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson Introduce the overlays necessary for migrating Qualcomm Arm64 boards currently present in the upstream Linux kernel. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/of/overlays/dwc3-flattening/Makefile | 84 +++ .../of/overlays/dwc3-flattening/dwc3-flattening.c | 588 +++++++++++++++++++++ .../of/overlays/dwc3-flattening/dwc3-flattening.h | 168 ++++++ .../overlays/dwc3-flattening/dwc3-qcom_apq8094.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_apq8096.dts | 60 +++ .../dwc3-qcom_apq8096_inforce_ifc6640.dts | 58 ++ .../overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts | 28 + .../overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts | 58 ++ .../overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts | 54 ++ .../overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts | 58 ++ .../overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts | 29 + .../overlays/dwc3-flattening/dwc3-qcom_msm8953.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_msm8992.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_msm8994.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_msm8996.dts | 58 ++ .../dwc3-qcom_msm8996_oneplus_oneplus3.dts | 56 ++ .../dwc3-qcom_msm8996_oneplus_oneplus3t.dts | 56 ++ .../dwc3-qcom_msm8996_sony_dora_row.dts | 57 ++ .../dwc3-qcom_msm8996_sony_kagura_row.dts | 57 ++ .../dwc3-qcom_msm8996_sony_keyaki_row.dts | 57 ++ .../dwc3-qcom_msm8996_xiaomi_gemini.dts | 56 ++ .../dwc3-qcom_msm8996_xiaomi_natrium.dts | 56 ++ .../dwc3-qcom_msm8996_xiaomi_scorpio.dts | 56 ++ .../overlays/dwc3-flattening/dwc3-qcom_msm8998.dts | 34 ++ .../dwc3-qcom_msm8998_fxtec_pro1.dts | 35 ++ .../dwc3-qcom_msm8998_oneplus_cheeseburger.dts | 32 ++ .../dwc3-qcom_msm8998_oneplus_dumpling.dts | 32 ++ .../dwc3-qcom_msm8998_sony_xperia_lilac.dts | 35 ++ .../dwc3-qcom_msm8998_sony_xperia_maple.dts | 35 ++ .../dwc3-qcom_msm8998_sony_xperia_poplar.dts | 35 ++ .../dwc3-qcom_msm8998_xiaomi_sagit.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts | 63 +++ .../overlays/dwc3-flattening/dwc3-qcom_qcs404.dts | 56 ++ .../overlays/dwc3-flattening/dwc3-qcom_qcs615.dts | 62 +++ .../overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts | 62 +++ .../overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts | 38 ++ .../overlays/dwc3-flattening/dwc3-qcom_qru1000.dts | 38 ++ .../overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts | 71 +++ .../overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts | 129 +++++ .../overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts | 90 ++++ .../dwc3-flattening/dwc3-qcom_sar2130p.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sc7180.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sc7280.dts | 63 +++ .../overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts | 109 ++++ .../dwc3-flattening/dwc3-qcom_sc8280xp.dts | 129 +++++ .../dwc3-qcom_sc8280xp_microsoft_blackrock.dts | 121 +++++ .../overlays/dwc3-flattening/dwc3-qcom_sda660.dts | 59 +++ .../overlays/dwc3-flattening/dwc3-qcom_sdm450.dts | 33 ++ .../overlays/dwc3-flattening/dwc3-qcom_sdm630.dts | 57 ++ .../overlays/dwc3-flattening/dwc3-qcom_sdm632.dts | 32 ++ .../overlays/dwc3-flattening/dwc3-qcom_sdm636.dts | 59 +++ .../overlays/dwc3-flattening/dwc3-qcom_sdm660.dts | 57 ++ .../overlays/dwc3-flattening/dwc3-qcom_sdm670.dts | 36 ++ .../overlays/dwc3-flattening/dwc3-qcom_sdm845.dts | 64 +++ .../dwc3-qcom_sdm845_lenovo_yoga_c630.dts | 67 +++ .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts | 67 +++ .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts | 67 +++ .../dwc3-qcom_sdm845_qcom_sdm845_mtp.dts | 67 +++ .../dwc3-qcom_sdm845_samsung_starqltechn.dts | 67 +++ .../dwc3-qcom_sdm845_samsung_w737.dts | 67 +++ .../dwc3-qcom_sdm845_shift_axolotl.dts | 67 +++ .../dwc3-qcom_sdm845_thundercomm_db845c.dts | 67 +++ .../dwc3-qcom_sdm845_xiaomi_beryllium.dts | 67 +++ .../dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts | 67 +++ .../overlays/dwc3-flattening/dwc3-qcom_sdx75.dts | 36 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm4250.dts | 37 ++ .../dwc3-qcom_sm4250_oneplus_billie2.dts | 35 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm6115.dts | 37 ++ .../dwc3-qcom_sm6115_lenovo_j606f.dts | 35 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm6125.dts | 36 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm6350.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm6375.dts | 36 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm7125.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm7225.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm7325.dts | 60 +++ .../overlays/dwc3-flattening/dwc3-qcom_sm8150.dts | 67 +++ .../overlays/dwc3-flattening/dwc3-qcom_sm8250.dts | 67 +++ .../dwc3-qcom_sm8250_xiaomi_elish.dts | 64 +++ .../overlays/dwc3-flattening/dwc3-qcom_sm8350.dts | 67 +++ .../dwc3-qcom_sm8350_microsoft_surface_duo2.dts | 67 +++ .../dwc3-qcom_sm8350_qcom_sm8350_hdk.dts | 69 +++ .../dwc3-qcom_sm8350_qcom_sm8350_mtp.dts | 67 +++ .../dwc3-qcom_sm8350_sony_pdx214_generic.dts | 67 +++ .../dwc3-qcom_sm8350_sony_pdx215_generic.dts | 67 +++ .../overlays/dwc3-flattening/dwc3-qcom_sm8450.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm8550.dts | 39 ++ .../overlays/dwc3-flattening/dwc3-qcom_sm8650.dts | 39 ++ .../dwc3-flattening/dwc3-qcom_x1e80100.dts | 153 ++++++ .../dwc3-qcom_x1e80100_hp_omnibook_x14.dts | 149 ++++++ 91 files changed, 5782 insertions(+) diff --git a/drivers/of/overlays/dwc3-flattening/Makefile b/drivers/of/overlays/dwc3-flattening/Makefile index 248ddabd424e..afc509d97d1b 100644 --- a/drivers/of/overlays/dwc3-flattening/Makefile +++ b/drivers/of/overlays/dwc3-flattening/Makefile @@ -2,9 +2,93 @@ obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening-overlay.o dwc3-flattening-overlay-y += dwc3-flattening.o +dwc3-flattening-overlay-y += dwc3-qcom_apq8094.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_apq8096.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_apq8096_inforce_ifc6640.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_ipq4018.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_ipq4018_8dev_jalapeno.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_ipq4019.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq5018.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq5332.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq5424.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq6018.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_ipq8064.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq8074.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq9574.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8953.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8992.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8994.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_oneplus_oneplus3.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_oneplus_oneplus3t.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_dora_row.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_kagura_row.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_keyaki_row.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_gemini.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_natrium.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_scorpio.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_fxtec_pro1.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_oneplus_cheeseburger.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_oneplus_dumpling.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_lilac.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_maple.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_poplar.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_xiaomi_sagit.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qcm2290.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qcm6490.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qcs404.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qcs615.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qcs8300.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qdu1000.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_qru1000.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sa8155p.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sa8540p.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sa8775p.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sar2130p.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sc7180.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sc7280.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sc8180x.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sc8280xp.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sc8280xp_microsoft_blackrock.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sda660.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm450.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm630.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm632.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm636.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm660.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm670.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lenovo_yoga_c630.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lg_judyln.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lg_judyp.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_qcom_sdm845_mtp.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_samsung_starqltechn.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_samsung_w737.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_shift_axolotl.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_thundercomm_db845c.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_xiaomi_beryllium.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_sdx55.dtb.o dwc3-flattening-overlay-y += dwc3-qcom_sdx65.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdx75.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm4250.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm4250_oneplus_billie2.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm6115.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm6115_lenovo_j606f.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm6125.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm6350.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm6375.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm7125.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm7225.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm7325.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8150.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8250.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8250_xiaomi_elish.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8350.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8350_qcom_sm8350_hdk.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8450.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8550.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sm8650.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100_hp_omnibook_x14.dtb.o diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c index 0a3a31c5088b..d33cdf6661c0 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -21,6 +21,24 @@ struct dwc3_overlay_data { const char *migrate_match; }; +static const struct dwc3_overlay_data dwc3_qcom_apq8094_overlay = { + .fdt = __dtb_dwc3_qcom_apq8094_begin, + .end = __dtb_dwc3_qcom_apq8094_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_apq8096_overlay = { + .fdt = __dtb_dwc3_qcom_apq8096_begin, + .end = __dtb_dwc3_qcom_apq8096_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_apq8096_inforce_ifc6640_overlay = { + .fdt = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_begin, + .end = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_end, + .migrate_match = "qcom,dwc3", +}; + static const struct dwc3_overlay_data dwc3_qcom_ipq4018_overlay = { .fdt = __dtb_dwc3_qcom_ipq4018_begin, .end = __dtb_dwc3_qcom_ipq4018_end, @@ -39,12 +57,372 @@ static const struct dwc3_overlay_data dwc3_qcom_ipq4019_overlay = { .migrate_match = "qcom,dwc3", }; +static const struct dwc3_overlay_data dwc3_qcom_ipq5018_overlay = { + .fdt = __dtb_dwc3_qcom_ipq5018_begin, + .end = __dtb_dwc3_qcom_ipq5018_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq5332_overlay = { + .fdt = __dtb_dwc3_qcom_ipq5332_begin, + .end = __dtb_dwc3_qcom_ipq5332_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq5424_overlay = { + .fdt = __dtb_dwc3_qcom_ipq5424_begin, + .end = __dtb_dwc3_qcom_ipq5424_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq6018_overlay = { + .fdt = __dtb_dwc3_qcom_ipq6018_begin, + .end = __dtb_dwc3_qcom_ipq6018_end, + .migrate_match = "qcom,dwc3", +}; + static const struct dwc3_overlay_data dwc3_qcom_ipq8064_overlay = { .fdt = __dtb_dwc3_qcom_ipq8064_begin, .end = __dtb_dwc3_qcom_ipq8064_end, .migrate_match = "qcom,dwc3", }; +static const struct dwc3_overlay_data dwc3_qcom_ipq8074_overlay = { + .fdt = __dtb_dwc3_qcom_ipq8074_begin, + .end = __dtb_dwc3_qcom_ipq8074_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq9574_overlay = { + .fdt = __dtb_dwc3_qcom_ipq9574_begin, + .end = __dtb_dwc3_qcom_ipq9574_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8953_overlay = { + .fdt = __dtb_dwc3_qcom_msm8953_begin, + .end = __dtb_dwc3_qcom_msm8953_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8992_overlay = { + .fdt = __dtb_dwc3_qcom_msm8992_begin, + .end = __dtb_dwc3_qcom_msm8992_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8994_overlay = { + .fdt = __dtb_dwc3_qcom_msm8994_begin, + .end = __dtb_dwc3_qcom_msm8994_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_begin, + .end = __dtb_dwc3_qcom_msm8996_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_begin, + .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3t_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_begin, + .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_dora_row_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_sony_dora_row_begin, + .end = __dtb_dwc3_qcom_msm8996_sony_dora_row_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_kagura_row_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_sony_kagura_row_begin, + .end = __dtb_dwc3_qcom_msm8996_sony_kagura_row_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_keyaki_row_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_begin, + .end = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_gemini_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_begin, + .end = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_natrium_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_begin, + .end = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_scorpio_overlay = { + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_begin, + .end = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_begin, + .end = __dtb_dwc3_qcom_msm8998_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_fxtec_pro1_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_fxtec_pro1_begin, + .end = __dtb_dwc3_qcom_msm8998_fxtec_pro1_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_cheeseburger_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_begin, + .end = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_dumpling_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_begin, + .end = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_lilac_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_begin, + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_maple_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_begin, + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_poplar_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_begin, + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_msm8998_xiaomi_sagit_overlay = { + .fdt = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_begin, + .end = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qcm2290_overlay = { + .fdt = __dtb_dwc3_qcom_qcm2290_begin, + .end = __dtb_dwc3_qcom_qcm2290_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qcm6490_overlay = { + .fdt = __dtb_dwc3_qcom_qcm6490_begin, + .end = __dtb_dwc3_qcom_qcm6490_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qcs404_overlay = { + .fdt = __dtb_dwc3_qcom_qcs404_begin, + .end = __dtb_dwc3_qcom_qcs404_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qcs615_overlay = { + .fdt = __dtb_dwc3_qcom_qcs615_begin, + .end = __dtb_dwc3_qcom_qcs615_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qcs8300_overlay = { + .fdt = __dtb_dwc3_qcom_qcs8300_begin, + .end = __dtb_dwc3_qcom_qcs8300_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qdu1000_overlay = { + .fdt = __dtb_dwc3_qcom_qdu1000_begin, + .end = __dtb_dwc3_qcom_qdu1000_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_qru1000_overlay = { + .fdt = __dtb_dwc3_qcom_qru1000_begin, + .end = __dtb_dwc3_qcom_qru1000_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sa8155p_overlay = { + .fdt = __dtb_dwc3_qcom_sa8155p_begin, + .end = __dtb_dwc3_qcom_sa8155p_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sa8540p_overlay = { + .fdt = __dtb_dwc3_qcom_sa8540p_begin, + .end = __dtb_dwc3_qcom_sa8540p_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sa8775p_overlay = { + .fdt = __dtb_dwc3_qcom_sa8775p_begin, + .end = __dtb_dwc3_qcom_sa8775p_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sar2130p_overlay = { + .fdt = __dtb_dwc3_qcom_sar2130p_begin, + .end = __dtb_dwc3_qcom_sar2130p_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sc7180_overlay = { + .fdt = __dtb_dwc3_qcom_sc7180_begin, + .end = __dtb_dwc3_qcom_sc7180_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sc7280_overlay = { + .fdt = __dtb_dwc3_qcom_sc7280_begin, + .end = __dtb_dwc3_qcom_sc7280_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sc8180x_overlay = { + .fdt = __dtb_dwc3_qcom_sc8180x_begin, + .end = __dtb_dwc3_qcom_sc8180x_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_overlay = { + .fdt = __dtb_dwc3_qcom_sc8280xp_begin, + .end = __dtb_dwc3_qcom_sc8280xp_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_microsoft_blackrock_overlay = { + .fdt = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_begin, + .end = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sda660_overlay = { + .fdt = __dtb_dwc3_qcom_sda660_begin, + .end = __dtb_dwc3_qcom_sda660_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm450_overlay = { + .fdt = __dtb_dwc3_qcom_sdm450_begin, + .end = __dtb_dwc3_qcom_sdm450_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm630_overlay = { + .fdt = __dtb_dwc3_qcom_sdm630_begin, + .end = __dtb_dwc3_qcom_sdm630_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm632_overlay = { + .fdt = __dtb_dwc3_qcom_sdm632_begin, + .end = __dtb_dwc3_qcom_sdm632_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm636_overlay = { + .fdt = __dtb_dwc3_qcom_sdm636_begin, + .end = __dtb_dwc3_qcom_sdm636_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm660_overlay = { + .fdt = __dtb_dwc3_qcom_sdm660_begin, + .end = __dtb_dwc3_qcom_sdm660_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm670_overlay = { + .fdt = __dtb_dwc3_qcom_sdm670_begin, + .end = __dtb_dwc3_qcom_sdm670_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_begin, + .end = __dtb_dwc3_qcom_sdm845_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lenovo_yoga_c630_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_begin, + .end = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyln_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_lg_judyln_begin, + .end = __dtb_dwc3_qcom_sdm845_lg_judyln_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyp_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_lg_judyp_begin, + .end = __dtb_dwc3_qcom_sdm845_lg_judyp_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_qcom_sdm845_mtp_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_begin, + .end = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_starqltechn_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_begin, + .end = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_w737_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_samsung_w737_begin, + .end = __dtb_dwc3_qcom_sdm845_samsung_w737_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_shift_axolotl_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_shift_axolotl_begin, + .end = __dtb_dwc3_qcom_sdm845_shift_axolotl_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_thundercomm_db845c_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_begin, + .end = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_begin, + .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_overlay = { + .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_begin, + .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_end, + .migrate_match = "qcom,dwc3", +}; + static const struct dwc3_overlay_data dwc3_qcom_sdx55_overlay = { .fdt = __dtb_dwc3_qcom_sdx55_begin, .end = __dtb_dwc3_qcom_sdx55_end, @@ -57,13 +435,223 @@ static const struct dwc3_overlay_data dwc3_qcom_sdx65_overlay = { .migrate_match = "qcom,dwc3", }; +static const struct dwc3_overlay_data dwc3_qcom_sdx75_overlay = { + .fdt = __dtb_dwc3_qcom_sdx75_begin, + .end = __dtb_dwc3_qcom_sdx75_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm4250_overlay = { + .fdt = __dtb_dwc3_qcom_sm4250_begin, + .end = __dtb_dwc3_qcom_sm4250_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm4250_oneplus_billie2_overlay = { + .fdt = __dtb_dwc3_qcom_sm4250_oneplus_billie2_begin, + .end = __dtb_dwc3_qcom_sm4250_oneplus_billie2_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm6115_overlay = { + .fdt = __dtb_dwc3_qcom_sm6115_begin, + .end = __dtb_dwc3_qcom_sm6115_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm6115_lenovo_j606f_overlay = { + .fdt = __dtb_dwc3_qcom_sm6115_lenovo_j606f_begin, + .end = __dtb_dwc3_qcom_sm6115_lenovo_j606f_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm6125_overlay = { + .fdt = __dtb_dwc3_qcom_sm6125_begin, + .end = __dtb_dwc3_qcom_sm6125_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm6350_overlay = { + .fdt = __dtb_dwc3_qcom_sm6350_begin, + .end = __dtb_dwc3_qcom_sm6350_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm6375_overlay = { + .fdt = __dtb_dwc3_qcom_sm6375_begin, + .end = __dtb_dwc3_qcom_sm6375_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm7125_overlay = { + .fdt = __dtb_dwc3_qcom_sm7125_begin, + .end = __dtb_dwc3_qcom_sm7125_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm7225_overlay = { + .fdt = __dtb_dwc3_qcom_sm7225_begin, + .end = __dtb_dwc3_qcom_sm7225_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm7325_overlay = { + .fdt = __dtb_dwc3_qcom_sm7325_begin, + .end = __dtb_dwc3_qcom_sm7325_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8150_overlay = { + .fdt = __dtb_dwc3_qcom_sm8150_begin, + .end = __dtb_dwc3_qcom_sm8150_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8250_overlay = { + .fdt = __dtb_dwc3_qcom_sm8250_begin, + .end = __dtb_dwc3_qcom_sm8250_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8250_xiaomi_elish_overlay = { + .fdt = __dtb_dwc3_qcom_sm8250_xiaomi_elish_begin, + .end = __dtb_dwc3_qcom_sm8250_xiaomi_elish_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8350_overlay = { + .fdt = __dtb_dwc3_qcom_sm8350_begin, + .end = __dtb_dwc3_qcom_sm8350_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8350_qcom_sm8350_hdk_overlay = { + .fdt = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_begin, + .end = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8450_overlay = { + .fdt = __dtb_dwc3_qcom_sm8450_begin, + .end = __dtb_dwc3_qcom_sm8450_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8550_overlay = { + .fdt = __dtb_dwc3_qcom_sm8550_begin, + .end = __dtb_dwc3_qcom_sm8550_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sm8650_overlay = { + .fdt = __dtb_dwc3_qcom_sm8650_begin, + .end = __dtb_dwc3_qcom_sm8650_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_x1e80100_overlay = { + .fdt = __dtb_dwc3_qcom_x1e80100_begin, + .end = __dtb_dwc3_qcom_x1e80100_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_x1e80100_hp_omnibook_x14_overlay = { + .fdt = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_begin, + .end = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_end, + .migrate_match = "qcom,dwc3", +}; + static const struct of_device_id dwc3_flatten_of_match[] = { { .compatible = "8dev,jalapeno", .data = &dwc3_qcom_ipq4018_8dev_jalapeno_overlay }, + { .compatible = "fxtec,pro1", .data = &dwc3_qcom_msm8998_fxtec_pro1_overlay }, + { .compatible = "hp,omnibook-x14", .data = &dwc3_qcom_x1e80100_hp_omnibook_x14_overlay }, + { .compatible = "inforce,ifc6640", .data = &dwc3_qcom_apq8096_inforce_ifc6640_overlay }, + { .compatible = "lenovo,j606f", .data = &dwc3_qcom_sm6115_lenovo_j606f_overlay }, + { .compatible = "lenovo,yoga-c630", .data = &dwc3_qcom_sdm845_lenovo_yoga_c630_overlay }, + { .compatible = "lg,judyln", .data = &dwc3_qcom_sdm845_lg_judyln_overlay }, + { .compatible = "lg,judyp", .data = &dwc3_qcom_sdm845_lg_judyp_overlay }, + { .compatible = "microsoft,blackrock", .data = &dwc3_qcom_sc8280xp_microsoft_blackrock_overlay }, + { .compatible = "oneplus,billie2", .data = &dwc3_qcom_sm4250_oneplus_billie2_overlay }, + { .compatible = "oneplus,cheeseburger", .data = &dwc3_qcom_msm8998_oneplus_cheeseburger_overlay }, + { .compatible = "oneplus,dumpling", .data = &dwc3_qcom_msm8998_oneplus_dumpling_overlay }, + { .compatible = "oneplus,oneplus3", .data = &dwc3_qcom_msm8996_oneplus_oneplus3_overlay }, + { .compatible = "oneplus,oneplus3t", .data = &dwc3_qcom_msm8996_oneplus_oneplus3t_overlay }, + { .compatible = "qcom,apq8094", .data = &dwc3_qcom_apq8094_overlay }, + { .compatible = "qcom,apq8096", .data = &dwc3_qcom_apq8096_overlay }, { .compatible = "qcom,ipq4018", .data = &dwc3_qcom_ipq4018_overlay }, { .compatible = "qcom,ipq4019", .data = &dwc3_qcom_ipq4019_overlay }, + { .compatible = "qcom,ipq5018", .data = &dwc3_qcom_ipq5018_overlay }, + { .compatible = "qcom,ipq5332", .data = &dwc3_qcom_ipq5332_overlay }, + { .compatible = "qcom,ipq5424", .data = &dwc3_qcom_ipq5424_overlay }, + { .compatible = "qcom,ipq6018", .data = &dwc3_qcom_ipq6018_overlay }, { .compatible = "qcom,ipq8064", .data = &dwc3_qcom_ipq8064_overlay }, + { .compatible = "qcom,ipq8074", .data = &dwc3_qcom_ipq8074_overlay }, + { .compatible = "qcom,ipq9574", .data = &dwc3_qcom_ipq9574_overlay }, + { .compatible = "qcom,msm8953", .data = &dwc3_qcom_msm8953_overlay }, + { .compatible = "qcom,msm8992", .data = &dwc3_qcom_msm8992_overlay }, + { .compatible = "qcom,msm8994", .data = &dwc3_qcom_msm8994_overlay }, + { .compatible = "qcom,msm8996", .data = &dwc3_qcom_msm8996_overlay }, + { .compatible = "qcom,msm8998", .data = &dwc3_qcom_msm8998_overlay }, + { .compatible = "qcom,qcm2290", .data = &dwc3_qcom_qcm2290_overlay }, + { .compatible = "qcom,qcm6490", .data = &dwc3_qcom_qcm6490_overlay }, + { .compatible = "qcom,qcs404", .data = &dwc3_qcom_qcs404_overlay }, + { .compatible = "qcom,qcs615", .data = &dwc3_qcom_qcs615_overlay }, + { .compatible = "qcom,qcs8300", .data = &dwc3_qcom_qcs8300_overlay }, + { .compatible = "qcom,qdu1000", .data = &dwc3_qcom_qdu1000_overlay }, + { .compatible = "qcom,qru1000", .data = &dwc3_qcom_qru1000_overlay }, + { .compatible = "qcom,sa8155p", .data = &dwc3_qcom_sa8155p_overlay }, + { .compatible = "qcom,sa8540p", .data = &dwc3_qcom_sa8540p_overlay }, + { .compatible = "qcom,sa8775p", .data = &dwc3_qcom_sa8775p_overlay }, + { .compatible = "qcom,sar2130p", .data = &dwc3_qcom_sar2130p_overlay }, + { .compatible = "qcom,sc7180", .data = &dwc3_qcom_sc7180_overlay }, + { .compatible = "qcom,sc7280", .data = &dwc3_qcom_sc7280_overlay }, + { .compatible = "qcom,sc8180x", .data = &dwc3_qcom_sc8180x_overlay }, + { .compatible = "qcom,sc8280xp", .data = &dwc3_qcom_sc8280xp_overlay }, + { .compatible = "qcom,sda660", .data = &dwc3_qcom_sda660_overlay }, + { .compatible = "qcom,sdm450", .data = &dwc3_qcom_sdm450_overlay }, + { .compatible = "qcom,sdm630", .data = &dwc3_qcom_sdm630_overlay }, + { .compatible = "qcom,sdm632", .data = &dwc3_qcom_sdm632_overlay }, + { .compatible = "qcom,sdm636", .data = &dwc3_qcom_sdm636_overlay }, + { .compatible = "qcom,sdm660", .data = &dwc3_qcom_sdm660_overlay }, + { .compatible = "qcom,sdm670", .data = &dwc3_qcom_sdm670_overlay }, + { .compatible = "qcom,sdm845", .data = &dwc3_qcom_sdm845_overlay }, + { .compatible = "qcom,sdm845-mtp", .data = &dwc3_qcom_sdm845_qcom_sdm845_mtp_overlay }, { .compatible = "qcom,sdx55", .data = &dwc3_qcom_sdx55_overlay }, { .compatible = "qcom,sdx65", .data = &dwc3_qcom_sdx65_overlay }, + { .compatible = "qcom,sdx75", .data = &dwc3_qcom_sdx75_overlay }, + { .compatible = "qcom,sm4250", .data = &dwc3_qcom_sm4250_overlay }, + { .compatible = "qcom,sm6115", .data = &dwc3_qcom_sm6115_overlay }, + { .compatible = "qcom,sm6125", .data = &dwc3_qcom_sm6125_overlay }, + { .compatible = "qcom,sm6350", .data = &dwc3_qcom_sm6350_overlay }, + { .compatible = "qcom,sm6375", .data = &dwc3_qcom_sm6375_overlay }, + { .compatible = "qcom,sm7125", .data = &dwc3_qcom_sm7125_overlay }, + { .compatible = "qcom,sm7225", .data = &dwc3_qcom_sm7225_overlay }, + { .compatible = "qcom,sm7325", .data = &dwc3_qcom_sm7325_overlay }, + { .compatible = "qcom,sm8150", .data = &dwc3_qcom_sm8150_overlay }, + { .compatible = "qcom,sm8250", .data = &dwc3_qcom_sm8250_overlay }, + { .compatible = "qcom,sm8350", .data = &dwc3_qcom_sm8350_overlay }, + { .compatible = "qcom,sm8350-hdk", .data = &dwc3_qcom_sm8350_qcom_sm8350_hdk_overlay }, + { .compatible = "qcom,sm8450", .data = &dwc3_qcom_sm8450_overlay }, + { .compatible = "qcom,sm8550", .data = &dwc3_qcom_sm8550_overlay }, + { .compatible = "qcom,sm8650", .data = &dwc3_qcom_sm8650_overlay }, + { .compatible = "qcom,x1e80100", .data = &dwc3_qcom_x1e80100_overlay }, + { .compatible = "samsung,starqltechn", .data = &dwc3_qcom_sdm845_samsung_starqltechn_overlay }, + { .compatible = "samsung,w737", .data = &dwc3_qcom_sdm845_samsung_w737_overlay }, + { .compatible = "shift,axolotl", .data = &dwc3_qcom_sdm845_shift_axolotl_overlay }, + { .compatible = "sony,dora-row", .data = &dwc3_qcom_msm8996_sony_dora_row_overlay }, + { .compatible = "sony,kagura-row", .data = &dwc3_qcom_msm8996_sony_kagura_row_overlay }, + { .compatible = "sony,keyaki-row", .data = &dwc3_qcom_msm8996_sony_keyaki_row_overlay }, + { .compatible = "sony,xperia-lilac", .data = &dwc3_qcom_msm8998_sony_xperia_lilac_overlay }, + { .compatible = "sony,xperia-maple", .data = &dwc3_qcom_msm8998_sony_xperia_maple_overlay }, + { .compatible = "sony,xperia-poplar", .data = &dwc3_qcom_msm8998_sony_xperia_poplar_overlay }, + { .compatible = "thundercomm,db845c", .data = &dwc3_qcom_sdm845_thundercomm_db845c_overlay }, + { .compatible = "xiaomi,beryllium", .data = &dwc3_qcom_sdm845_xiaomi_beryllium_overlay }, + { .compatible = "xiaomi,beryllium-ebbg", .data = &dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_overlay }, + { .compatible = "xiaomi,elish", .data = &dwc3_qcom_sm8250_xiaomi_elish_overlay }, + { .compatible = "xiaomi,gemini", .data = &dwc3_qcom_msm8996_xiaomi_gemini_overlay }, + { .compatible = "xiaomi,natrium", .data = &dwc3_qcom_msm8996_xiaomi_natrium_overlay }, + { .compatible = "xiaomi,sagit", .data = &dwc3_qcom_msm8998_xiaomi_sagit_overlay }, + { .compatible = "xiaomi,scorpio", .data = &dwc3_qcom_msm8996_xiaomi_scorpio_overlay }, {} }; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h index 57d7dbc94980..bc897db4dd1e 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h @@ -4,17 +4,185 @@ #include <linux/kernel.h> +extern u8 __dtb_dwc3_qcom_apq8094_begin[]; +extern u8 __dtb_dwc3_qcom_apq8094_end[]; +extern u8 __dtb_dwc3_qcom_apq8096_begin[]; +extern u8 __dtb_dwc3_qcom_apq8096_end[]; +extern u8 __dtb_dwc3_qcom_apq8096_inforce_ifc6640_begin[]; +extern u8 __dtb_dwc3_qcom_apq8096_inforce_ifc6640_end[]; extern u8 __dtb_dwc3_qcom_ipq4018_begin[]; extern u8 __dtb_dwc3_qcom_ipq4018_end[]; extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin[]; extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end[]; extern u8 __dtb_dwc3_qcom_ipq4019_begin[]; extern u8 __dtb_dwc3_qcom_ipq4019_end[]; +extern u8 __dtb_dwc3_qcom_ipq5018_begin[]; +extern u8 __dtb_dwc3_qcom_ipq5018_end[]; +extern u8 __dtb_dwc3_qcom_ipq5332_begin[]; +extern u8 __dtb_dwc3_qcom_ipq5332_end[]; +extern u8 __dtb_dwc3_qcom_ipq5424_begin[]; +extern u8 __dtb_dwc3_qcom_ipq5424_end[]; +extern u8 __dtb_dwc3_qcom_ipq6018_begin[]; +extern u8 __dtb_dwc3_qcom_ipq6018_end[]; extern u8 __dtb_dwc3_qcom_ipq8064_begin[]; extern u8 __dtb_dwc3_qcom_ipq8064_end[]; +extern u8 __dtb_dwc3_qcom_ipq8074_begin[]; +extern u8 __dtb_dwc3_qcom_ipq8074_end[]; +extern u8 __dtb_dwc3_qcom_ipq9574_begin[]; +extern u8 __dtb_dwc3_qcom_ipq9574_end[]; +extern u8 __dtb_dwc3_qcom_msm8953_begin[]; +extern u8 __dtb_dwc3_qcom_msm8953_end[]; +extern u8 __dtb_dwc3_qcom_msm8992_begin[]; +extern u8 __dtb_dwc3_qcom_msm8992_end[]; +extern u8 __dtb_dwc3_qcom_msm8994_begin[]; +extern u8 __dtb_dwc3_qcom_msm8994_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_dora_row_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_dora_row_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_kagura_row_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_kagura_row_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_keyaki_row_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_sony_keyaki_row_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_gemini_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_gemini_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_natrium_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_natrium_end[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_begin[]; +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_fxtec_pro1_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_fxtec_pro1_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_dumpling_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_dumpling_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_maple_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_maple_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_end[]; +extern u8 __dtb_dwc3_qcom_msm8998_xiaomi_sagit_begin[]; +extern u8 __dtb_dwc3_qcom_msm8998_xiaomi_sagit_end[]; +extern u8 __dtb_dwc3_qcom_qcm2290_begin[]; +extern u8 __dtb_dwc3_qcom_qcm2290_end[]; +extern u8 __dtb_dwc3_qcom_qcm6490_begin[]; +extern u8 __dtb_dwc3_qcom_qcm6490_end[]; +extern u8 __dtb_dwc3_qcom_qcs404_begin[]; +extern u8 __dtb_dwc3_qcom_qcs404_end[]; +extern u8 __dtb_dwc3_qcom_qcs615_begin[]; +extern u8 __dtb_dwc3_qcom_qcs615_end[]; +extern u8 __dtb_dwc3_qcom_qcs8300_begin[]; +extern u8 __dtb_dwc3_qcom_qcs8300_end[]; +extern u8 __dtb_dwc3_qcom_qdu1000_begin[]; +extern u8 __dtb_dwc3_qcom_qdu1000_end[]; +extern u8 __dtb_dwc3_qcom_qru1000_begin[]; +extern u8 __dtb_dwc3_qcom_qru1000_end[]; +extern u8 __dtb_dwc3_qcom_sa8155p_begin[]; +extern u8 __dtb_dwc3_qcom_sa8155p_end[]; +extern u8 __dtb_dwc3_qcom_sa8540p_begin[]; +extern u8 __dtb_dwc3_qcom_sa8540p_end[]; +extern u8 __dtb_dwc3_qcom_sa8775p_begin[]; +extern u8 __dtb_dwc3_qcom_sa8775p_end[]; +extern u8 __dtb_dwc3_qcom_sar2130p_begin[]; +extern u8 __dtb_dwc3_qcom_sar2130p_end[]; +extern u8 __dtb_dwc3_qcom_sc7180_begin[]; +extern u8 __dtb_dwc3_qcom_sc7180_end[]; +extern u8 __dtb_dwc3_qcom_sc7280_begin[]; +extern u8 __dtb_dwc3_qcom_sc7280_end[]; +extern u8 __dtb_dwc3_qcom_sc8180x_begin[]; +extern u8 __dtb_dwc3_qcom_sc8180x_end[]; +extern u8 __dtb_dwc3_qcom_sc8280xp_begin[]; +extern u8 __dtb_dwc3_qcom_sc8280xp_end[]; +extern u8 __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_begin[]; +extern u8 __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_end[]; +extern u8 __dtb_dwc3_qcom_sda660_begin[]; +extern u8 __dtb_dwc3_qcom_sda660_end[]; +extern u8 __dtb_dwc3_qcom_sdm450_begin[]; +extern u8 __dtb_dwc3_qcom_sdm450_end[]; +extern u8 __dtb_dwc3_qcom_sdm630_begin[]; +extern u8 __dtb_dwc3_qcom_sdm630_end[]; +extern u8 __dtb_dwc3_qcom_sdm632_begin[]; +extern u8 __dtb_dwc3_qcom_sdm632_end[]; +extern u8 __dtb_dwc3_qcom_sdm636_begin[]; +extern u8 __dtb_dwc3_qcom_sdm636_end[]; +extern u8 __dtb_dwc3_qcom_sdm660_begin[]; +extern u8 __dtb_dwc3_qcom_sdm660_end[]; +extern u8 __dtb_dwc3_qcom_sdm670_begin[]; +extern u8 __dtb_dwc3_qcom_sdm670_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyln_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyln_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyp_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyp_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_samsung_starqltechn_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_samsung_starqltechn_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_samsung_w737_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_samsung_w737_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_shift_axolotl_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_shift_axolotl_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_thundercomm_db845c_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_thundercomm_db845c_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_end[]; +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_begin[]; +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_end[]; extern u8 __dtb_dwc3_qcom_sdx55_begin[]; extern u8 __dtb_dwc3_qcom_sdx55_end[]; extern u8 __dtb_dwc3_qcom_sdx65_begin[]; extern u8 __dtb_dwc3_qcom_sdx65_end[]; +extern u8 __dtb_dwc3_qcom_sdx75_begin[]; +extern u8 __dtb_dwc3_qcom_sdx75_end[]; +extern u8 __dtb_dwc3_qcom_sm4250_begin[]; +extern u8 __dtb_dwc3_qcom_sm4250_end[]; +extern u8 __dtb_dwc3_qcom_sm4250_oneplus_billie2_begin[]; +extern u8 __dtb_dwc3_qcom_sm4250_oneplus_billie2_end[]; +extern u8 __dtb_dwc3_qcom_sm6115_begin[]; +extern u8 __dtb_dwc3_qcom_sm6115_end[]; +extern u8 __dtb_dwc3_qcom_sm6115_lenovo_j606f_begin[]; +extern u8 __dtb_dwc3_qcom_sm6115_lenovo_j606f_end[]; +extern u8 __dtb_dwc3_qcom_sm6125_begin[]; +extern u8 __dtb_dwc3_qcom_sm6125_end[]; +extern u8 __dtb_dwc3_qcom_sm6350_begin[]; +extern u8 __dtb_dwc3_qcom_sm6350_end[]; +extern u8 __dtb_dwc3_qcom_sm6375_begin[]; +extern u8 __dtb_dwc3_qcom_sm6375_end[]; +extern u8 __dtb_dwc3_qcom_sm7125_begin[]; +extern u8 __dtb_dwc3_qcom_sm7125_end[]; +extern u8 __dtb_dwc3_qcom_sm7225_begin[]; +extern u8 __dtb_dwc3_qcom_sm7225_end[]; +extern u8 __dtb_dwc3_qcom_sm7325_begin[]; +extern u8 __dtb_dwc3_qcom_sm7325_end[]; +extern u8 __dtb_dwc3_qcom_sm8150_begin[]; +extern u8 __dtb_dwc3_qcom_sm8150_end[]; +extern u8 __dtb_dwc3_qcom_sm8250_begin[]; +extern u8 __dtb_dwc3_qcom_sm8250_end[]; +extern u8 __dtb_dwc3_qcom_sm8250_xiaomi_elish_begin[]; +extern u8 __dtb_dwc3_qcom_sm8250_xiaomi_elish_end[]; +extern u8 __dtb_dwc3_qcom_sm8350_begin[]; +extern u8 __dtb_dwc3_qcom_sm8350_end[]; +extern u8 __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_begin[]; +extern u8 __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_end[]; +extern u8 __dtb_dwc3_qcom_sm8450_begin[]; +extern u8 __dtb_dwc3_qcom_sm8450_end[]; +extern u8 __dtb_dwc3_qcom_sm8550_begin[]; +extern u8 __dtb_dwc3_qcom_sm8550_end[]; +extern u8 __dtb_dwc3_qcom_sm8650_begin[]; +extern u8 __dtb_dwc3_qcom_sm8650_end[]; +extern u8 __dtb_dwc3_qcom_x1e80100_begin[]; +extern u8 __dtb_dwc3_qcom_x1e80100_end[]; +extern u8 __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_begin[]; +extern u8 __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_end[]; #endif diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts new file mode 100644 index 000000000000..8ca699460ec3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@f92f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; + reg = <0xf9200000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts new file mode 100644 index 000000000000..f05d6c905e85 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&usb2_id>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + extcon = <&usb3_id>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts new file mode 100644 index 000000000000..1b9ae360f1ce --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts new file mode 100644 index 000000000000..44266816a50b --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq5018-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xe400>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "hs_phy_irq"; + phys = <&usbphy0>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts new file mode 100644 index 000000000000..6e6699e4f859 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq5332-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xe400>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + phys = <&usbphy0>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts new file mode 100644 index 000000000000..e14dc85d8b39 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb2@1e00000"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; + reg = <0 0x01e00000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; + phys = <&qusb_phy_1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb3@8a00000"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; + reg = <0 0x08a00000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; + phys = <&qusb_phy_0>, + <&ssphy_0>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts new file mode 100644 index 000000000000..14e7fa720831 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@70f8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; + reg = <0 0x07000000 0 0xd100>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy"; + phys = <&qusb_phy_1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@8af8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; + reg = <0 0x08a00000 0 0xd100>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb_phy_0>, + <&ssphy_0>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts new file mode 100644 index 000000000000..169da32fcd24 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xd100>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb_phy_0>, + <&ssphy_0>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@8cf8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; + reg = <0x08c00000 0xd100>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb_phy_1>, + <&ssphy_1>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts new file mode 100644 index 000000000000..ba644dde4845 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq9574-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xd100>; + interrupts-extended = <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event"; + phys = <&usb_0_qusbphy>, + <&usb_0_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts new file mode 100644 index 000000000000..2c2d8e00ab78 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@70f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8953-dwc3", "qcom,snps-dwc3"; + reg = <0x07000000 0xd000>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&hsusb_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts new file mode 100644 index 000000000000..8ca699460ec3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@f92f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; + reg = <0xf9200000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts new file mode 100644 index 000000000000..8ca699460ec3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@f92f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; + reg = <0xf9200000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts new file mode 100644 index 000000000000..1b9ae360f1ce --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts new file mode 100644 index 000000000000..7a583de320cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts new file mode 100644 index 000000000000..7a583de320cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_dora_row.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_dora_row.dts new file mode 100644 index 000000000000..da6e357b0cbc --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_dora_row.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + extcon = <&usb3_id>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_kagura_row.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_kagura_row.dts new file mode 100644 index 000000000000..da6e357b0cbc --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_kagura_row.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + extcon = <&usb3_id>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_keyaki_row.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_keyaki_row.dts new file mode 100644 index 000000000000..da6e357b0cbc --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_sony_keyaki_row.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + extcon = <&usb3_id>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_gemini.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_gemini.dts new file mode 100644 index 000000000000..7a583de320cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_gemini.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_natrium.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_natrium.dts new file mode 100644 index 000000000000..7a583de320cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_natrium.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_scorpio.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_scorpio.dts new file mode 100644 index 000000000000..7a583de320cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_xiaomi_scorpio.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@6af8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x06a00000 0xd000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@76f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; + reg = <0x07600000 0xd000>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&hsusb_phy2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998.dts new file mode 100644 index 000000000000..75824abf794b --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_fxtec_pro1.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_fxtec_pro1.dts new file mode 100644 index 000000000000..4f3aded0142d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_fxtec_pro1.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_cheeseburger.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_cheeseburger.dts new file mode 100644 index 000000000000..3b331d0e5283 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_cheeseburger.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_dumpling.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_dumpling.dts new file mode 100644 index 000000000000..3b331d0e5283 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_oneplus_dumpling.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_lilac.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_lilac.dts new file mode 100644 index 000000000000..4f3aded0142d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_lilac.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_maple.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_maple.dts new file mode 100644 index 000000000000..4f3aded0142d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_maple.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_poplar.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_poplar.dts new file mode 100644 index 000000000000..4f3aded0142d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_sony_xperia_poplar.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>, + <&usb3phy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_xiaomi_sagit.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_xiaomi_sagit.dts new file mode 100644 index 000000000000..3b331d0e5283 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8998_xiaomi_sagit.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8998-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xd100>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&qusb2phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts new file mode 100644 index 000000000000..4a43b3f1a51e --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qcm2290-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x120 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts new file mode 100644 index 000000000000..c9c921d55e3f --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8cf8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x08c00000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0xa0 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xe0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs404.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs404.dts new file mode 100644 index 000000000000..794bac913137 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs404.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@7678800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,qcs404-dwc3", "qcom,snps-dwc3"; + reg = <0x07580000 0xd100>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "qusb2_phy"; + phys = <&usb2_phy_prim>, + <&usb3_phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@79b8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,qcs404-dwc3", "qcom,snps-dwc3"; + reg = <0x078c0000 0xd000>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "qusb2_phy"; + phys = <&usb2_phy_sec>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs615.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs615.dts new file mode 100644 index 000000000000..52f94ce9c327 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs615.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qcs615-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x140 0x0>; + phys = <&usb_1_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qcs615-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 663 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 662 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0xe0 0x0>; + phys = <&usb_hsphy_2>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts new file mode 100644 index 000000000000..fa843e3ca9ff --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qcs8300-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x80 0x0>; + phys = <&usb_1_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qcs8300-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts new file mode 100644 index 000000000000..8d245859fae1 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qdu1000-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xc0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qru1000.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qru1000.dts new file mode 100644 index 000000000000..8d245859fae1 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_qru1000.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,qdu1000-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xc0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts new file mode 100644 index 000000000000..408d42c1649c --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8150-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x140 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + pinctrl-names = "default"; + pinctrl-0 = <&usb2phy_ac_en1_default>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8150-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x160 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + pinctrl-names = "default"; + pinctrl-0 = <&usb2phy_ac_en2_default>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts new file mode 100644 index 000000000000..553e8ddb91ce --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 127 IRQ_TYPE_EDGE_BOTH>, + <&pdc 126 IRQ_TYPE_EDGE_BOTH>, + <&pdc 129 IRQ_TYPE_EDGE_BOTH>, + <&pdc 128 IRQ_TYPE_EDGE_BOTH>, + <&pdc 131 IRQ_TYPE_EDGE_BOTH>, + <&pdc 130 IRQ_TYPE_EDGE_BOTH>, + <&pdc 133 IRQ_TYPE_EDGE_BOTH>, + <&pdc 132 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "pwr_event_3", + "pwr_event_4", + "hs_phy_1", + "hs_phy_2", + "hs_phy_3", + "hs_phy_4", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "dp_hs_phy_3", + "dm_hs_phy_3", + "dp_hs_phy_4", + "dm_hs_phy_4", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x800 0x0>; + phys = <&usb_2_hsphy0>, + <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, + <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-0", + "usb3-0", + "usb2-1", + "usb3-1", + "usb2-2", + "usb2-3"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x820 0x0>; + phys = <&usb_0_hsphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 136 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x860 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts new file mode 100644 index 000000000000..4f218dbbef8b --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x80 0x0>; + phys = <&usb_0_hsphy>, + <&usb_0_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xa0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sar2130p.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sar2130p.dts new file mode 100644 index 000000000000..582bcf1b13da --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sar2130p.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sar2130p-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_1_hsphy>, + <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7180.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7180.dts new file mode 100644 index 000000000000..cd4caa173891 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7180.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7180-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x540 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7280.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7280.dts new file mode 100644 index 000000000000..c9c921d55e3f --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc7280.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8cf8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x08c00000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0xa0 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xe0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts new file mode 100644 index 000000000000..e875fb9a39aa --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8180x-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 59 IRQ_TYPE_EDGE_BOTH>, + <&pdc 46 IRQ_TYPE_EDGE_BOTH>, + <&pdc 71 IRQ_TYPE_EDGE_BOTH>, + <&pdc 68 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "hs_phy_1", + "hs_phy_2", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x60 0x0>; + phys = <&usb_mp_hsphy0>, + <&usb_mp_qmpphy0>, + <&usb_mp_hsphy1>, + <&usb_mp_qmpphy1>; + phy-names = "usb2-0", + "usb3-0", + "usb2-1", + "usb3-1"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8180x-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x140 0x0>; + phys = <&usb_prim_hsphy>, + <&usb_prim_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8180x-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 40 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x160 0x0>; + phys = <&usb_sec_hsphy>, + <&usb_sec_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp.dts new file mode 100644 index 000000000000..553e8ddb91ce --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp.dts @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 127 IRQ_TYPE_EDGE_BOTH>, + <&pdc 126 IRQ_TYPE_EDGE_BOTH>, + <&pdc 129 IRQ_TYPE_EDGE_BOTH>, + <&pdc 128 IRQ_TYPE_EDGE_BOTH>, + <&pdc 131 IRQ_TYPE_EDGE_BOTH>, + <&pdc 130 IRQ_TYPE_EDGE_BOTH>, + <&pdc 133 IRQ_TYPE_EDGE_BOTH>, + <&pdc 132 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "pwr_event_3", + "pwr_event_4", + "hs_phy_1", + "hs_phy_2", + "hs_phy_3", + "hs_phy_4", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "dp_hs_phy_3", + "dm_hs_phy_3", + "dp_hs_phy_4", + "dm_hs_phy_4", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x800 0x0>; + phys = <&usb_2_hsphy0>, + <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, + <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-0", + "usb3-0", + "usb2-1", + "usb3-1", + "usb2-2", + "usb2-3"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x820 0x0>; + phys = <&usb_0_hsphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 136 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x860 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp_microsoft_blackrock.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp_microsoft_blackrock.dts new file mode 100644 index 000000000000..ce33abdccccf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sc8280xp_microsoft_blackrock.dts @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 127 IRQ_TYPE_EDGE_BOTH>, + <&pdc 126 IRQ_TYPE_EDGE_BOTH>, + <&pdc 129 IRQ_TYPE_EDGE_BOTH>, + <&pdc 128 IRQ_TYPE_EDGE_BOTH>, + <&pdc 131 IRQ_TYPE_EDGE_BOTH>, + <&pdc 130 IRQ_TYPE_EDGE_BOTH>, + <&pdc 133 IRQ_TYPE_EDGE_BOTH>, + <&pdc 132 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "pwr_event_3", + "pwr_event_4", + "hs_phy_1", + "hs_phy_2", + "hs_phy_3", + "hs_phy_4", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "dp_hs_phy_3", + "dm_hs_phy_3", + "dp_hs_phy_4", + "dm_hs_phy_4", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x800 0x0>; + phys = <&usb_2_hsphy0>, + <&usb_2_qmpphy0>; + phy-names = "usb2-0", + "usb3-0"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 138 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x820 0x0>; + phys = <&usb_0_hsphy>, + <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 136 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x860 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sda660.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sda660.dts new file mode 100644 index 000000000000..9628fea2adff --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sda660.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xccd0>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&qusb2phy0>, + <&usb3_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@c2f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0c200000 0xccd0>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&qusb2phy1>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm450.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm450.dts new file mode 100644 index 000000000000..3970f8e38e0f --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm450.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@70f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8953-dwc3", "qcom,snps-dwc3"; + reg = <0x07000000 0xd000>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&hsusb_phy>; + phy-names = "usb2-phy"; + }; + }; + +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm630.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm630.dts new file mode 100644 index 000000000000..eaa7ed8f8062 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm630.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xccd0>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + extcon = <&extcon_usb>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@c2f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0c200000 0xccd0>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&qusb2phy1>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm632.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm632.dts new file mode 100644 index 000000000000..2c2d8e00ab78 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm632.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@70f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,msm8953-dwc3", "qcom,snps-dwc3"; + reg = <0x07000000 0xd000>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "ss_phy_irq"; + phys = <&hsusb_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm636.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm636.dts new file mode 100644 index 000000000000..9628fea2adff --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm636.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xccd0>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&qusb2phy0>, + <&usb3_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + extcon = <&extcon_usb>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@c2f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0c200000 0xccd0>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&qusb2phy1>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm660.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm660.dts new file mode 100644 index 000000000000..eaa7ed8f8062 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm660.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0a800000 0xccd0>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + extcon = <&extcon_usb>; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@c2f8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sdm660-dwc3", "qcom,snps-dwc3"; + reg = <0x0c200000 0xccd0>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq"; + phys = <&qusb2phy1>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm670.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm670.dts new file mode 100644 index 000000000000..baf418df6b54 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm670.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm670-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845.dts new file mode 100644 index 000000000000..292ea571e040 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lenovo_yoga_c630.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lenovo_yoga_c630.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lenovo_yoga_c630.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_qcom_sdm845_mtp.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_qcom_sdm845_mtp.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_qcom_sdm845_mtp.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_starqltechn.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_starqltechn.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_starqltechn.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_w737.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_w737.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_samsung_w737.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_shift_axolotl.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_shift_axolotl.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_shift_axolotl.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_thundercomm_db845c.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_thundercomm_db845c.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_thundercomm_db845c.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts new file mode 100644 index 000000000000..4226f03daba5 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x740 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x760 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx75.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx75.dts new file mode 100644 index 000000000000..b1ce092b3231 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx75.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sdx75-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_RISING>, + <&pdc 10 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "dwc_usb3", + "hs_phy_irq", + "ss_phy_irq", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; + iommus = <&apps_smmu 0x80 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250.dts new file mode 100644 index 000000000000..a05c49f22fd3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sm6115-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x120 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250_oneplus_billie2.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250_oneplus_billie2.dts new file mode 100644 index 000000000000..f250d65b780a --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm4250_oneplus_billie2.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sm6115-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x120 0x0>; + phys = <&usb_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115.dts new file mode 100644 index 000000000000..a05c49f22fd3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sm6115-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x120 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115_lenovo_j606f.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115_lenovo_j606f.dts new file mode 100644 index 000000000000..f250d65b780a --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6115_lenovo_j606f.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sm6115-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x120 0x0>; + phys = <&usb_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6125.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6125.dts new file mode 100644 index 000000000000..a01921cc6c13 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6125.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + __overlay__ { + compatible = "qcom,sm6125-dwc3", "qcom,snps-dwc3"; + reg = <0x04e00000 0xd100>; + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x100 0x0>; + phys = <&hsusb_phy1>; + phy-names = "usb2-phy"; + extcon = <&extcon_usb>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6350.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6350.dts new file mode 100644 index 000000000000..b5063b99fe64 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6350.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm6350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x540 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6375.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6375.dts new file mode 100644 index 000000000000..a6d83c3d913b --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm6375.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@4ef8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm6375-dwc3", "qcom,snps-dwc3"; + reg = <0 0x04e00000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 94 IRQ_TYPE_EDGE_BOTH>, + <&mpm 93 IRQ_TYPE_EDGE_BOTH>, + <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xe0 0x0>; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7125.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7125.dts new file mode 100644 index 000000000000..cd4caa173891 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7125.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7180-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x540 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7225.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7225.dts new file mode 100644 index 000000000000..b5063b99fe64 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7225.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm6350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x540 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7325.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7325.dts new file mode 100644 index 000000000000..04a9ba7a63d6 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm7325.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@8cf8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x08c00000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0xa0 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xe400>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0xe0 0x0>; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8150.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8150.dts new file mode 100644 index 000000000000..7ce8433b3f85 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8150.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8150-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x140 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8150-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x160 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250.dts new file mode 100644 index 000000000000..874569a52924 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8250-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8250-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250_xiaomi_elish.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250_xiaomi_elish.dts new file mode 100644 index 000000000000..52fe5eb3f40e --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8250_xiaomi_elish.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8250-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8250-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350.dts new file mode 100644 index 000000000000..f25c7d330eb2 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_microsoft_surface_duo2.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_microsoft_surface_duo2.dts new file mode 100644 index 000000000000..f25c7d330eb2 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_microsoft_surface_duo2.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_hdk.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_hdk.dts new file mode 100644 index 000000000000..a68a5bb194b3 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_hdk.dts @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + pinctrl-names = "default"; + pinctrl-0 = <&usb_hub_enabled_state>; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_mtp.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_mtp.dts new file mode 100644 index 000000000000..f25c7d330eb2 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_qcom_sm8350_mtp.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx214_generic.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx214_generic.dts new file mode 100644 index 000000000000..f25c7d330eb2 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx214_generic.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx215_generic.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx215_generic.dts new file mode 100644 index 000000000000..f25c7d330eb2 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8350_sony_pdx215_generic.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8350-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x20 0x0>; + phys = <&usb_2_hsphy>, + <&usb_2_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8450.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8450.dts new file mode 100644 index 000000000000..c3454cc229cf --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8450.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8450-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x0 0x0>; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8550.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8550.dts new file mode 100644 index 000000000000..3d94046e75ae --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8550.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8550-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x40 0x0>; + phys = <&usb_1_hsphy>, + <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8650.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8650.dts new file mode 100644 index 000000000000..dd0f6a727d5c --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sm8650.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,sm8650-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_RISING>, + <&pdc 15 IRQ_TYPE_EDGE_RISING>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x40 0x0>; + phys = <&usb_1_hsphy>, + <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100.dts new file mode 100644 index 000000000000..231c9b3c0357 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100.dts @@ -0,0 +1,153 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a0f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a000000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 58 IRQ_TYPE_EDGE_BOTH>, + <&pdc 57 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x14a0 0x0>; + phys = <&usb_1_ss2_hsphy>, + <&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a2f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a200000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 50 IRQ_TYPE_EDGE_BOTH>, + <&pdc 49 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0x14e0 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 52 IRQ_TYPE_EDGE_BOTH>, + <&pdc 51 IRQ_TYPE_EDGE_BOTH>, + <&pdc 54 IRQ_TYPE_EDGE_BOTH>, + <&pdc 53 IRQ_TYPE_EDGE_BOTH>, + <&pdc 55 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 56 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "hs_phy_1", + "hs_phy_2", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x1400 0x0>; + phys = <&usb_mp_hsphy0>, + <&usb_mp_qmpphy0>, + <&usb_mp_hsphy1>, + <&usb_mp_qmpphy1>; + phy-names = "usb2-0", + "usb3-0", + "usb2-1", + "usb3-1"; + }; + }; + + fragment@3 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 61 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1420 0x0>; + phys = <&usb_1_ss0_hsphy>, + <&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@4 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 60 IRQ_TYPE_EDGE_BOTH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 47 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1460 0x0>; + phys = <&usb_1_ss1_hsphy>, + <&usb_1_ss1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100_hp_omnibook_x14.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100_hp_omnibook_x14.dts new file mode 100644 index 000000000000..29e9a870c20c --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_x1e80100_hp_omnibook_x14.dts @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy-qcom-qmp.h> + +/ { + fragment@0 { + target-path = "/soc@0/usb@a0f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a000000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 58 IRQ_TYPE_EDGE_BOTH>, + <&pdc 57 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x14a0 0x0>; + phys = <&usb_1_ss2_hsphy>, + <&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc@0/usb@a2f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a200000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 50 IRQ_TYPE_EDGE_BOTH>, + <&pdc 49 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + iommus = <&apps_smmu 0x14e0 0x0>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@2 { + target-path = "/soc@0/usb@a4f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 52 IRQ_TYPE_EDGE_BOTH>, + <&pdc 51 IRQ_TYPE_EDGE_BOTH>, + <&pdc 54 IRQ_TYPE_EDGE_BOTH>, + <&pdc 53 IRQ_TYPE_EDGE_BOTH>, + <&pdc 55 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 56 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event_1", + "pwr_event_2", + "hs_phy_1", + "hs_phy_2", + "dp_hs_phy_1", + "dm_hs_phy_1", + "dp_hs_phy_2", + "dm_hs_phy_2", + "ss_phy_1", + "ss_phy_2"; + iommus = <&apps_smmu 0x1400 0x0>; + phys = <&usb_mp_hsphy0>, + <&usb_mp_qmpphy0>; + phy-names = "usb2-0", + "usb3-0"; + }; + }; + + fragment@3 { + target-path = "/soc@0/usb@a6f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 61 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1420 0x0>; + phys = <&usb_1_ss0_hsphy>, + <&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@4 { + target-path = "/soc@0/usb@a8f8800"; + #address-cells = <2>; + #size-cells = <2>; + + __overlay__ { + compatible = "qcom,x1e80100-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0xd100>; + interrupts-extended = <&intc GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 60 IRQ_TYPE_EDGE_BOTH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 47 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1460 0x0>; + phys = <&usb_1_ss1_hsphy>, + <&usb_1_ss1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays 2025-01-14 5:11 ` [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays Bjorn Andersson @ 2025-01-14 17:42 ` Rob Herring 2025-01-14 22:46 ` Bjorn Andersson 0 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2025-01-14 17:42 UTC (permalink / raw) To: Bjorn Andersson Cc: Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Mon, Jan 13, 2025 at 09:11:39PM -0800, Bjorn Andersson wrote: > Introduce the overlays necessary for migrating Qualcomm Arm64 boards > currently present in the upstream Linux kernel. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> > --- > drivers/of/overlays/dwc3-flattening/Makefile | 84 +++ > .../of/overlays/dwc3-flattening/dwc3-flattening.c | 588 +++++++++++++++++++++ > .../of/overlays/dwc3-flattening/dwc3-flattening.h | 168 ++++++ > .../overlays/dwc3-flattening/dwc3-qcom_apq8094.dts | 32 ++ .dtso is the preferred extension. > .../overlays/dwc3-flattening/dwc3-qcom_apq8096.dts | 60 +++ > .../dwc3-qcom_apq8096_inforce_ifc6640.dts | 58 ++ > .../overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts | 28 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts | 58 ++ > .../overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts | 54 ++ > .../overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts | 58 ++ > .../overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts | 29 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8953.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_msm8992.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_msm8994.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_msm8996.dts | 58 ++ > .../dwc3-qcom_msm8996_oneplus_oneplus3.dts | 56 ++ > .../dwc3-qcom_msm8996_oneplus_oneplus3t.dts | 56 ++ > .../dwc3-qcom_msm8996_sony_dora_row.dts | 57 ++ > .../dwc3-qcom_msm8996_sony_kagura_row.dts | 57 ++ > .../dwc3-qcom_msm8996_sony_keyaki_row.dts | 57 ++ > .../dwc3-qcom_msm8996_xiaomi_gemini.dts | 56 ++ > .../dwc3-qcom_msm8996_xiaomi_natrium.dts | 56 ++ > .../dwc3-qcom_msm8996_xiaomi_scorpio.dts | 56 ++ > .../overlays/dwc3-flattening/dwc3-qcom_msm8998.dts | 34 ++ > .../dwc3-qcom_msm8998_fxtec_pro1.dts | 35 ++ > .../dwc3-qcom_msm8998_oneplus_cheeseburger.dts | 32 ++ > .../dwc3-qcom_msm8998_oneplus_dumpling.dts | 32 ++ > .../dwc3-qcom_msm8998_sony_xperia_lilac.dts | 35 ++ > .../dwc3-qcom_msm8998_sony_xperia_maple.dts | 35 ++ > .../dwc3-qcom_msm8998_sony_xperia_poplar.dts | 35 ++ > .../dwc3-qcom_msm8998_xiaomi_sagit.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts | 63 +++ > .../overlays/dwc3-flattening/dwc3-qcom_qcs404.dts | 56 ++ > .../overlays/dwc3-flattening/dwc3-qcom_qcs615.dts | 62 +++ > .../overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts | 62 +++ > .../overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts | 38 ++ > .../overlays/dwc3-flattening/dwc3-qcom_qru1000.dts | 38 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts | 71 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts | 129 +++++ > .../overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts | 90 ++++ > .../dwc3-flattening/dwc3-qcom_sar2130p.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sc7180.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sc7280.dts | 63 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts | 109 ++++ > .../dwc3-flattening/dwc3-qcom_sc8280xp.dts | 129 +++++ > .../dwc3-qcom_sc8280xp_microsoft_blackrock.dts | 121 +++++ > .../overlays/dwc3-flattening/dwc3-qcom_sda660.dts | 59 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm450.dts | 33 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm630.dts | 57 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm632.dts | 32 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm636.dts | 59 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm660.dts | 57 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm670.dts | 36 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sdm845.dts | 64 +++ > .../dwc3-qcom_sdm845_lenovo_yoga_c630.dts | 67 +++ > .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts | 67 +++ > .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts | 67 +++ > .../dwc3-qcom_sdm845_qcom_sdm845_mtp.dts | 67 +++ > .../dwc3-qcom_sdm845_samsung_starqltechn.dts | 67 +++ > .../dwc3-qcom_sdm845_samsung_w737.dts | 67 +++ > .../dwc3-qcom_sdm845_shift_axolotl.dts | 67 +++ > .../dwc3-qcom_sdm845_thundercomm_db845c.dts | 67 +++ > .../dwc3-qcom_sdm845_xiaomi_beryllium.dts | 67 +++ > .../dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts | 67 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sdx75.dts | 36 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm4250.dts | 37 ++ > .../dwc3-qcom_sm4250_oneplus_billie2.dts | 35 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm6115.dts | 37 ++ > .../dwc3-qcom_sm6115_lenovo_j606f.dts | 35 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm6125.dts | 36 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm6350.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm6375.dts | 36 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm7125.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm7225.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm7325.dts | 60 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8150.dts | 67 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8250.dts | 67 +++ > .../dwc3-qcom_sm8250_xiaomi_elish.dts | 64 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8350.dts | 67 +++ > .../dwc3-qcom_sm8350_microsoft_surface_duo2.dts | 67 +++ > .../dwc3-qcom_sm8350_qcom_sm8350_hdk.dts | 69 +++ > .../dwc3-qcom_sm8350_qcom_sm8350_mtp.dts | 67 +++ > .../dwc3-qcom_sm8350_sony_pdx214_generic.dts | 67 +++ > .../dwc3-qcom_sm8350_sony_pdx215_generic.dts | 67 +++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8450.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8550.dts | 39 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sm8650.dts | 39 ++ > .../dwc3-flattening/dwc3-qcom_x1e80100.dts | 153 ++++++ > .../dwc3-qcom_x1e80100_hp_omnibook_x14.dts | 149 ++++++ > 91 files changed, 5782 insertions(+) > > diff --git a/drivers/of/overlays/dwc3-flattening/Makefile b/drivers/of/overlays/dwc3-flattening/Makefile > index 248ddabd424e..afc509d97d1b 100644 > --- a/drivers/of/overlays/dwc3-flattening/Makefile > +++ b/drivers/of/overlays/dwc3-flattening/Makefile > @@ -2,9 +2,93 @@ > > obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening-overlay.o > dwc3-flattening-overlay-y += dwc3-flattening.o > +dwc3-flattening-overlay-y += dwc3-qcom_apq8094.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_apq8096.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_apq8096_inforce_ifc6640.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_ipq4018.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_ipq4018_8dev_jalapeno.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_ipq4019.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq5018.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq5332.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq5424.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq6018.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_ipq8064.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq8074.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_ipq9574.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8953.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8992.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8994.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_oneplus_oneplus3.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_oneplus_oneplus3t.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_dora_row.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_kagura_row.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_sony_keyaki_row.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_gemini.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_natrium.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8996_xiaomi_scorpio.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_fxtec_pro1.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_oneplus_cheeseburger.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_oneplus_dumpling.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_lilac.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_maple.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_sony_xperia_poplar.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_msm8998_xiaomi_sagit.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qcm2290.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qcm6490.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qcs404.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qcs615.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qcs8300.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qdu1000.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_qru1000.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sa8155p.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sa8540p.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sa8775p.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sar2130p.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sc7180.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sc7280.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sc8180x.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sc8280xp.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sc8280xp_microsoft_blackrock.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sda660.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm450.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm630.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm632.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm636.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm660.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm670.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lenovo_yoga_c630.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lg_judyln.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_lg_judyp.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_qcom_sdm845_mtp.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_samsung_starqltechn.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_samsung_w737.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_shift_axolotl.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_thundercomm_db845c.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_xiaomi_beryllium.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_sdx55.dtb.o > dwc3-flattening-overlay-y += dwc3-qcom_sdx65.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sdx75.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm4250.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm4250_oneplus_billie2.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm6115.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm6115_lenovo_j606f.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm6125.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm6350.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm6375.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm7125.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm7225.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm7325.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8150.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8250.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8250_xiaomi_elish.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8350.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8350_qcom_sm8350_hdk.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8450.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8550.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_sm8650.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100.dtb.o > +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100_hp_omnibook_x14.dtb.o Some of these platforms are quite new. I think they could tolerate a flag day. It's your fault for knowing this is a problem and continuing to accept new users... For the ones we do maintain compatibility, I would like to define some timeframe for doing so. This would be a lot of stuff to keep forever. I suspect the ABI gets broken anyways and/or there are new features enabled. > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > index 0a3a31c5088b..d33cdf6661c0 100644 > --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > @@ -21,6 +21,24 @@ struct dwc3_overlay_data { > const char *migrate_match; > }; > > +static const struct dwc3_overlay_data dwc3_qcom_apq8094_overlay = { Can't all these be init section? It's a lot of bloat for everyone else otherwise. Same issue for the overlays themselves. The one that you apply should be copied out of init. > + .fdt = __dtb_dwc3_qcom_apq8094_begin, > + .end = __dtb_dwc3_qcom_apq8094_end, > + .migrate_match = "qcom,dwc3", This is the same everywhere AFAICT, so why do we need it? > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_apq8096_overlay = { > + .fdt = __dtb_dwc3_qcom_apq8096_begin, > + .end = __dtb_dwc3_qcom_apq8096_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_apq8096_inforce_ifc6640_overlay = { > + .fdt = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_begin, > + .end = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_end, > + .migrate_match = "qcom,dwc3", > +}; > + > static const struct dwc3_overlay_data dwc3_qcom_ipq4018_overlay = { > .fdt = __dtb_dwc3_qcom_ipq4018_begin, > .end = __dtb_dwc3_qcom_ipq4018_end, > @@ -39,12 +57,372 @@ static const struct dwc3_overlay_data dwc3_qcom_ipq4019_overlay = { > .migrate_match = "qcom,dwc3", > }; > > +static const struct dwc3_overlay_data dwc3_qcom_ipq5018_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq5018_begin, > + .end = __dtb_dwc3_qcom_ipq5018_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_ipq5332_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq5332_begin, > + .end = __dtb_dwc3_qcom_ipq5332_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_ipq5424_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq5424_begin, > + .end = __dtb_dwc3_qcom_ipq5424_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_ipq6018_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq6018_begin, > + .end = __dtb_dwc3_qcom_ipq6018_end, > + .migrate_match = "qcom,dwc3", > +}; > + > static const struct dwc3_overlay_data dwc3_qcom_ipq8064_overlay = { > .fdt = __dtb_dwc3_qcom_ipq8064_begin, > .end = __dtb_dwc3_qcom_ipq8064_end, > .migrate_match = "qcom,dwc3", > }; > > +static const struct dwc3_overlay_data dwc3_qcom_ipq8074_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq8074_begin, > + .end = __dtb_dwc3_qcom_ipq8074_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_ipq9574_overlay = { > + .fdt = __dtb_dwc3_qcom_ipq9574_begin, > + .end = __dtb_dwc3_qcom_ipq9574_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8953_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8953_begin, > + .end = __dtb_dwc3_qcom_msm8953_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8992_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8992_begin, > + .end = __dtb_dwc3_qcom_msm8992_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8994_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8994_begin, > + .end = __dtb_dwc3_qcom_msm8994_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_begin, > + .end = __dtb_dwc3_qcom_msm8996_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_begin, > + .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3t_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_begin, > + .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_dora_row_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_sony_dora_row_begin, > + .end = __dtb_dwc3_qcom_msm8996_sony_dora_row_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_kagura_row_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_sony_kagura_row_begin, > + .end = __dtb_dwc3_qcom_msm8996_sony_kagura_row_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_keyaki_row_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_begin, > + .end = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_gemini_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_begin, > + .end = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_natrium_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_begin, > + .end = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_scorpio_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_begin, > + .end = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_begin, > + .end = __dtb_dwc3_qcom_msm8998_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_fxtec_pro1_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_fxtec_pro1_begin, > + .end = __dtb_dwc3_qcom_msm8998_fxtec_pro1_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_cheeseburger_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_begin, > + .end = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_dumpling_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_begin, > + .end = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_lilac_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_begin, > + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_maple_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_begin, > + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_poplar_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_begin, > + .end = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_msm8998_xiaomi_sagit_overlay = { > + .fdt = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_begin, > + .end = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qcm2290_overlay = { > + .fdt = __dtb_dwc3_qcom_qcm2290_begin, > + .end = __dtb_dwc3_qcom_qcm2290_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qcm6490_overlay = { > + .fdt = __dtb_dwc3_qcom_qcm6490_begin, > + .end = __dtb_dwc3_qcom_qcm6490_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qcs404_overlay = { > + .fdt = __dtb_dwc3_qcom_qcs404_begin, > + .end = __dtb_dwc3_qcom_qcs404_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qcs615_overlay = { > + .fdt = __dtb_dwc3_qcom_qcs615_begin, > + .end = __dtb_dwc3_qcom_qcs615_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qcs8300_overlay = { > + .fdt = __dtb_dwc3_qcom_qcs8300_begin, > + .end = __dtb_dwc3_qcom_qcs8300_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qdu1000_overlay = { > + .fdt = __dtb_dwc3_qcom_qdu1000_begin, > + .end = __dtb_dwc3_qcom_qdu1000_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_qru1000_overlay = { > + .fdt = __dtb_dwc3_qcom_qru1000_begin, > + .end = __dtb_dwc3_qcom_qru1000_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sa8155p_overlay = { > + .fdt = __dtb_dwc3_qcom_sa8155p_begin, > + .end = __dtb_dwc3_qcom_sa8155p_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sa8540p_overlay = { > + .fdt = __dtb_dwc3_qcom_sa8540p_begin, > + .end = __dtb_dwc3_qcom_sa8540p_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sa8775p_overlay = { > + .fdt = __dtb_dwc3_qcom_sa8775p_begin, > + .end = __dtb_dwc3_qcom_sa8775p_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sar2130p_overlay = { > + .fdt = __dtb_dwc3_qcom_sar2130p_begin, > + .end = __dtb_dwc3_qcom_sar2130p_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sc7180_overlay = { > + .fdt = __dtb_dwc3_qcom_sc7180_begin, > + .end = __dtb_dwc3_qcom_sc7180_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sc7280_overlay = { > + .fdt = __dtb_dwc3_qcom_sc7280_begin, > + .end = __dtb_dwc3_qcom_sc7280_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sc8180x_overlay = { > + .fdt = __dtb_dwc3_qcom_sc8180x_begin, > + .end = __dtb_dwc3_qcom_sc8180x_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_overlay = { > + .fdt = __dtb_dwc3_qcom_sc8280xp_begin, > + .end = __dtb_dwc3_qcom_sc8280xp_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_microsoft_blackrock_overlay = { > + .fdt = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_begin, > + .end = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sda660_overlay = { > + .fdt = __dtb_dwc3_qcom_sda660_begin, > + .end = __dtb_dwc3_qcom_sda660_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm450_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm450_begin, > + .end = __dtb_dwc3_qcom_sdm450_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm630_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm630_begin, > + .end = __dtb_dwc3_qcom_sdm630_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm632_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm632_begin, > + .end = __dtb_dwc3_qcom_sdm632_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm636_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm636_begin, > + .end = __dtb_dwc3_qcom_sdm636_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm660_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm660_begin, > + .end = __dtb_dwc3_qcom_sdm660_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm670_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm670_begin, > + .end = __dtb_dwc3_qcom_sdm670_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_begin, > + .end = __dtb_dwc3_qcom_sdm845_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lenovo_yoga_c630_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_begin, > + .end = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyln_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_lg_judyln_begin, > + .end = __dtb_dwc3_qcom_sdm845_lg_judyln_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyp_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_lg_judyp_begin, > + .end = __dtb_dwc3_qcom_sdm845_lg_judyp_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_qcom_sdm845_mtp_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_begin, > + .end = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_starqltechn_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_begin, > + .end = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_w737_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_samsung_w737_begin, > + .end = __dtb_dwc3_qcom_sdm845_samsung_w737_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_shift_axolotl_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_shift_axolotl_begin, > + .end = __dtb_dwc3_qcom_sdm845_shift_axolotl_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_thundercomm_db845c_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_begin, > + .end = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_begin, > + .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_overlay = { > + .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_begin, > + .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_end, > + .migrate_match = "qcom,dwc3", > +}; > + > static const struct dwc3_overlay_data dwc3_qcom_sdx55_overlay = { > .fdt = __dtb_dwc3_qcom_sdx55_begin, > .end = __dtb_dwc3_qcom_sdx55_end, > @@ -57,13 +435,223 @@ static const struct dwc3_overlay_data dwc3_qcom_sdx65_overlay = { > .migrate_match = "qcom,dwc3", > }; > > +static const struct dwc3_overlay_data dwc3_qcom_sdx75_overlay = { > + .fdt = __dtb_dwc3_qcom_sdx75_begin, > + .end = __dtb_dwc3_qcom_sdx75_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm4250_overlay = { > + .fdt = __dtb_dwc3_qcom_sm4250_begin, > + .end = __dtb_dwc3_qcom_sm4250_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm4250_oneplus_billie2_overlay = { > + .fdt = __dtb_dwc3_qcom_sm4250_oneplus_billie2_begin, > + .end = __dtb_dwc3_qcom_sm4250_oneplus_billie2_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm6115_overlay = { > + .fdt = __dtb_dwc3_qcom_sm6115_begin, > + .end = __dtb_dwc3_qcom_sm6115_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm6115_lenovo_j606f_overlay = { > + .fdt = __dtb_dwc3_qcom_sm6115_lenovo_j606f_begin, > + .end = __dtb_dwc3_qcom_sm6115_lenovo_j606f_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm6125_overlay = { > + .fdt = __dtb_dwc3_qcom_sm6125_begin, > + .end = __dtb_dwc3_qcom_sm6125_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm6350_overlay = { > + .fdt = __dtb_dwc3_qcom_sm6350_begin, > + .end = __dtb_dwc3_qcom_sm6350_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm6375_overlay = { > + .fdt = __dtb_dwc3_qcom_sm6375_begin, > + .end = __dtb_dwc3_qcom_sm6375_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm7125_overlay = { > + .fdt = __dtb_dwc3_qcom_sm7125_begin, > + .end = __dtb_dwc3_qcom_sm7125_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm7225_overlay = { > + .fdt = __dtb_dwc3_qcom_sm7225_begin, > + .end = __dtb_dwc3_qcom_sm7225_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm7325_overlay = { > + .fdt = __dtb_dwc3_qcom_sm7325_begin, > + .end = __dtb_dwc3_qcom_sm7325_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8150_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8150_begin, > + .end = __dtb_dwc3_qcom_sm8150_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8250_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8250_begin, > + .end = __dtb_dwc3_qcom_sm8250_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8250_xiaomi_elish_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8250_xiaomi_elish_begin, > + .end = __dtb_dwc3_qcom_sm8250_xiaomi_elish_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8350_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8350_begin, > + .end = __dtb_dwc3_qcom_sm8350_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8350_qcom_sm8350_hdk_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_begin, > + .end = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8450_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8450_begin, > + .end = __dtb_dwc3_qcom_sm8450_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8550_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8550_begin, > + .end = __dtb_dwc3_qcom_sm8550_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_sm8650_overlay = { > + .fdt = __dtb_dwc3_qcom_sm8650_begin, > + .end = __dtb_dwc3_qcom_sm8650_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_x1e80100_overlay = { > + .fdt = __dtb_dwc3_qcom_x1e80100_begin, > + .end = __dtb_dwc3_qcom_x1e80100_end, > + .migrate_match = "qcom,dwc3", > +}; > + > +static const struct dwc3_overlay_data dwc3_qcom_x1e80100_hp_omnibook_x14_overlay = { > + .fdt = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_begin, > + .end = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_end, > + .migrate_match = "qcom,dwc3", > +}; > + > static const struct of_device_id dwc3_flatten_of_match[] = { > { .compatible = "8dev,jalapeno", .data = &dwc3_qcom_ipq4018_8dev_jalapeno_overlay }, > + { .compatible = "fxtec,pro1", .data = &dwc3_qcom_msm8998_fxtec_pro1_overlay }, > + { .compatible = "hp,omnibook-x14", .data = &dwc3_qcom_x1e80100_hp_omnibook_x14_overlay }, > + { .compatible = "inforce,ifc6640", .data = &dwc3_qcom_apq8096_inforce_ifc6640_overlay }, > + { .compatible = "lenovo,j606f", .data = &dwc3_qcom_sm6115_lenovo_j606f_overlay }, > + { .compatible = "lenovo,yoga-c630", .data = &dwc3_qcom_sdm845_lenovo_yoga_c630_overlay }, > + { .compatible = "lg,judyln", .data = &dwc3_qcom_sdm845_lg_judyln_overlay }, > + { .compatible = "lg,judyp", .data = &dwc3_qcom_sdm845_lg_judyp_overlay }, > + { .compatible = "microsoft,blackrock", .data = &dwc3_qcom_sc8280xp_microsoft_blackrock_overlay }, > + { .compatible = "oneplus,billie2", .data = &dwc3_qcom_sm4250_oneplus_billie2_overlay }, > + { .compatible = "oneplus,cheeseburger", .data = &dwc3_qcom_msm8998_oneplus_cheeseburger_overlay }, > + { .compatible = "oneplus,dumpling", .data = &dwc3_qcom_msm8998_oneplus_dumpling_overlay }, > + { .compatible = "oneplus,oneplus3", .data = &dwc3_qcom_msm8996_oneplus_oneplus3_overlay }, > + { .compatible = "oneplus,oneplus3t", .data = &dwc3_qcom_msm8996_oneplus_oneplus3t_overlay }, > + { .compatible = "qcom,apq8094", .data = &dwc3_qcom_apq8094_overlay }, > + { .compatible = "qcom,apq8096", .data = &dwc3_qcom_apq8096_overlay }, > { .compatible = "qcom,ipq4018", .data = &dwc3_qcom_ipq4018_overlay }, > { .compatible = "qcom,ipq4019", .data = &dwc3_qcom_ipq4019_overlay }, > + { .compatible = "qcom,ipq5018", .data = &dwc3_qcom_ipq5018_overlay }, > + { .compatible = "qcom,ipq5332", .data = &dwc3_qcom_ipq5332_overlay }, > + { .compatible = "qcom,ipq5424", .data = &dwc3_qcom_ipq5424_overlay }, > + { .compatible = "qcom,ipq6018", .data = &dwc3_qcom_ipq6018_overlay }, > { .compatible = "qcom,ipq8064", .data = &dwc3_qcom_ipq8064_overlay }, > + { .compatible = "qcom,ipq8074", .data = &dwc3_qcom_ipq8074_overlay }, > + { .compatible = "qcom,ipq9574", .data = &dwc3_qcom_ipq9574_overlay }, > + { .compatible = "qcom,msm8953", .data = &dwc3_qcom_msm8953_overlay }, > + { .compatible = "qcom,msm8992", .data = &dwc3_qcom_msm8992_overlay }, > + { .compatible = "qcom,msm8994", .data = &dwc3_qcom_msm8994_overlay }, > + { .compatible = "qcom,msm8996", .data = &dwc3_qcom_msm8996_overlay }, > + { .compatible = "qcom,msm8998", .data = &dwc3_qcom_msm8998_overlay }, > + { .compatible = "qcom,qcm2290", .data = &dwc3_qcom_qcm2290_overlay }, > + { .compatible = "qcom,qcm6490", .data = &dwc3_qcom_qcm6490_overlay }, > + { .compatible = "qcom,qcs404", .data = &dwc3_qcom_qcs404_overlay }, > + { .compatible = "qcom,qcs615", .data = &dwc3_qcom_qcs615_overlay }, > + { .compatible = "qcom,qcs8300", .data = &dwc3_qcom_qcs8300_overlay }, > + { .compatible = "qcom,qdu1000", .data = &dwc3_qcom_qdu1000_overlay }, > + { .compatible = "qcom,qru1000", .data = &dwc3_qcom_qru1000_overlay }, > + { .compatible = "qcom,sa8155p", .data = &dwc3_qcom_sa8155p_overlay }, > + { .compatible = "qcom,sa8540p", .data = &dwc3_qcom_sa8540p_overlay }, > + { .compatible = "qcom,sa8775p", .data = &dwc3_qcom_sa8775p_overlay }, > + { .compatible = "qcom,sar2130p", .data = &dwc3_qcom_sar2130p_overlay }, > + { .compatible = "qcom,sc7180", .data = &dwc3_qcom_sc7180_overlay }, > + { .compatible = "qcom,sc7280", .data = &dwc3_qcom_sc7280_overlay }, > + { .compatible = "qcom,sc8180x", .data = &dwc3_qcom_sc8180x_overlay }, > + { .compatible = "qcom,sc8280xp", .data = &dwc3_qcom_sc8280xp_overlay }, > + { .compatible = "qcom,sda660", .data = &dwc3_qcom_sda660_overlay }, > + { .compatible = "qcom,sdm450", .data = &dwc3_qcom_sdm450_overlay }, > + { .compatible = "qcom,sdm630", .data = &dwc3_qcom_sdm630_overlay }, > + { .compatible = "qcom,sdm632", .data = &dwc3_qcom_sdm632_overlay }, > + { .compatible = "qcom,sdm636", .data = &dwc3_qcom_sdm636_overlay }, > + { .compatible = "qcom,sdm660", .data = &dwc3_qcom_sdm660_overlay }, > + { .compatible = "qcom,sdm670", .data = &dwc3_qcom_sdm670_overlay }, > + { .compatible = "qcom,sdm845", .data = &dwc3_qcom_sdm845_overlay }, > + { .compatible = "qcom,sdm845-mtp", .data = &dwc3_qcom_sdm845_qcom_sdm845_mtp_overlay }, > { .compatible = "qcom,sdx55", .data = &dwc3_qcom_sdx55_overlay }, > { .compatible = "qcom,sdx65", .data = &dwc3_qcom_sdx65_overlay }, > + { .compatible = "qcom,sdx75", .data = &dwc3_qcom_sdx75_overlay }, > + { .compatible = "qcom,sm4250", .data = &dwc3_qcom_sm4250_overlay }, > + { .compatible = "qcom,sm6115", .data = &dwc3_qcom_sm6115_overlay }, > + { .compatible = "qcom,sm6125", .data = &dwc3_qcom_sm6125_overlay }, > + { .compatible = "qcom,sm6350", .data = &dwc3_qcom_sm6350_overlay }, > + { .compatible = "qcom,sm6375", .data = &dwc3_qcom_sm6375_overlay }, > + { .compatible = "qcom,sm7125", .data = &dwc3_qcom_sm7125_overlay }, > + { .compatible = "qcom,sm7225", .data = &dwc3_qcom_sm7225_overlay }, > + { .compatible = "qcom,sm7325", .data = &dwc3_qcom_sm7325_overlay }, > + { .compatible = "qcom,sm8150", .data = &dwc3_qcom_sm8150_overlay }, > + { .compatible = "qcom,sm8250", .data = &dwc3_qcom_sm8250_overlay }, > + { .compatible = "qcom,sm8350", .data = &dwc3_qcom_sm8350_overlay }, > + { .compatible = "qcom,sm8350-hdk", .data = &dwc3_qcom_sm8350_qcom_sm8350_hdk_overlay }, > + { .compatible = "qcom,sm8450", .data = &dwc3_qcom_sm8450_overlay }, > + { .compatible = "qcom,sm8550", .data = &dwc3_qcom_sm8550_overlay }, > + { .compatible = "qcom,sm8650", .data = &dwc3_qcom_sm8650_overlay }, > + { .compatible = "qcom,x1e80100", .data = &dwc3_qcom_x1e80100_overlay }, > + { .compatible = "samsung,starqltechn", .data = &dwc3_qcom_sdm845_samsung_starqltechn_overlay }, > + { .compatible = "samsung,w737", .data = &dwc3_qcom_sdm845_samsung_w737_overlay }, > + { .compatible = "shift,axolotl", .data = &dwc3_qcom_sdm845_shift_axolotl_overlay }, > + { .compatible = "sony,dora-row", .data = &dwc3_qcom_msm8996_sony_dora_row_overlay }, > + { .compatible = "sony,kagura-row", .data = &dwc3_qcom_msm8996_sony_kagura_row_overlay }, > + { .compatible = "sony,keyaki-row", .data = &dwc3_qcom_msm8996_sony_keyaki_row_overlay }, > + { .compatible = "sony,xperia-lilac", .data = &dwc3_qcom_msm8998_sony_xperia_lilac_overlay }, > + { .compatible = "sony,xperia-maple", .data = &dwc3_qcom_msm8998_sony_xperia_maple_overlay }, > + { .compatible = "sony,xperia-poplar", .data = &dwc3_qcom_msm8998_sony_xperia_poplar_overlay }, > + { .compatible = "thundercomm,db845c", .data = &dwc3_qcom_sdm845_thundercomm_db845c_overlay }, > + { .compatible = "xiaomi,beryllium", .data = &dwc3_qcom_sdm845_xiaomi_beryllium_overlay }, > + { .compatible = "xiaomi,beryllium-ebbg", .data = &dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_overlay }, > + { .compatible = "xiaomi,elish", .data = &dwc3_qcom_sm8250_xiaomi_elish_overlay }, > + { .compatible = "xiaomi,gemini", .data = &dwc3_qcom_msm8996_xiaomi_gemini_overlay }, > + { .compatible = "xiaomi,natrium", .data = &dwc3_qcom_msm8996_xiaomi_natrium_overlay }, > + { .compatible = "xiaomi,sagit", .data = &dwc3_qcom_msm8998_xiaomi_sagit_overlay }, > + { .compatible = "xiaomi,scorpio", .data = &dwc3_qcom_msm8996_xiaomi_scorpio_overlay }, > {} > }; > > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h > index 57d7dbc94980..bc897db4dd1e 100644 > --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h > @@ -4,17 +4,185 @@ > > #include <linux/kernel.h> > > +extern u8 __dtb_dwc3_qcom_apq8094_begin[]; > +extern u8 __dtb_dwc3_qcom_apq8094_end[]; > +extern u8 __dtb_dwc3_qcom_apq8096_begin[]; > +extern u8 __dtb_dwc3_qcom_apq8096_end[]; > +extern u8 __dtb_dwc3_qcom_apq8096_inforce_ifc6640_begin[]; > +extern u8 __dtb_dwc3_qcom_apq8096_inforce_ifc6640_end[]; > extern u8 __dtb_dwc3_qcom_ipq4018_begin[]; > extern u8 __dtb_dwc3_qcom_ipq4018_end[]; > extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin[]; > extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end[]; > extern u8 __dtb_dwc3_qcom_ipq4019_begin[]; > extern u8 __dtb_dwc3_qcom_ipq4019_end[]; > +extern u8 __dtb_dwc3_qcom_ipq5018_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq5018_end[]; > +extern u8 __dtb_dwc3_qcom_ipq5332_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq5332_end[]; > +extern u8 __dtb_dwc3_qcom_ipq5424_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq5424_end[]; > +extern u8 __dtb_dwc3_qcom_ipq6018_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq6018_end[]; > extern u8 __dtb_dwc3_qcom_ipq8064_begin[]; > extern u8 __dtb_dwc3_qcom_ipq8064_end[]; > +extern u8 __dtb_dwc3_qcom_ipq8074_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq8074_end[]; > +extern u8 __dtb_dwc3_qcom_ipq9574_begin[]; > +extern u8 __dtb_dwc3_qcom_ipq9574_end[]; > +extern u8 __dtb_dwc3_qcom_msm8953_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8953_end[]; > +extern u8 __dtb_dwc3_qcom_msm8992_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8992_end[]; > +extern u8 __dtb_dwc3_qcom_msm8994_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8994_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_dora_row_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_dora_row_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_kagura_row_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_kagura_row_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_keyaki_row_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_sony_keyaki_row_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_gemini_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_gemini_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_natrium_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_natrium_end[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_fxtec_pro1_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_fxtec_pro1_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_dumpling_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_oneplus_dumpling_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_maple_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_maple_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_end[]; > +extern u8 __dtb_dwc3_qcom_msm8998_xiaomi_sagit_begin[]; > +extern u8 __dtb_dwc3_qcom_msm8998_xiaomi_sagit_end[]; > +extern u8 __dtb_dwc3_qcom_qcm2290_begin[]; > +extern u8 __dtb_dwc3_qcom_qcm2290_end[]; > +extern u8 __dtb_dwc3_qcom_qcm6490_begin[]; > +extern u8 __dtb_dwc3_qcom_qcm6490_end[]; > +extern u8 __dtb_dwc3_qcom_qcs404_begin[]; > +extern u8 __dtb_dwc3_qcom_qcs404_end[]; > +extern u8 __dtb_dwc3_qcom_qcs615_begin[]; > +extern u8 __dtb_dwc3_qcom_qcs615_end[]; > +extern u8 __dtb_dwc3_qcom_qcs8300_begin[]; > +extern u8 __dtb_dwc3_qcom_qcs8300_end[]; > +extern u8 __dtb_dwc3_qcom_qdu1000_begin[]; > +extern u8 __dtb_dwc3_qcom_qdu1000_end[]; > +extern u8 __dtb_dwc3_qcom_qru1000_begin[]; > +extern u8 __dtb_dwc3_qcom_qru1000_end[]; > +extern u8 __dtb_dwc3_qcom_sa8155p_begin[]; > +extern u8 __dtb_dwc3_qcom_sa8155p_end[]; > +extern u8 __dtb_dwc3_qcom_sa8540p_begin[]; > +extern u8 __dtb_dwc3_qcom_sa8540p_end[]; > +extern u8 __dtb_dwc3_qcom_sa8775p_begin[]; > +extern u8 __dtb_dwc3_qcom_sa8775p_end[]; > +extern u8 __dtb_dwc3_qcom_sar2130p_begin[]; > +extern u8 __dtb_dwc3_qcom_sar2130p_end[]; > +extern u8 __dtb_dwc3_qcom_sc7180_begin[]; > +extern u8 __dtb_dwc3_qcom_sc7180_end[]; > +extern u8 __dtb_dwc3_qcom_sc7280_begin[]; > +extern u8 __dtb_dwc3_qcom_sc7280_end[]; > +extern u8 __dtb_dwc3_qcom_sc8180x_begin[]; > +extern u8 __dtb_dwc3_qcom_sc8180x_end[]; > +extern u8 __dtb_dwc3_qcom_sc8280xp_begin[]; > +extern u8 __dtb_dwc3_qcom_sc8280xp_end[]; > +extern u8 __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_begin[]; > +extern u8 __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_end[]; > +extern u8 __dtb_dwc3_qcom_sda660_begin[]; > +extern u8 __dtb_dwc3_qcom_sda660_end[]; > +extern u8 __dtb_dwc3_qcom_sdm450_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm450_end[]; > +extern u8 __dtb_dwc3_qcom_sdm630_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm630_end[]; > +extern u8 __dtb_dwc3_qcom_sdm632_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm632_end[]; > +extern u8 __dtb_dwc3_qcom_sdm636_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm636_end[]; > +extern u8 __dtb_dwc3_qcom_sdm660_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm660_end[]; > +extern u8 __dtb_dwc3_qcom_sdm670_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm670_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyln_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyln_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyp_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_lg_judyp_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_samsung_starqltechn_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_samsung_starqltechn_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_samsung_w737_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_samsung_w737_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_shift_axolotl_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_shift_axolotl_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_thundercomm_db845c_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_thundercomm_db845c_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_end[]; > +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_begin[]; > +extern u8 __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_end[]; > extern u8 __dtb_dwc3_qcom_sdx55_begin[]; > extern u8 __dtb_dwc3_qcom_sdx55_end[]; > extern u8 __dtb_dwc3_qcom_sdx65_begin[]; > extern u8 __dtb_dwc3_qcom_sdx65_end[]; > +extern u8 __dtb_dwc3_qcom_sdx75_begin[]; > +extern u8 __dtb_dwc3_qcom_sdx75_end[]; > +extern u8 __dtb_dwc3_qcom_sm4250_begin[]; > +extern u8 __dtb_dwc3_qcom_sm4250_end[]; > +extern u8 __dtb_dwc3_qcom_sm4250_oneplus_billie2_begin[]; > +extern u8 __dtb_dwc3_qcom_sm4250_oneplus_billie2_end[]; > +extern u8 __dtb_dwc3_qcom_sm6115_begin[]; > +extern u8 __dtb_dwc3_qcom_sm6115_end[]; > +extern u8 __dtb_dwc3_qcom_sm6115_lenovo_j606f_begin[]; > +extern u8 __dtb_dwc3_qcom_sm6115_lenovo_j606f_end[]; > +extern u8 __dtb_dwc3_qcom_sm6125_begin[]; > +extern u8 __dtb_dwc3_qcom_sm6125_end[]; > +extern u8 __dtb_dwc3_qcom_sm6350_begin[]; > +extern u8 __dtb_dwc3_qcom_sm6350_end[]; > +extern u8 __dtb_dwc3_qcom_sm6375_begin[]; > +extern u8 __dtb_dwc3_qcom_sm6375_end[]; > +extern u8 __dtb_dwc3_qcom_sm7125_begin[]; > +extern u8 __dtb_dwc3_qcom_sm7125_end[]; > +extern u8 __dtb_dwc3_qcom_sm7225_begin[]; > +extern u8 __dtb_dwc3_qcom_sm7225_end[]; > +extern u8 __dtb_dwc3_qcom_sm7325_begin[]; > +extern u8 __dtb_dwc3_qcom_sm7325_end[]; > +extern u8 __dtb_dwc3_qcom_sm8150_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8150_end[]; > +extern u8 __dtb_dwc3_qcom_sm8250_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8250_end[]; > +extern u8 __dtb_dwc3_qcom_sm8250_xiaomi_elish_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8250_xiaomi_elish_end[]; > +extern u8 __dtb_dwc3_qcom_sm8350_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8350_end[]; > +extern u8 __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_end[]; > +extern u8 __dtb_dwc3_qcom_sm8450_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8450_end[]; > +extern u8 __dtb_dwc3_qcom_sm8550_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8550_end[]; > +extern u8 __dtb_dwc3_qcom_sm8650_begin[]; > +extern u8 __dtb_dwc3_qcom_sm8650_end[]; > +extern u8 __dtb_dwc3_qcom_x1e80100_begin[]; > +extern u8 __dtb_dwc3_qcom_x1e80100_end[]; > +extern u8 __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_begin[]; > +extern u8 __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_end[]; > > #endif > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts > new file mode 100644 > index 000000000000..8ca699460ec3 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8094.dts > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@f92f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; > + reg = <0xf9200000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts > new file mode 100644 > index 000000000000..f05d6c905e85 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096.dts > @@ -0,0 +1,60 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@6af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x06a00000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + phys = <&hsusb_phy1>, > + <&usb3phy>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + extcon = <&usb2_id>; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@76f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x07600000 0xd000>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq"; > + phys = <&hsusb_phy2>; > + phy-names = "usb2-phy"; > + extcon = <&usb3_id>; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts > new file mode 100644 > index 000000000000..1b9ae360f1ce > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_apq8096_inforce_ifc6640.dts > @@ -0,0 +1,58 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@6af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x06a00000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + phys = <&hsusb_phy1>, > + <&usb3phy>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@76f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x07600000 0xd000>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq"; > + phys = <&hsusb_phy2>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts > new file mode 100644 > index 000000000000..44266816a50b > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts > @@ -0,0 +1,28 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@8af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq5018-dwc3", "qcom,snps-dwc3"; > + reg = <0x08a00000 0xe400>; > + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "hs_phy_irq"; > + phys = <&usbphy0>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts > new file mode 100644 > index 000000000000..6e6699e4f859 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@8af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq5332-dwc3", "qcom,snps-dwc3"; > + reg = <0x08a00000 0xe400>; > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "dp_hs_phy_irq", > + "dm_hs_phy_irq"; > + phys = <&usbphy0>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts > new file mode 100644 > index 000000000000..e14dc85d8b39 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts > @@ -0,0 +1,58 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb2@1e00000"; > + #address-cells = <2>; > + #size-cells = <2>; > + > + __overlay__ { > + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; > + reg = <0 0x01e00000 0 0xe400>; > + interrupts-extended = <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "dm_hs_phy_irq", > + "dp_hs_phy_irq"; > + phys = <&qusb_phy_1>; > + phy-names = "usb2-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb3@8a00000"; > + #address-cells = <2>; > + #size-cells = <2>; > + > + __overlay__ { > + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; > + reg = <0 0x08a00000 0 0xd100>; > + interrupts-extended = <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "dm_hs_phy_irq", > + "dp_hs_phy_irq"; > + phys = <&qusb_phy_0>, > + <&ssphy_0>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts > new file mode 100644 > index 000000000000..14e7fa720831 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@70f8800"; > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; > + reg = <0 0x07000000 0 0xd100>; > + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy"; > + phys = <&qusb_phy_1>; > + phy-names = "usb2-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@8af8800"; > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; > + reg = <0 0x08a00000 0 0xd100>; > + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "ss_phy_irq"; > + phys = <&qusb_phy_0>, > + <&ssphy_0>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts > new file mode 100644 > index 000000000000..169da32fcd24 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts > @@ -0,0 +1,58 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@8af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; > + reg = <0x08a00000 0xd100>; > + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "ss_phy_irq"; > + phys = <&qusb_phy_0>, > + <&ssphy_0>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@8cf8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; > + reg = <0x08c00000 0xd100>; > + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "ss_phy_irq"; > + phys = <&qusb_phy_1>, > + <&ssphy_1>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts > new file mode 100644 > index 000000000000..ba644dde4845 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts > @@ -0,0 +1,29 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@8af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + __overlay__ { > + compatible = "qcom,ipq9574-dwc3", "qcom,snps-dwc3"; > + reg = <0x08a00000 0xd100>; > + interrupts-extended = <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event"; > + phys = <&usb_0_qusbphy>, > + <&usb_0_qmpphy>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts > new file mode 100644 > index 000000000000..2c2d8e00ab78 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8953.dts > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@70f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8953-dwc3", "qcom,snps-dwc3"; > + reg = <0x07000000 0xd000>; > + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "ss_phy_irq"; > + phys = <&hsusb_phy>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts > new file mode 100644 > index 000000000000..8ca699460ec3 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@f92f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; Should be 8992? If not, this is the same as the next overlay. > + reg = <0xf9200000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts > new file mode 100644 > index 000000000000..8ca699460ec3 > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8994.dts > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@f92f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; > + reg = <0xf9200000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts > new file mode 100644 > index 000000000000..1b9ae360f1ce > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996.dts > @@ -0,0 +1,58 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@6af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x06a00000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + phys = <&hsusb_phy1>, > + <&usb3phy>; > + phy-names = "usb2-phy", > + "usb3-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@76f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x07600000 0xd000>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq"; > + phys = <&hsusb_phy2>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts > new file mode 100644 > index 000000000000..7a583de320cf > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts > @@ -0,0 +1,56 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@6af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x06a00000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; No SS phy, so should be dropped? OTOH, less variation if you keep it. You can utilize includes in overlays just like base .dts files. So this one really just needs to include the previous overlay and override phys and phy-names. > + phys = <&hsusb_phy1>; > + phy-names = "usb2-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@76f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x07600000 0xd000>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq"; > + phys = <&hsusb_phy2>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts > new file mode 100644 > index 000000000000..7a583de320cf > --- /dev/null > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts This looks pretty much like the prior one? > @@ -0,0 +1,56 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + fragment@0 { > + target-path = "/soc@0/usb@6af8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x06a00000 0xd000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq", > + "ss_phy_irq"; > + phys = <&hsusb_phy1>; > + phy-names = "usb2-phy"; > + }; > + }; > + > + fragment@1 { > + target-path = "/soc@0/usb@76f8800"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&intc>; > + > + __overlay__ { > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > + reg = <0x07600000 0xd000>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "dwc_usb3", > + "pwr_event", > + "qusb2_phy", > + "hs_phy_irq"; > + phys = <&hsusb_phy2>; > + phy-names = "usb2-phy"; > + }; > + }; > +}; ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays 2025-01-14 17:42 ` Rob Herring @ 2025-01-14 22:46 ` Bjorn Andersson 0 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 22:46 UTC (permalink / raw) To: Rob Herring Cc: Bjorn Andersson, Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Tue, Jan 14, 2025 at 11:42:48AM -0600, Rob Herring wrote: > On Mon, Jan 13, 2025 at 09:11:39PM -0800, Bjorn Andersson wrote: [..] > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8250_xiaomi_elish.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8350.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8350_qcom_sm8350_hdk.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8450.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8550.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_sm8650.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100.dtb.o > > +dwc3-flattening-overlay-y += dwc3-qcom_x1e80100_hp_omnibook_x14.dtb.o > > Some of these platforms are quite new. I think they could tolerate a > flag day. It's your fault for knowing this is a problem and continuing > to accept new users... > Yes, I agree. But as the timeline for bringing a solution to the table has been unknown I don't think it would make sense to keep thing hostage. > For the ones we do maintain compatibility, I would like to define some > timeframe for doing so. This would be a lot of stuff to keep forever. I > suspect the ABI gets broken anyways and/or there are new features > enabled. > Absolutely. The majority of the involved boards are booted off an Android bootimg, which mostly implies that the DTB would come with the kernel - so we don't need to keep things around for long. The exception that comes to mind is the WoS laptops, where people do have UEFI or DtbLoader EFI application load a DTB which isn't automatically upgraded by their Linux distro - so for those it makes sense to keep things around longer. That said, for most of these, things are still evolving, so users should want to upgrade anyways. The features that this will enable us to implement in the USB drivers are things like reliable USB role switch, for which I don't see there to be any DT impact... TL;DR I think we could start remove some of these after 1 or 2 releases, and perhaps keep the WoS ones around for another LTS. Doesn't that sound reasonable? Would you like this documented in some particular way? > > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > > index 0a3a31c5088b..d33cdf6661c0 100644 > > --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c > > @@ -21,6 +21,24 @@ struct dwc3_overlay_data { > > const char *migrate_match; > > }; > > > > +static const struct dwc3_overlay_data dwc3_qcom_apq8094_overlay = { > > Can't all these be init section? It's a lot of bloat for everyone else > otherwise. Same issue for the overlays themselves. The one that you > apply should be copied out of init. > That we should be able to do. > > + .fdt = __dtb_dwc3_qcom_apq8094_begin, > > + .end = __dtb_dwc3_qcom_apq8094_end, > > + .migrate_match = "qcom,dwc3", > > This is the same everywhere AFAICT, so why do we need it? > This was the only thing in the implementation that was Qualcomm-specific, and Frank expressed interest in trying this out for NXP as well. But we could certainly postpone this until the first non-qcom,dwc3 user comes along (if that happens). > > +}; > > + [..] > > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts > > new file mode 100644 > > index 000000000000..8ca699460ec3 > > --- /dev/null > > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8992.dts > > @@ -0,0 +1,32 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > +/dts-v1/; > > +/plugin/; > > + > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > +/ { > > + fragment@0 { > > + target-path = "/soc@0/usb@f92f8800"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + interrupt-parent = <&intc>; > > + > > + __overlay__ { > > + compatible = "qcom,msm8994-dwc3", "qcom,snps-dwc3"; > > Should be 8992? If not, this is the same as the next overlay. > This follows the existing dtb, where msm8992.dtsi inherits msm8994 and overwrites a few properties. > > + reg = <0xf9200000 0xd000>; > > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "dwc_usb3", > > + "pwr_event", > > + "qusb2_phy", > > + "hs_phy_irq", > > + "ss_phy_irq"; > > + }; > > + }; > > +}; [..] > > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts > > new file mode 100644 > > index 000000000000..7a583de320cf > > --- /dev/null > > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3.dts > > @@ -0,0 +1,56 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > +/dts-v1/; > > +/plugin/; > > + > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > +/ { > > + fragment@0 { > > + target-path = "/soc@0/usb@6af8800"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + interrupt-parent = <&intc>; > > + > > + __overlay__ { > > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > > + reg = <0x06a00000 0xd000>; > > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "dwc_usb3", > > + "pwr_event", > > + "qusb2_phy", > > + "hs_phy_irq", > > + "ss_phy_irq"; > > No SS phy, so should be dropped? OTOH, less variation if you keep it. > It's msm8996 and that has a SuperSpeed PHY. As such, the "phys" below is wrong, and probably done so in order to disable SuperSpeed... I did reflect on a number of these and would like us to revisit them, but the overlay matches the current behavior. > You can utilize includes in overlays just like base .dts files. So this > one really just needs to include the previous overlay and override phys > and phy-names. > Okay, will give that a try. > > + phys = <&hsusb_phy1>; > > + phy-names = "usb2-phy"; > > + }; > > + }; > > + > > + fragment@1 { > > + target-path = "/soc@0/usb@76f8800"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + interrupt-parent = <&intc>; > > + > > + __overlay__ { > > + compatible = "qcom,msm8996-dwc3", "qcom,snps-dwc3"; > > + reg = <0x07600000 0xd000>; > > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "dwc_usb3", > > + "pwr_event", > > + "qusb2_phy", > > + "hs_phy_irq"; > > + phys = <&hsusb_phy2>; > > + phy-names = "usb2-phy"; > > + }; > > + }; > > +}; > > diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts > > new file mode 100644 > > index 000000000000..7a583de320cf > > --- /dev/null > > +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_msm8996_oneplus_oneplus3t.dts > > This looks pretty much like the prior one? > Yes, I generated these to be 1:1 with the compatibles, which matches on the specific board compatible. If we're in agreement on the general approach I can go back and spend more time consolidating these. Regards, Bjorn ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v3 07/12] of: overlays: dwc3-flattening: Provide overlay symbols 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (5 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library Bjorn Andersson ` (6 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The overlays introduced to apply the migration to the flattened Qualcomm DWC3 binding depends on symbols to be applied, but in general the DeviceTree blobs in circulation on people's devices wasn't built with symbols - and hence they can not be applied. Work around this problem by detecting when the live DeviceTree is lacking symbols and inject the necessary symbols for each target, for the duration of the dwc3-flattening overlay application. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- .../of/overlays/dwc3-flattening/dwc3-flattening.c | 765 +++++++++++++++++++++ 1 file changed, 765 insertions(+) diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c index d33cdf6661c0..07f90360c04d 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -19,546 +19,1273 @@ struct dwc3_overlay_data { const void *fdt; const void *end; const char *migrate_match; + struct dwc3_overlay_symbol *symbols; }; static const struct dwc3_overlay_data dwc3_qcom_apq8094_overlay = { .fdt = __dtb_dwc3_qcom_apq8094_begin, .end = __dtb_dwc3_qcom_apq8094_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@f9000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_apq8096_overlay = { .fdt = __dtb_dwc3_qcom_apq8096_begin, .end = __dtb_dwc3_qcom_apq8096_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb2_id", "/usb2-id" }, + { "usb3_id", "/usb3-id" }, + { "usb3phy", "/soc@0/phy@7410000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_apq8096_inforce_ifc6640_overlay = { .fdt = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_begin, .end = __dtb_dwc3_qcom_apq8096_inforce_ifc6640_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb3phy", "/soc@0/phy@7410000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq4018_overlay = { .fdt = __dtb_dwc3_qcom_ipq4018_begin, .end = __dtb_dwc3_qcom_ipq4018_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "usb2_hs_phy", "/soc/usb-phy@a8000" }, + { "usb3_hs_phy", "/soc/usb-phy@a6000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq4018_8dev_jalapeno_overlay = { .fdt = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin, .end = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "usb2_hs_phy", "/soc/usb-phy@a8000" }, + { "usb3_hs_phy", "/soc/usb-phy@a6000" }, + { "usb3_ss_phy", "/soc/usb-phy@9a000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq4019_overlay = { .fdt = __dtb_dwc3_qcom_ipq4019_begin, .end = __dtb_dwc3_qcom_ipq4019_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "usb2_hs_phy", "/soc/usb-phy@a8000" }, + { "usb3_hs_phy", "/soc/usb-phy@a6000" }, + { "usb3_ss_phy", "/soc/usb-phy@9a000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq5018_overlay = { .fdt = __dtb_dwc3_qcom_ipq5018_begin, .end = __dtb_dwc3_qcom_ipq5018_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "usbphy0", "/soc@0/phy@5b000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq5332_overlay = { .fdt = __dtb_dwc3_qcom_ipq5332_begin, .end = __dtb_dwc3_qcom_ipq5332_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "usbphy0", "/soc@0/phy@7b000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq5424_overlay = { .fdt = __dtb_dwc3_qcom_ipq5424_begin, .end = __dtb_dwc3_qcom_ipq5424_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "qusb_phy_0", "/soc@0/phy@7b000" }, + { "qusb_phy_1", "/soc@0/phy@71000" }, + { "ssphy_0", "/soc@0/phy@7d000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq6018_overlay = { .fdt = __dtb_dwc3_qcom_ipq6018_begin, .end = __dtb_dwc3_qcom_ipq6018_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "qusb_phy_0", "/soc@0/qusb@79000" }, + { "qusb_phy_1", "/soc@0/qusb@59000" }, + { "ssphy_0", "/soc@0/ssphy@78000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq8064_overlay = { .fdt = __dtb_dwc3_qcom_ipq8064_begin, .end = __dtb_dwc3_qcom_ipq8064_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hs_phy_0", "/soc/phy@100f8800" }, + { "hs_phy_1", "/soc/phy@110f8800" }, + { "ss_phy_0", "/soc/phy@100f8830" }, + { "ss_phy_1", "/soc/phy@110f8830" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq8074_overlay = { .fdt = __dtb_dwc3_qcom_ipq8074_begin, .end = __dtb_dwc3_qcom_ipq8074_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "qusb_phy_0", "/soc@0/phy@79000" }, + { "qusb_phy_1", "/soc@0/phy@59000" }, + { "ssphy_0", "/soc@0/phy@78000" }, + { "ssphy_1", "/soc@0/phy@58000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_ipq9574_overlay = { .fdt = __dtb_dwc3_qcom_ipq9574_begin, .end = __dtb_dwc3_qcom_ipq9574_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "usb_0_qmpphy", "/soc@0/phy@7d000" }, + { "usb_0_qusbphy", "/soc@0/phy@7b000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8953_overlay = { .fdt = __dtb_dwc3_qcom_msm8953_begin, .end = __dtb_dwc3_qcom_msm8953_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy", "/soc@0/phy@79000" }, + { "intc", "/soc@0/interrupt-controller@b000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8992_overlay = { .fdt = __dtb_dwc3_qcom_msm8992_begin, .end = __dtb_dwc3_qcom_msm8992_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@f9000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8994_overlay = { .fdt = __dtb_dwc3_qcom_msm8994_begin, .end = __dtb_dwc3_qcom_msm8994_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@f9000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_begin, .end = __dtb_dwc3_qcom_msm8996_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb3phy", "/soc@0/phy@7410000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_begin, .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_oneplus_oneplus3t_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_begin, .end = __dtb_dwc3_qcom_msm8996_oneplus_oneplus3t_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_dora_row_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_sony_dora_row_begin, .end = __dtb_dwc3_qcom_msm8996_sony_dora_row_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb3_id", "/usb3-id" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_kagura_row_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_sony_kagura_row_begin, .end = __dtb_dwc3_qcom_msm8996_sony_kagura_row_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb3_id", "/usb3-id" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_sony_keyaki_row_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_begin, .end = __dtb_dwc3_qcom_msm8996_sony_keyaki_row_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "usb3_id", "/usb3-id" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_gemini_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_begin, .end = __dtb_dwc3_qcom_msm8996_xiaomi_gemini_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "typec", "/soc@0/i2c@75b7000/typec@47" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_natrium_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_begin, .end = __dtb_dwc3_qcom_msm8996_xiaomi_natrium_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "typec", "/soc@0/i2c@75b7000/typec@47" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8996_xiaomi_scorpio_overlay = { .fdt = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_begin, .end = __dtb_dwc3_qcom_msm8996_xiaomi_scorpio_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy1", "/soc@0/phy@7411000" }, + { "hsusb_phy2", "/soc@0/phy@7412000" }, + { "intc", "/soc@0/interrupt-controller@9bc0000" }, + { "typec", "/soc@0/i2c@75b7000/typec@47" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_begin, .end = __dtb_dwc3_qcom_msm8998_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + { "usb3phy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_fxtec_pro1_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_fxtec_pro1_begin, .end = __dtb_dwc3_qcom_msm8998_fxtec_pro1_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + { "usb3phy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_cheeseburger_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_begin, .end = __dtb_dwc3_qcom_msm8998_oneplus_cheeseburger_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_oneplus_dumpling_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_begin, .end = __dtb_dwc3_qcom_msm8998_oneplus_dumpling_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_lilac_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_begin, .end = __dtb_dwc3_qcom_msm8998_sony_xperia_lilac_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + { "usb3phy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_maple_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_begin, .end = __dtb_dwc3_qcom_msm8998_sony_xperia_maple_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + { "usb3phy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_sony_xperia_poplar_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_begin, .end = __dtb_dwc3_qcom_msm8998_sony_xperia_poplar_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + { "usb3phy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_msm8998_xiaomi_sagit_overlay = { .fdt = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_begin, .end = __dtb_dwc3_qcom_msm8998_xiaomi_sagit_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy", "/soc@0/phy@c012000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qcm2290_overlay = { .fdt = __dtb_dwc3_qcom_qcm2290_begin, .end = __dtb_dwc3_qcom_qcm2290_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "mpm", "/remoteproc/interrupt-controller" }, + { "usb_hsphy", "/soc@0/phy@1613000" }, + { "usb_qmpphy", "/soc@0/phy@1615000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qcm6490_overlay = { .fdt = __dtb_dwc3_qcom_qcm6490_begin, .end = __dtb_dwc3_qcom_qcm6490_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qcs404_overlay = { .fdt = __dtb_dwc3_qcom_qcs404_begin, .end = __dtb_dwc3_qcom_qcs404_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@b000000" }, + { "usb2_phy_prim", "/soc@0/phy@7a000" }, + { "usb2_phy_sec", "/soc@0/phy@7c000" }, + { "usb3_phy", "/soc@0/phy@78000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qcs615_overlay = { .fdt = __dtb_dwc3_qcom_qcs615_begin, .end = __dtb_dwc3_qcom_qcs615_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_hsphy_2", "/soc@0/phy@88e3000" }, + { "usb_qmpphy", "/soc@0/phy@88e6000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qcs8300_overlay = { .fdt = __dtb_dwc3_qcom_qcs8300_begin, .end = __dtb_dwc3_qcom_qcs8300_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@8904000" }, + { "usb_2_hsphy", "/soc@0/phy@8906000" }, + { "usb_qmpphy", "/soc@0/phy@8907000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qdu1000_overlay = { .fdt = __dtb_dwc3_qcom_qdu1000_begin, .end = __dtb_dwc3_qcom_qdu1000_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17200000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e5000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_qru1000_overlay = { .fdt = __dtb_dwc3_qcom_qru1000_begin, .end = __dtb_dwc3_qcom_qru1000_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17200000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e5000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sa8155p_overlay = { .fdt = __dtb_dwc3_qcom_sa8155p_begin, .end = __dtb_dwc3_qcom_sa8155p_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb2phy_ac_en1_default", "/soc@0/pinctrl@3100000/usb2phy-ac-en1-default-state" }, + { "usb2phy_ac_en2_default", "/soc@0/pinctrl@3100000/usb2phy-ac-en2-default-state" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sa8540p_overlay = { .fdt = __dtb_dwc3_qcom_sa8540p_begin, .end = __dtb_dwc3_qcom_sa8540p_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_0_hsphy", "/soc@0/phy@88e5000" }, + { "usb_0_qmpphy", "/soc@0/phy@88eb000" }, + { "usb_1_hsphy", "/soc@0/phy@8902000" }, + { "usb_1_qmpphy", "/soc@0/phy@8903000" }, + { "usb_2_hsphy0", "/soc@0/phy@88e7000" }, + { "usb_2_hsphy1", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy2", "/soc@0/phy@88e9000" }, + { "usb_2_hsphy3", "/soc@0/phy@88ea000" }, + { "usb_2_qmpphy0", "/soc@0/phy@88ef000" }, + { "usb_2_qmpphy1", "/soc@0/phy@88f1000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sa8775p_overlay = { .fdt = __dtb_dwc3_qcom_sa8775p_begin, .end = __dtb_dwc3_qcom_sa8775p_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_0_hsphy", "/soc@0/phy@88e4000" }, + { "usb_0_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_1_hsphy", "/soc@0/phy@88e6000" }, + { "usb_1_qmpphy", "/soc@0/phy@88ea000" }, + { "usb_2_hsphy", "/soc@0/phy@88e7000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sar2130p_overlay = { .fdt = __dtb_dwc3_qcom_sar2130p_begin, .end = __dtb_dwc3_qcom_sar2130p_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17200000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_dp_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sc7180_overlay = { .fdt = __dtb_dwc3_qcom_sc7180_begin, .end = __dtb_dwc3_qcom_sc7180_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sc7280_overlay = { .fdt = __dtb_dwc3_qcom_sc7280_begin, .end = __dtb_dwc3_qcom_sc7280_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sc8180x_overlay = { .fdt = __dtb_dwc3_qcom_sc8180x_begin, .end = __dtb_dwc3_qcom_sc8180x_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_mp_hsphy0", "/soc@0/phy@88e4000" }, + { "usb_mp_hsphy1", "/soc@0/phy@88e5000" }, + { "usb_mp_qmpphy0", "/soc@0/phy@88eb000" }, + { "usb_mp_qmpphy1", "/soc@0/phy@88ec000" }, + { "usb_prim_hsphy", "/soc@0/phy@88e2000" }, + { "usb_prim_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_sec_hsphy", "/soc@0/phy@88e3000" }, + { "usb_sec_qmpphy", "/soc@0/phy@88ee000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_overlay = { .fdt = __dtb_dwc3_qcom_sc8280xp_begin, .end = __dtb_dwc3_qcom_sc8280xp_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_0_hsphy", "/soc@0/phy@88e5000" }, + { "usb_0_qmpphy", "/soc@0/phy@88eb000" }, + { "usb_1_hsphy", "/soc@0/phy@8902000" }, + { "usb_1_qmpphy", "/soc@0/phy@8903000" }, + { "usb_2_hsphy0", "/soc@0/phy@88e7000" }, + { "usb_2_hsphy1", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy2", "/soc@0/phy@88e9000" }, + { "usb_2_hsphy3", "/soc@0/phy@88ea000" }, + { "usb_2_qmpphy0", "/soc@0/phy@88ef000" }, + { "usb_2_qmpphy1", "/soc@0/phy@88f1000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sc8280xp_microsoft_blackrock_overlay = { .fdt = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_begin, .end = __dtb_dwc3_qcom_sc8280xp_microsoft_blackrock_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_0_hsphy", "/soc@0/phy@88e5000" }, + { "usb_0_qmpphy", "/soc@0/phy@88eb000" }, + { "usb_1_hsphy", "/soc@0/phy@8902000" }, + { "usb_1_qmpphy", "/soc@0/phy@8903000" }, + { "usb_2_hsphy0", "/soc@0/phy@88e7000" }, + { "usb_2_qmpphy0", "/soc@0/phy@88ef000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sda660_overlay = { .fdt = __dtb_dwc3_qcom_sda660_begin, .end = __dtb_dwc3_qcom_sda660_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy0", "/soc@0/phy@c012000" }, + { "qusb2phy1", "/soc@0/phy@c014000" }, + { "usb3_qmpphy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm450_overlay = { .fdt = __dtb_dwc3_qcom_sdm450_begin, .end = __dtb_dwc3_qcom_sdm450_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy", "/soc@0/phy@79000" }, + { "intc", "/soc@0/interrupt-controller@b000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm630_overlay = { .fdt = __dtb_dwc3_qcom_sdm630_begin, .end = __dtb_dwc3_qcom_sdm630_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy0", "/soc@0/phy@c012000" }, + { "qusb2phy1", "/soc@0/phy@c014000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm632_overlay = { .fdt = __dtb_dwc3_qcom_sdm632_begin, .end = __dtb_dwc3_qcom_sdm632_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "hsusb_phy", "/soc@0/phy@79000" }, + { "intc", "/soc@0/interrupt-controller@b000000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm636_overlay = { .fdt = __dtb_dwc3_qcom_sdm636_begin, .end = __dtb_dwc3_qcom_sdm636_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy0", "/soc@0/phy@c012000" }, + { "qusb2phy1", "/soc@0/phy@c014000" }, + { "usb3_qmpphy", "/soc@0/phy@c010000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm660_overlay = { .fdt = __dtb_dwc3_qcom_sdm660_begin, .end = __dtb_dwc3_qcom_sdm660_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "extcon_usb", "/extcon-usb" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "qusb2phy0", "/soc@0/phy@c012000" }, + { "qusb2phy1", "/soc@0/phy@c014000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm670_overlay = { .fdt = __dtb_dwc3_qcom_sdm670_begin, .end = __dtb_dwc3_qcom_sdm670_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_begin, .end = __dtb_dwc3_qcom_sdm845_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_lenovo_yoga_c630_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_begin, .end = __dtb_dwc3_qcom_sdm845_lenovo_yoga_c630_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyln_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_lg_judyln_begin, .end = __dtb_dwc3_qcom_sdm845_lg_judyln_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_lg_judyp_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_lg_judyp_begin, .end = __dtb_dwc3_qcom_sdm845_lg_judyp_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_qcom_sdm845_mtp_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_begin, .end = __dtb_dwc3_qcom_sdm845_qcom_sdm845_mtp_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_starqltechn_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_begin, .end = __dtb_dwc3_qcom_sdm845_samsung_starqltechn_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_samsung_w737_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_samsung_w737_begin, .end = __dtb_dwc3_qcom_sdm845_samsung_w737_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_shift_axolotl_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_shift_axolotl_begin, .end = __dtb_dwc3_qcom_sdm845_shift_axolotl_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_thundercomm_db845c_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_begin, .end = __dtb_dwc3_qcom_sdm845_thundercomm_db845c_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_begin, .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_overlay = { .fdt = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_begin, .end = __dtb_dwc3_qcom_sdm845_xiaomi_beryllium_ebbg_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc_intc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdx55_overlay = { .fdt = __dtb_dwc3_qcom_sdx55_begin, .end = __dtb_dwc3_qcom_sdx55_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc/iommu@15000000" }, + { "intc", "/soc/interrupt-controller@17800000" }, + { "pdc", "/soc/interrupt-controller@b210000" }, + { "usb_hsphy", "/soc/phy@ff4000" }, + { "usb_qmpphy", "/soc/phy@ff6000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdx65_overlay = { .fdt = __dtb_dwc3_qcom_sdx65_begin, .end = __dtb_dwc3_qcom_sdx65_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc/iommu@15000000" }, + { "intc", "/soc/interrupt-controller@17800000" }, + { "pdc", "/soc/interrupt-controller@b210000" }, + { "usb_hsphy", "/soc/phy@ff4000" }, + { "usb_qmpphy", "/soc/phy@ff6000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sdx75_overlay = { .fdt = __dtb_dwc3_qcom_sdx75_begin, .end = __dtb_dwc3_qcom_sdx75_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17200000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_hsphy", "/soc@0/phy@ff4000" }, + { "usb_qmpphy", "/soc@0/phy@ff6000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm4250_overlay = { .fdt = __dtb_dwc3_qcom_sm4250_begin, .end = __dtb_dwc3_qcom_sm4250_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "usb_hsphy", "/soc@0/phy@1613000" }, + { "usb_qmpphy", "/soc@0/phy@1615000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm4250_oneplus_billie2_overlay = { .fdt = __dtb_dwc3_qcom_sm4250_oneplus_billie2_begin, .end = __dtb_dwc3_qcom_sm4250_oneplus_billie2_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "usb_hsphy", "/soc@0/phy@1613000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm6115_overlay = { .fdt = __dtb_dwc3_qcom_sm6115_begin, .end = __dtb_dwc3_qcom_sm6115_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "usb_hsphy", "/soc@0/phy@1613000" }, + { "usb_qmpphy", "/soc@0/phy@1615000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm6115_lenovo_j606f_overlay = { .fdt = __dtb_dwc3_qcom_sm6115_lenovo_j606f_begin, .end = __dtb_dwc3_qcom_sm6115_lenovo_j606f_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "usb_hsphy", "/soc@0/phy@1613000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm6125_overlay = { .fdt = __dtb_dwc3_qcom_sm6125_begin, .end = __dtb_dwc3_qcom_sm6125_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "extcon_usb", "/extcon-usb" }, + { "hsusb_phy1", "/soc@0/phy@1613000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm6350_overlay = { .fdt = __dtb_dwc3_qcom_sm6350_begin, .end = __dtb_dwc3_qcom_sm6350_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm6375_overlay = { .fdt = __dtb_dwc3_qcom_sm6375_begin, .end = __dtb_dwc3_qcom_sm6375_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@c600000" }, + { "intc", "/soc@0/interrupt-controller@f200000" }, + { "mpm", "/interrupt-controller" }, + { "usb_1_hsphy", "/soc@0/phy@162b000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm7125_overlay = { .fdt = __dtb_dwc3_qcom_sm7125_begin, .end = __dtb_dwc3_qcom_sm7125_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm7225_overlay = { .fdt = __dtb_dwc3_qcom_sm7225_begin, .end = __dtb_dwc3_qcom_sm7225_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm7325_overlay = { .fdt = __dtb_dwc3_qcom_sm7325_begin, .end = __dtb_dwc3_qcom_sm7325_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8150_overlay = { .fdt = __dtb_dwc3_qcom_sm8150_begin, .end = __dtb_dwc3_qcom_sm8150_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e2000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8250_overlay = { .fdt = __dtb_dwc3_qcom_sm8250_begin, .end = __dtb_dwc3_qcom_sm8250_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8250_xiaomi_elish_overlay = { .fdt = __dtb_dwc3_qcom_sm8250_xiaomi_elish_begin, .end = __dtb_dwc3_qcom_sm8250_xiaomi_elish_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8350_overlay = { .fdt = __dtb_dwc3_qcom_sm8350_begin, .end = __dtb_dwc3_qcom_sm8350_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8350_qcom_sm8350_hdk_overlay = { .fdt = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_begin, .end = __dtb_dwc3_qcom_sm8350_qcom_sm8350_hdk_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17a00000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + { "usb_2_hsphy", "/soc@0/phy@88e4000" }, + { "usb_2_qmpphy", "/soc@0/phy@88eb000" }, + { "usb_hub_enabled_state", "/soc@0/pinctrl@f100000/usb-hub-enabled-state" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8450_overlay = { .fdt = __dtb_dwc3_qcom_sm8450_begin, .end = __dtb_dwc3_qcom_sm8450_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17100000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_1_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8550_overlay = { .fdt = __dtb_dwc3_qcom_sm8550_begin, .end = __dtb_dwc3_qcom_sm8550_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17100000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_dp_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_sm8650_overlay = { .fdt = __dtb_dwc3_qcom_sm8650_begin, .end = __dtb_dwc3_qcom_sm8650_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17100000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_hsphy", "/soc@0/phy@88e3000" }, + { "usb_dp_qmpphy", "/soc@0/phy@88e8000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_x1e80100_overlay = { .fdt = __dtb_dwc3_qcom_x1e80100_begin, .end = __dtb_dwc3_qcom_x1e80100_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17000000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_ss0_hsphy", "/soc@0/phy@fd3000" }, + { "usb_1_ss0_qmpphy", "/soc@0/phy@fd5000" }, + { "usb_1_ss1_hsphy", "/soc@0/phy@fd9000" }, + { "usb_1_ss1_qmpphy", "/soc@0/phy@fda000" }, + { "usb_1_ss2_hsphy", "/soc@0/phy@fde000" }, + { "usb_1_ss2_qmpphy", "/soc@0/phy@fdf000" }, + { "usb_2_hsphy", "/soc@0/phy@88e0000" }, + { "usb_mp_hsphy0", "/soc@0/phy@88e1000" }, + { "usb_mp_hsphy1", "/soc@0/phy@88e2000" }, + { "usb_mp_qmpphy0", "/soc@0/phy@88e3000" }, + { "usb_mp_qmpphy1", "/soc@0/phy@88e5000" }, + {} + } }; static const struct dwc3_overlay_data dwc3_qcom_x1e80100_hp_omnibook_x14_overlay = { .fdt = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_begin, .end = __dtb_dwc3_qcom_x1e80100_hp_omnibook_x14_end, .migrate_match = "qcom,dwc3", + .symbols = (struct dwc3_overlay_symbol[]) { + { "apps_smmu", "/soc@0/iommu@15000000" }, + { "intc", "/soc@0/interrupt-controller@17000000" }, + { "pdc", "/soc@0/interrupt-controller@b220000" }, + { "usb_1_ss0_hsphy", "/soc@0/phy@fd3000" }, + { "usb_1_ss0_qmpphy", "/soc@0/phy@fd5000" }, + { "usb_1_ss1_hsphy", "/soc@0/phy@fd9000" }, + { "usb_1_ss1_qmpphy", "/soc@0/phy@fda000" }, + { "usb_1_ss2_hsphy", "/soc@0/phy@fde000" }, + { "usb_1_ss2_qmpphy", "/soc@0/phy@fdf000" }, + { "usb_2_hsphy", "/soc@0/phy@88e0000" }, + { "usb_mp_hsphy0", "/soc@0/phy@88e1000" }, + { "usb_mp_qmpphy0", "/soc@0/phy@88e3000" }, + {} + } }; static const struct of_device_id dwc3_flatten_of_match[] = { @@ -738,10 +1465,36 @@ static int dwc3_flattening_migrate(struct of_changeset *ocs, return ret; } +static int dwc3_flattening_ensure_symbols(struct of_changeset *ocs, + const struct dwc3_overlay_symbol *symbols) +{ + const struct dwc3_overlay_symbol *s; + struct device_node *symbols_np; + int ret; + + symbols_np = of_find_node_by_path("/__symbols__"); + of_node_put(symbols_np); + if (symbols_np) + return 0; + + symbols_np = of_changeset_create_node(ocs, of_root, "__symbols__"); + if (!symbols_np) + return -ENOMEM; + + for (s = symbols; s->symbol; s++) { + ret = of_changeset_add_prop_string(ocs, symbols_np, s->symbol, s->path); + if (ret) + return ret; + } + + return 0; +} + static int dwc3_flattening_init(void) { const struct dwc3_overlay_data *data; const struct of_device_id *match; + struct of_changeset symbols_ocs; struct of_changeset migrate_ocs; struct device_node *np; int overlay_ovcs; @@ -763,6 +1516,15 @@ static int dwc3_flattening_init(void) } of_node_put(np); + of_changeset_init(&symbols_ocs); + ret = dwc3_flattening_ensure_symbols(&symbols_ocs, data->symbols); + if (ret < 0) + goto out_destroy_symbols; + + ret = of_changeset_apply(&symbols_ocs); + if (ret < 0) + goto out_destroy_symbols; + of_changeset_init(&migrate_ocs); for_each_compatible_node(np, NULL, data->migrate_match) { ret = dwc3_flattening_migrate(&migrate_ocs, np); @@ -784,6 +1546,9 @@ static int dwc3_flattening_init(void) out_migrate_destroy: of_changeset_destroy(&migrate_ocs); + of_changeset_revert(&symbols_ocs); +out_destroy_symbols: + of_changeset_destroy(&symbols_ocs); return ret; } -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (6 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 07/12] of: overlays: dwc3-flattening: Provide overlay symbols Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 19:43 ` Frank Li 2025-01-14 5:11 ` [PATCH v3 09/12] usb: dwc3: core: Don't touch resets and clocks Bjorn Andersson ` (5 subsequent siblings) 13 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The DWC3 IP block is handled by three distinct device drivers: XHCI, DWC3 core and a platform specific (optional) DWC3 glue driver. This has resulted in, at least in the case of the Qualcomm glue, the presence of a number of layering violations, where the glue code either can't handle, or has to work around, the fact that core might not probe deterministically. An example of this is that the suspend path should operate slightly different depending on the device operating in host or peripheral mode, and the only way to determine the operating state is to peek into the core's drvdata. The Qualcomm glue driver is expected to make updates in the qscratch register region (the "glue" region) during role switch events, but with the glue and core split using the driver model, there is no reasonable way to introduce listeners for mode changes. Split the dwc3 core platform_driver callbacks and their implementation and export the implementation, to make it possible to deterministically instantiate the dwc3 core as part of the dwc3 glue drivers and to allow flattening of the DeviceTree representation. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/usb/dwc3/core.c | 149 ++++++++++++++++++++++++++++++------------------ drivers/usb/dwc3/glue.h | 22 +++++++ 2 files changed, 117 insertions(+), 54 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index c22b8678e02e..930d812a9fbb 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -36,6 +36,7 @@ #include "core.h" #include "gadget.h" +#include "glue.h" #include "io.h" #include "debug.h" @@ -2129,27 +2130,14 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) return 0; } -static int dwc3_probe(struct platform_device *pdev) +int dwc3_init(struct dwc3 *dwc, struct resource *res) { - struct device *dev = &pdev->dev; - struct resource *res, dwc_res; + struct device *dev = dwc->dev; + struct resource dwc_res; unsigned int hw_mode; void __iomem *regs; - struct dwc3 *dwc; int ret; - dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); - if (!dwc) - return -ENOMEM; - - dwc->dev = dev; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(dev, "missing memory resource\n"); - return -ENODEV; - } - dwc->xhci_resources[0].start = res->start; dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + DWC3_XHCI_REGS_END; @@ -2209,7 +2197,7 @@ static int dwc3_probe(struct platform_device *pdev) goto err_disable_clks; } - platform_set_drvdata(pdev, dwc); + dev_set_drvdata(dev, dwc); dwc3_cache_hwparams(dwc); if (!dwc->sysdev_is_parent && @@ -2304,12 +2292,31 @@ static int dwc3_probe(struct platform_device *pdev) return ret; } +EXPORT_SYMBOL_GPL(dwc3_init); -static void dwc3_remove(struct platform_device *pdev) +static int dwc3_probe(struct platform_device *pdev) { - struct dwc3 *dwc = platform_get_drvdata(pdev); + struct resource *res; + struct dwc3 *dwc; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "missing memory resource\n"); + return -ENODEV; + } + + dwc = devm_kzalloc(&pdev->dev, sizeof(*dwc), GFP_KERNEL); + if (!dwc) + return -ENOMEM; - pm_runtime_get_sync(&pdev->dev); + dwc->dev = &pdev->dev; + + return dwc3_init(dwc, res); +} + +void dwc3_uninit(struct dwc3 *dwc) +{ + pm_runtime_get_sync(dwc->dev); dwc3_core_exit_mode(dwc); dwc3_debugfs_exit(dwc); @@ -2317,22 +2324,28 @@ static void dwc3_remove(struct platform_device *pdev) dwc3_core_exit(dwc); dwc3_ulpi_exit(dwc); - pm_runtime_allow(&pdev->dev); - pm_runtime_disable(&pdev->dev); - pm_runtime_dont_use_autosuspend(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(dwc->dev); + pm_runtime_disable(dwc->dev); + pm_runtime_dont_use_autosuspend(dwc->dev); + pm_runtime_put_noidle(dwc->dev); /* * HACK: Clear the driver data, which is currently accessed by parent * glue drivers, before allowing the parent to suspend. */ - platform_set_drvdata(pdev, NULL); - pm_runtime_set_suspended(&pdev->dev); + dev_set_drvdata(dwc->dev, NULL); + pm_runtime_set_suspended(dwc->dev); dwc3_free_event_buffers(dwc); if (dwc->usb_psy) power_supply_put(dwc->usb_psy); } +EXPORT_SYMBOL_GPL(dwc3_uninit); + +static void dwc3_remove(struct platform_device *pdev) +{ + dwc3_uninit(platform_get_drvdata(pdev)); +} #ifdef CONFIG_PM static int dwc3_core_init_for_resume(struct dwc3 *dwc) @@ -2521,9 +2534,8 @@ static int dwc3_runtime_checks(struct dwc3 *dwc) return 0; } -static int dwc3_runtime_suspend(struct device *dev) +int dwc3_runtime_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; if (dwc3_runtime_checks(dwc)) @@ -2535,10 +2547,10 @@ static int dwc3_runtime_suspend(struct device *dev) return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_suspend); -static int dwc3_runtime_resume(struct device *dev) +int dwc3_runtime_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); @@ -2559,15 +2571,14 @@ static int dwc3_runtime_resume(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); + pm_runtime_mark_last_busy(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_resume); -static int dwc3_runtime_idle(struct device *dev) +int dwc3_runtime_idle(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); - switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: if (dwc3_runtime_checks(dwc)) @@ -2579,50 +2590,65 @@ static int dwc3_runtime_idle(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); - pm_runtime_autosuspend(dev); + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_autosuspend(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_idle); + +static int dwc3_plat_runtime_suspend(struct device *dev) +{ + return dwc3_runtime_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_resume(struct device *dev) +{ + return dwc3_runtime_resume(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_idle(struct device *dev) +{ + return dwc3_runtime_idle(dev_get_drvdata(dev)); +} #endif /* CONFIG_PM */ #ifdef CONFIG_PM_SLEEP -static int dwc3_suspend(struct device *dev) +int dwc3_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); if (ret) return ret; - pinctrl_pm_select_sleep_state(dev); + pinctrl_pm_select_sleep_state(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_suspend); -static int dwc3_resume(struct device *dev) +int dwc3_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret = 0; - pinctrl_pm_select_default_state(dev); + pinctrl_pm_select_default_state(dwc->dev); - pm_runtime_disable(dev); - pm_runtime_set_active(dev); + pm_runtime_disable(dwc->dev); + pm_runtime_set_active(dwc->dev); ret = dwc3_resume_common(dwc, PMSG_RESUME); if (ret) - pm_runtime_set_suspended(dev); + pm_runtime_set_suspended(dwc->dev); - pm_runtime_enable(dev); + pm_runtime_enable(dwc->dev); return ret; } +EXPORT_SYMBOL_GPL(dwc3_resume); -static void dwc3_complete(struct device *dev) +void dwc3_complete(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); u32 reg; if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && @@ -2632,21 +2658,36 @@ static void dwc3_complete(struct device *dev) dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); } } +EXPORT_SYMBOL_GPL(dwc3_complete); + +static int dwc3_plat_suspend(struct device *dev) +{ + return dwc3_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_resume(struct device *dev) +{ + return dwc3_resume(dev_get_drvdata(dev)); +} + +static void dwc3_plat_complete(struct device *dev) +{ + dwc3_complete(dev_get_drvdata(dev)); +} #else -#define dwc3_complete NULL +#define dwc3_plat_complete NULL #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) - .complete = dwc3_complete, - + SET_SYSTEM_SLEEP_PM_OPS(dwc3_plat_suspend, dwc3_plat_resume) + .complete = dwc3_plat_complete, /* * Runtime suspend halts the controller on disconnection. It relies on * platforms with custom connection notification to start the controller * again. */ - SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, - dwc3_runtime_idle) + SET_RUNTIME_PM_OPS(dwc3_plat_runtime_suspend, dwc3_plat_runtime_resume, + dwc3_plat_runtime_idle) }; #ifdef CONFIG_OF diff --git a/drivers/usb/dwc3/glue.h b/drivers/usb/dwc3/glue.h new file mode 100644 index 000000000000..f6a513e43f53 --- /dev/null +++ b/drivers/usb/dwc3/glue.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * glue.h - DesignWare USB3 DRD glue header + */ + +#ifndef __DRIVERS_USB_DWC3_GLUE_H +#define __DRIVERS_USB_DWC3_GLUE_H + +#include <linux/types.h> +#include "core.h" + +int dwc3_init(struct dwc3 *dwc, struct resource *res); +void dwc3_uninit(struct dwc3 *dwc); + +int dwc3_runtime_suspend(struct dwc3 *dwc); +int dwc3_runtime_resume(struct dwc3 *dwc); +int dwc3_runtime_idle(struct dwc3 *dwc); +int dwc3_suspend(struct dwc3 *dwc); +int dwc3_resume(struct dwc3 *dwc); +void dwc3_complete(struct dwc3 *dwc); + +#endif -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library 2025-01-14 5:11 ` [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library Bjorn Andersson @ 2025-01-14 19:43 ` Frank Li 2025-01-14 22:55 ` Bjorn Andersson 0 siblings, 1 reply; 27+ messages in thread From: Frank Li @ 2025-01-14 19:43 UTC (permalink / raw) To: Bjorn Andersson Cc: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, linux-arm-msm, linux-usb, devicetree, linux-kernel On Mon, Jan 13, 2025 at 09:11:41PM -0800, Bjorn Andersson wrote: > The DWC3 IP block is handled by three distinct device drivers: XHCI, > DWC3 core and a platform specific (optional) DWC3 glue driver. > > This has resulted in, at least in the case of the Qualcomm glue, the > presence of a number of layering violations, where the glue code either > can't handle, or has to work around, the fact that core might not probe > deterministically. > > An example of this is that the suspend path should operate slightly > different depending on the device operating in host or peripheral mode, > and the only way to determine the operating state is to peek into the > core's drvdata. > > The Qualcomm glue driver is expected to make updates in the qscratch > register region (the "glue" region) during role switch events, but with > the glue and core split using the driver model, there is no reasonable > way to introduce listeners for mode changes. > > Split the dwc3 core platform_driver callbacks and their implementation > and export the implementation, to make it possible to deterministically > instantiate the dwc3 core as part of the dwc3 glue drivers and to > allow flattening of the DeviceTree representation. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> > --- > drivers/usb/dwc3/core.c | 149 ++++++++++++++++++++++++++++++------------------ > drivers/usb/dwc3/glue.h | 22 +++++++ > 2 files changed, 117 insertions(+), 54 deletions(-) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index c22b8678e02e..930d812a9fbb 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -36,6 +36,7 @@ > > #include "core.h" > #include "gadget.h" > +#include "glue.h" > #include "io.h" > > #include "debug.h" > @@ -2129,27 +2130,14 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > return 0; > } > > -static int dwc3_probe(struct platform_device *pdev) > +int dwc3_init(struct dwc3 *dwc, struct resource *res) Maybe need data struct, which included res. It may need pass down more information in future. > { > - struct device *dev = &pdev->dev; > - struct resource *res, dwc_res; > + struct device *dev = dwc->dev; > + struct resource dwc_res; > unsigned int hw_mode; > void __iomem *regs; > - struct dwc3 *dwc; > int ret; > ... > +++ b/drivers/usb/dwc3/glue.h > @@ -0,0 +1,22 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * glue.h - DesignWare USB3 DRD glue header > + */ > + > +#ifndef __DRIVERS_USB_DWC3_GLUE_H > +#define __DRIVERS_USB_DWC3_GLUE_H > + > +#include <linux/types.h> > +#include "core.h" > + > +int dwc3_init(struct dwc3 *dwc, struct resource *res); > +void dwc3_uninit(struct dwc3 *dwc); > + > +int dwc3_runtime_suspend(struct dwc3 *dwc); > +int dwc3_runtime_resume(struct dwc3 *dwc); > +int dwc3_runtime_idle(struct dwc3 *dwc); > +int dwc3_suspend(struct dwc3 *dwc); > +int dwc3_resume(struct dwc3 *dwc); > +void dwc3_complete(struct dwc3 *dwc); dwc3_usb_*()? There may be name polution in future. There are many IPs created by dwc. Frank > + > +#endif > > -- > 2.45.2 > ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library 2025-01-14 19:43 ` Frank Li @ 2025-01-14 22:55 ` Bjorn Andersson 2025-01-15 1:56 ` Thinh Nguyen 0 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 22:55 UTC (permalink / raw) To: Frank Li Cc: Bjorn Andersson, Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, linux-arm-msm, linux-usb, devicetree, linux-kernel On Tue, Jan 14, 2025 at 02:43:59PM -0500, Frank Li wrote: > On Mon, Jan 13, 2025 at 09:11:41PM -0800, Bjorn Andersson wrote: > > The DWC3 IP block is handled by three distinct device drivers: XHCI, > > DWC3 core and a platform specific (optional) DWC3 glue driver. > > > > This has resulted in, at least in the case of the Qualcomm glue, the > > presence of a number of layering violations, where the glue code either > > can't handle, or has to work around, the fact that core might not probe > > deterministically. > > > > An example of this is that the suspend path should operate slightly > > different depending on the device operating in host or peripheral mode, > > and the only way to determine the operating state is to peek into the > > core's drvdata. > > > > The Qualcomm glue driver is expected to make updates in the qscratch > > register region (the "glue" region) during role switch events, but with > > the glue and core split using the driver model, there is no reasonable > > way to introduce listeners for mode changes. > > > > Split the dwc3 core platform_driver callbacks and their implementation > > and export the implementation, to make it possible to deterministically > > instantiate the dwc3 core as part of the dwc3 glue drivers and to > > allow flattening of the DeviceTree representation. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> > > --- > > drivers/usb/dwc3/core.c | 149 ++++++++++++++++++++++++++++++------------------ > > drivers/usb/dwc3/glue.h | 22 +++++++ > > 2 files changed, 117 insertions(+), 54 deletions(-) > > > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > > index c22b8678e02e..930d812a9fbb 100644 > > --- a/drivers/usb/dwc3/core.c > > +++ b/drivers/usb/dwc3/core.c > > @@ -36,6 +36,7 @@ > > > > #include "core.h" > > #include "gadget.h" > > +#include "glue.h" > > #include "io.h" > > > > #include "debug.h" > > @@ -2129,27 +2130,14 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > return 0; > > } > > > > -static int dwc3_probe(struct platform_device *pdev) > > +int dwc3_init(struct dwc3 *dwc, struct resource *res) > > Maybe need data struct, which included res. It may need pass down more > information in future. > Per this series we're resolving the race conditions stemming from dwc3-qcom and core having different lifetimes, but more importantly it will allow us to propose a mechanism for invoking role-switch events in the glue code from the core - i.e. we are planning to add at least one more argument here; so this proposal makes sense. > > { > > - struct device *dev = &pdev->dev; > > - struct resource *res, dwc_res; > > + struct device *dev = dwc->dev; > > + struct resource dwc_res; > > unsigned int hw_mode; > > void __iomem *regs; > > - struct dwc3 *dwc; > > int ret; > > > ... > > > +++ b/drivers/usb/dwc3/glue.h > > @@ -0,0 +1,22 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * glue.h - DesignWare USB3 DRD glue header > > + */ > > + > > +#ifndef __DRIVERS_USB_DWC3_GLUE_H > > +#define __DRIVERS_USB_DWC3_GLUE_H > > + > > +#include <linux/types.h> > > +#include "core.h" > > + > > +int dwc3_init(struct dwc3 *dwc, struct resource *res); > > +void dwc3_uninit(struct dwc3 *dwc); > > + > > +int dwc3_runtime_suspend(struct dwc3 *dwc); > > +int dwc3_runtime_resume(struct dwc3 *dwc); > > +int dwc3_runtime_idle(struct dwc3 *dwc); > > +int dwc3_suspend(struct dwc3 *dwc); > > +int dwc3_resume(struct dwc3 *dwc); > > +void dwc3_complete(struct dwc3 *dwc); > > dwc3_usb_*()? There may be name polution in future. There are many IPs > created by dwc. > I thought dwc3 was uniquely associated with USB, but I don't have any objections to your proposal. Thanks, Bjorn > Frank > > > + > > +#endif > > > > -- > > 2.45.2 > > ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library 2025-01-14 22:55 ` Bjorn Andersson @ 2025-01-15 1:56 ` Thinh Nguyen 2025-01-15 2:59 ` Thinh Nguyen 0 siblings, 1 reply; 27+ messages in thread From: Thinh Nguyen @ 2025-01-15 1:56 UTC (permalink / raw) To: Bjorn Andersson Cc: Frank Li, Bjorn Andersson, Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org On Tue, Jan 14, 2025, Bjorn Andersson wrote: > On Tue, Jan 14, 2025 at 02:43:59PM -0500, Frank Li wrote: > > ... > > > > > +++ b/drivers/usb/dwc3/glue.h > > > @@ -0,0 +1,22 @@ > > > +/* SPDX-License-Identifier: GPL-2.0 */ > > > +/* > > > + * glue.h - DesignWare USB3 DRD glue header > > > + */ > > > + > > > +#ifndef __DRIVERS_USB_DWC3_GLUE_H > > > +#define __DRIVERS_USB_DWC3_GLUE_H > > > + > > > +#include <linux/types.h> > > > +#include "core.h" > > > + > > > +int dwc3_init(struct dwc3 *dwc, struct resource *res); > > > +void dwc3_uninit(struct dwc3 *dwc); > > > + > > > +int dwc3_runtime_suspend(struct dwc3 *dwc); > > > +int dwc3_runtime_resume(struct dwc3 *dwc); > > > +int dwc3_runtime_idle(struct dwc3 *dwc); > > > +int dwc3_suspend(struct dwc3 *dwc); > > > +int dwc3_resume(struct dwc3 *dwc); > > > +void dwc3_complete(struct dwc3 *dwc); > > > > dwc3_usb_*()? There may be name polution in future. There are many IPs > > created by dwc. > > > > I thought dwc3 was uniquely associated with USB, but I don't have any > objections to your proposal. > > Thanks, > Bjorn > Regarding this naming, let's keep them as what Bjorn has as they are more consistent to what we're doing in the driver. We can revise in the future should we need to. A couple of things I would like to rename is the "dwc3_uninit" to perhaps use dwc3_exit or dwc3_cleanup instead; the other is the dwc3_complete(), perhaps dwc3_pm_complete() for clarity. Also, should we add CONFIG_PM_SLEEP guards for these exported pm ops? Thanks, Thinh ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library 2025-01-15 1:56 ` Thinh Nguyen @ 2025-01-15 2:59 ` Thinh Nguyen 0 siblings, 0 replies; 27+ messages in thread From: Thinh Nguyen @ 2025-01-15 2:59 UTC (permalink / raw) To: Bjorn Andersson Cc: Frank Li, Bjorn Andersson, Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org On Tue, Jan 14, 2025, Thinh Nguyen wrote: > On Tue, Jan 14, 2025, Bjorn Andersson wrote: > > Also, should we add CONFIG_PM_SLEEP guards for these exported pm ops? Ignore this. I thought I saw the code outside of the guards. BR, Thinh ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v3 09/12] usb: dwc3: core: Don't touch resets and clocks 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (7 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 10/12] usb: dwc3: qcom: Don't rely on drvdata during probe Bjorn Andersson ` (4 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson When the core is integrated with glue, it's expected that the glue IP will require, and hence handle, the clocks and resets of the IP-block. Allow the platform or glue layer to indicate if the core logic for clocks and resets should be skipped to deal with this. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/usb/dwc3/core.c | 22 ++++++++++++---------- drivers/usb/dwc3/glue.h | 2 +- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 930d812a9fbb..c0b2398b8c18 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -2130,7 +2130,7 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) return 0; } -int dwc3_init(struct dwc3 *dwc, struct resource *res) +int dwc3_init(struct dwc3 *dwc, struct resource *res, bool ignore_clocks_and_resets) { struct device *dev = dwc->dev; struct resource dwc_res; @@ -2173,15 +2173,17 @@ int dwc3_init(struct dwc3 *dwc, struct resource *res) dwc3_get_software_properties(dwc); - dwc->reset = devm_reset_control_array_get_optional_shared(dev); - if (IS_ERR(dwc->reset)) { - ret = PTR_ERR(dwc->reset); - goto err_put_psy; - } + if (!ignore_clocks_and_resets) { + dwc->reset = devm_reset_control_array_get_optional_shared(dev); + if (IS_ERR(dwc->reset)) { + ret = PTR_ERR(dwc->reset); + goto err_put_psy; + } - ret = dwc3_get_clocks(dwc); - if (ret) - goto err_put_psy; + ret = dwc3_get_clocks(dwc); + if (ret) + goto err_put_psy; + } ret = reset_control_deassert(dwc->reset); if (ret) @@ -2311,7 +2313,7 @@ static int dwc3_probe(struct platform_device *pdev) dwc->dev = &pdev->dev; - return dwc3_init(dwc, res); + return dwc3_init(dwc, res, false); } void dwc3_uninit(struct dwc3 *dwc) diff --git a/drivers/usb/dwc3/glue.h b/drivers/usb/dwc3/glue.h index f6a513e43f53..ac87491bfdeb 100644 --- a/drivers/usb/dwc3/glue.h +++ b/drivers/usb/dwc3/glue.h @@ -9,7 +9,7 @@ #include <linux/types.h> #include "core.h" -int dwc3_init(struct dwc3 *dwc, struct resource *res); +int dwc3_init(struct dwc3 *dwc, struct resource *res, bool ignore_clocks_and_resets); void dwc3_uninit(struct dwc3 *dwc); int dwc3_runtime_suspend(struct dwc3 *dwc); -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 10/12] usb: dwc3: qcom: Don't rely on drvdata during probe 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (8 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 09/12] usb: dwc3: core: Don't touch resets and clocks Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 11/12] usb: dwc3: qcom: Transition to flattened model Bjorn Andersson ` (3 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson With the upcoming transition to a model where DWC3 core and glue operate on a single struct device the drvdata datatype will change to be owned by the core. The drvdata is however used by the Qualcomm DWC3 glue to pass the qcom glue context around before the core is allocated. Remove this problem, and clean up the code, by passing the dwc3_qcom struct around during probe, instead of acquiring it from the drvdata. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- drivers/usb/dwc3/dwc3-qcom.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 58683bb672e9..50b1da845113 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -547,9 +547,10 @@ static int dwc3_qcom_request_irq(struct dwc3_qcom *qcom, int irq, return ret; } -static int dwc3_qcom_setup_port_irq(struct platform_device *pdev, int port_index, bool is_multiport) +static int dwc3_qcom_setup_port_irq(struct dwc3_qcom *qcom, + struct platform_device *pdev, + int port_index, bool is_multiport) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); const char *irq_name; int irq; int ret; @@ -634,9 +635,8 @@ static int dwc3_qcom_find_num_ports(struct platform_device *pdev) return DWC3_QCOM_MAX_PORTS; } -static int dwc3_qcom_setup_irq(struct platform_device *pdev) +static int dwc3_qcom_setup_irq(struct dwc3_qcom *qcom, struct platform_device *pdev) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); bool is_multiport; int ret; int i; @@ -645,7 +645,7 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) is_multiport = (qcom->num_ports > 1); for (i = 0; i < qcom->num_ports; i++) { - ret = dwc3_qcom_setup_port_irq(pdev, i, is_multiport); + ret = dwc3_qcom_setup_port_irq(qcom, pdev, i, is_multiport); if (ret) return ret; } @@ -700,9 +700,8 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) return 0; } -static int dwc3_qcom_of_register_core(struct platform_device *pdev) +static int dwc3_qcom_of_register_core(struct dwc3_qcom *qcom, struct platform_device *pdev) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; int ret; @@ -778,7 +777,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) goto clk_disable; } - ret = dwc3_qcom_setup_irq(pdev); + ret = dwc3_qcom_setup_irq(qcom, pdev); if (ret) { dev_err(dev, "failed to setup IRQs, err=%d\n", ret); goto clk_disable; @@ -793,7 +792,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ignore_pipe_clk) dwc3_qcom_select_utmi_clk(qcom); - ret = dwc3_qcom_of_register_core(pdev); + ret = dwc3_qcom_of_register_core(qcom, pdev); if (ret) { dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); goto clk_disable; -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 11/12] usb: dwc3: qcom: Transition to flattened model 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (9 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 10/12] usb: dwc3: qcom: Don't rely on drvdata during probe Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 12/12] arm64: dts: qcom: sc8280x: Flatten the USB nodes Bjorn Andersson ` (2 subsequent siblings) 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson The USB IP-block found in most Qualcomm platforms is modelled in the Linux kernel as 3 different independent device drivers, but as shown by the already existing layering violations in the Qualcomm glue driver they can not be operated independently. With the current implementation, the glue driver registers the core and has no way to know when this is done. As a result, e.g. the suspend callbacks needs to guard against NULL pointer dereferences when trying to peek into the struct dwc3 found in the drvdata of the child. Even with these checks, there are no way to fully protect ourselves from the race conditions that occur if the DWC3 is unbound. Missing from the upstream Qualcomm USB support is handling of role switching, in which the glue needs to be notified upon DRD mode changes. Several attempts has been made through the years to register callbacks etc, but they always fall short when it comes to handling of the core's probe deferral on resources etc. Moving to a model where the DWC3 core is instantiated in a synchronous fashion avoids above described race conditions. It is however not feasible to do so without also flattening the DeviceTree binding, as assumptions are made in the DWC3 core and frameworks used that the device's associated of_node will the that of the core. Furthermore, the DeviceTree binding is a direct representation of the Linux driver model, and doesn't necessarily describe "the USB IP-block". The Qualcomm DWC3 glue driver is therefor transitioned to initialize and operate the DWC3 within the one device context, in synchronous fashion. To handle backwards compatibility, and to remove the two-device model, of_nodes of the old compatible are converted to the new one, early during probe. This happens in the event that a DWC3 core child node is present, the content of the reg and interrupt properties of this node are merged into the shared properties, all remaining properties are copied and the core node is dropped. Effectively transitioning the node from qcom,dwc3 to qcom,snps-dwc3. As the dwc3-qcom driver is migrated to support (and only support) the qcom,snps-dwc3 binding, the kill-switch in the dwc3-flattening overlay code is removed. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- .../of/overlays/dwc3-flattening/dwc3-flattening.c | 3 - drivers/usb/dwc3/dwc3-qcom.c | 136 ++++++++++----------- 2 files changed, 66 insertions(+), 73 deletions(-) diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c index 07f90360c04d..44bc97ac53c0 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -1500,9 +1500,6 @@ static int dwc3_flattening_init(void) int overlay_ovcs; int ret; - /* TODO: Remove kill-switch as dwc3-qcom is migrated to qcom,snps-dwc */ - return 0; - match = of_match_node(dwc3_flatten_of_match, of_root); if (!match) return 0; diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 50b1da845113..df1ee6961c9e 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -14,7 +14,8 @@ #include <linux/kernel.h> #include <linux/extcon.h> #include <linux/interconnect.h> -#include <linux/of_platform.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <linux/platform_device.h> #include <linux/phy/phy.h> #include <linux/usb/of.h> @@ -23,6 +24,7 @@ #include <linux/usb/hcd.h> #include <linux/usb.h> #include "core.h" +#include "glue.h" /* USB QSCRATCH Hardware registers */ #define QSCRATCH_HS_PHY_CTRL 0x10 @@ -73,7 +75,7 @@ struct dwc3_qcom_port { struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; - struct platform_device *dwc3; + struct dwc3 dwc; struct clk **clks; int num_clocks; struct reset_control *resets; @@ -92,6 +94,8 @@ struct dwc3_qcom { struct icc_path *icc_path_apps; }; +#define to_dwc3_qcom(d) container_of((d), struct dwc3_qcom, dwc) + static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) { u32 reg; @@ -260,7 +264,7 @@ static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom) goto put_path_ddr; } - max_speed = usb_get_maximum_speed(&qcom->dwc3->dev); + max_speed = usb_get_maximum_speed(qcom->dwc.dev); if (max_speed >= USB_SPEED_SUPER || max_speed == USB_SPEED_UNKNOWN) { ret = icc_set_bw(qcom->icc_path_ddr, USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); @@ -303,25 +307,14 @@ static void dwc3_qcom_interconnect_exit(struct dwc3_qcom *qcom) /* Only usable in contexts where the role can not change. */ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) { - struct dwc3 *dwc; - - /* - * FIXME: Fix this layering violation. - */ - dwc = platform_get_drvdata(qcom->dwc3); - - /* Core driver may not have probed yet. */ - if (!dwc) - return false; - - return dwc->xhci; + return qcom->dwc.xhci; } static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, int port_index) { - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); struct usb_device *udev; struct usb_hcd __maybe_unused *hcd; + struct dwc3 *dwc = &qcom->dwc; /* * FIXME: Fix this layering violation. @@ -498,7 +491,7 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data) { struct dwc3_qcom *qcom = data; - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); + struct dwc3 *dwc = &qcom->dwc; /* If pm_suspended then let pm_resume take care of resuming h/w */ if (qcom->pm_suspended) @@ -700,40 +693,13 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) return 0; } -static int dwc3_qcom_of_register_core(struct dwc3_qcom *qcom, struct platform_device *pdev) -{ - struct device_node *np = pdev->dev.of_node; - struct device *dev = &pdev->dev; - int ret; - - struct device_node *dwc3_np __free(device_node) = of_get_compatible_child(np, - "snps,dwc3"); - if (!dwc3_np) { - dev_err(dev, "failed to find dwc3 core child\n"); - return -ENODEV; - } - - ret = of_platform_populate(np, NULL, NULL, dev); - if (ret) { - dev_err(dev, "failed to register dwc3 core - %d\n", ret); - return ret; - } - - qcom->dwc3 = of_find_device_by_node(dwc3_np); - if (!qcom->dwc3) { - ret = -ENODEV; - dev_err(dev, "failed to get dwc3 platform device\n"); - of_platform_depopulate(dev); - } - - return ret; -} - static int dwc3_qcom_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct dwc3_qcom *qcom; + struct resource res; + struct resource *r; int ret, i; bool ignore_pipe_clk; bool wakeup_source; @@ -742,7 +708,6 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (!qcom) return -ENOMEM; - platform_set_drvdata(pdev, qcom); qcom->dev = &pdev->dev; qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); @@ -771,8 +736,15 @@ static int dwc3_qcom_probe(struct platform_device *pdev) goto reset_assert; } - qcom->qscratch_base = devm_platform_ioremap_resource(pdev, 0); + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto clk_disable; + res = *r; + res.end = res.start + SDM845_QSCRATCH_BASE_OFFSET; + + qcom->qscratch_base = devm_ioremap(dev, res.end, SDM845_QSCRATCH_SIZE); if (IS_ERR(qcom->qscratch_base)) { + dev_err(dev, "failed to map qscratch region: %pe\n", qcom->qscratch_base); ret = PTR_ERR(qcom->qscratch_base); goto clk_disable; } @@ -792,17 +764,18 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ignore_pipe_clk) dwc3_qcom_select_utmi_clk(qcom); - ret = dwc3_qcom_of_register_core(qcom, pdev); - if (ret) { - dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); + qcom->dwc.dev = dev; + ret = dwc3_init(&qcom->dwc, &res, true); + if (ret) { + ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n"); goto clk_disable; } ret = dwc3_qcom_interconnect_init(qcom); if (ret) - goto depopulate; + goto remove_core; - qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); + qcom->mode = usb_get_dr_mode(dev); /* enable vbus override for device mode */ if (qcom->mode != USB_DR_MODE_HOST) @@ -815,20 +788,15 @@ static int dwc3_qcom_probe(struct platform_device *pdev) wakeup_source = of_property_read_bool(dev->of_node, "wakeup-source"); device_init_wakeup(&pdev->dev, wakeup_source); - device_init_wakeup(&qcom->dwc3->dev, wakeup_source); qcom->is_suspended = false; - pm_runtime_set_active(dev); - pm_runtime_enable(dev); - pm_runtime_forbid(dev); return 0; interconnect_exit: dwc3_qcom_interconnect_exit(qcom); -depopulate: - of_platform_depopulate(&pdev->dev); - platform_device_put(qcom->dwc3); +remove_core: + dwc3_uninit(&qcom->dwc); clk_disable: for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -842,13 +810,11 @@ static int dwc3_qcom_probe(struct platform_device *pdev) static void dwc3_qcom_remove(struct platform_device *pdev) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); + struct dwc3 *dwc = platform_get_drvdata(pdev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); struct device *dev = &pdev->dev; int i; - of_platform_depopulate(&pdev->dev); - platform_device_put(qcom->dwc3); - for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); clk_put(qcom->clks[i]); @@ -864,10 +830,15 @@ static void dwc3_qcom_remove(struct platform_device *pdev) static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); bool wakeup = device_may_wakeup(dev); int ret; + ret = dwc3_suspend(&qcom->dwc); + if (ret) + return ret; + ret = dwc3_qcom_suspend(qcom, wakeup); if (ret) return ret; @@ -879,7 +850,8 @@ static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) static int __maybe_unused dwc3_qcom_pm_resume(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); bool wakeup = device_may_wakeup(dev); int ret; @@ -889,31 +861,55 @@ static int __maybe_unused dwc3_qcom_pm_resume(struct device *dev) qcom->pm_suspended = false; + ret = dwc3_resume(&qcom->dwc); + if (ret) + return ret; + return 0; } static int __maybe_unused dwc3_qcom_runtime_suspend(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); + int ret; + + ret = dwc3_runtime_suspend(&qcom->dwc); + if (ret) + return ret; return dwc3_qcom_suspend(qcom, true); } +static void __maybe_unused dwc3_qcom_complete(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + + dwc3_complete(dwc); +} + static int __maybe_unused dwc3_qcom_runtime_resume(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); + int ret; + + ret = dwc3_qcom_resume(qcom, true); + if (ret) + return ret; - return dwc3_qcom_resume(qcom, true); + return dwc3_runtime_resume(&qcom->dwc); } static const struct dev_pm_ops dwc3_qcom_dev_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(dwc3_qcom_pm_suspend, dwc3_qcom_pm_resume) SET_RUNTIME_PM_OPS(dwc3_qcom_runtime_suspend, dwc3_qcom_runtime_resume, NULL) + .complete = dwc3_qcom_complete, }; static const struct of_device_id dwc3_qcom_of_match[] = { - { .compatible = "qcom,dwc3" }, + { .compatible = "qcom,snps-dwc3" }, { } }; MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 12/12] arm64: dts: qcom: sc8280x: Flatten the USB nodes 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (10 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 11/12] usb: dwc3: qcom: Transition to flattened model Bjorn Andersson @ 2025-01-14 5:11 ` Bjorn Andersson 2025-01-14 17:44 ` [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Rob Herring 2025-01-27 17:57 ` Stephan Gerhold 13 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 5:11 UTC (permalink / raw) To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel, Bjorn Andersson Transition the three USB controllers found in sc8280xp to the newly introduced, flattened representation of the Qualcomm USB block, i.e. qcom,snps-dwc3, to show the end result. The reg and interrupts properties from the usb child node are merged with their counterpart in the outer node, remaining properties and child nodes are simply moved. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +- arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +- .../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts | 10 +- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 11 +- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 10 +- .../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 18 +-- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 157 ++++++++++----------- 8 files changed, 95 insertions(+), 140 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 2fd1dafe63ce..3d84cbf5af31 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -631,12 +631,10 @@ &ufs_card_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { /* TODO: Define USB-C connector properly */ dr_mode = "peripheral"; + + status = "okay"; }; &usb_0_hsphy { @@ -655,12 +653,10 @@ &usb_0_qmpphy { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { /* TODO: Define USB-C connector properly */ dr_mode = "host"; + + status = "okay"; }; &usb_1_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 177b9dad6ff7..7be803fb7cbe 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -466,11 +466,8 @@ &ufs_mem_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "peripheral"; + status = "okay"; }; &usb_0_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 75adaa19d1c3..05fe5793f1f1 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -795,11 +795,9 @@ &ufs_mem_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -832,11 +830,9 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts index 09b95f89ee58..300c7dc999a4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts @@ -997,11 +997,8 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_0_hsphy { @@ -1026,11 +1023,8 @@ &usb_0_qmpphy_dp_in { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index f3190f408f4b..1b9501cc82f4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -1343,11 +1343,9 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -1380,11 +1378,8 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index ae5daeac8fe2..82672f441ea2 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -749,11 +749,8 @@ embedded-controller { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_0_dwc3_hs { @@ -786,11 +783,8 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts index fa9d94105052..eeb69cfd4422 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts @@ -982,11 +982,9 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -1019,11 +1017,9 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_1_dwc3_hs { @@ -1059,12 +1055,10 @@ &usb_2 { pinctrl-0 = <&usb2_en_state>; pinctrl-names = "default"; - status = "okay"; -}; - -&usb_2_dwc3 { phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>; phy-names = "usb2-0", "usb3-0"; + + status = "okay"; }; &usb_2_hsphy0 { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 01501acb1790..3dea86b0e13d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3457,12 +3457,9 @@ system-cache-controller@9200000 { interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; - usb_2: usb@a4f8800 { - compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3"; - reg = <0 0x0a4f8800 0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_2: usb@a400000 { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0x10000>; clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>, <&gcc GCC_USB30_MP_MASTER_CLK>, @@ -3480,7 +3477,8 @@ usb_2: usb@a4f8800 { <&gcc GCC_USB30_MP_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, @@ -3499,7 +3497,8 @@ usb_2: usb@a4f8800 { <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event_1", "pwr_event_2", + interrupt-names = "dwc_usb3", + "pwr_event_1", "pwr_event_2", "pwr_event_3", "pwr_event_4", "hs_phy_1", "hs_phy_2", "hs_phy_3", "hs_phy_4", @@ -3509,6 +3508,7 @@ usb_2: usb@a4f8800 { "dp_hs_phy_4", "dm_hs_phy_4", "ss_phy_1", "ss_phy_2"; + iommus = <&apps_smmu 0x800 0x0>; power-domains = <&gcc USB30_MP_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3518,35 +3518,28 @@ usb_2: usb@a4f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-0", "usb3-0", + "usb2-1", "usb3-1", + "usb2-2", + "usb2-3"; + wakeup-source; + dr_mode = "host"; + + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + status = "disabled"; + }; - usb_2_dwc3: usb@a400000 { - compatible = "snps,dwc3"; - reg = <0 0x0a400000 0 0xcd00>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x800 0x0>; - phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, - <&usb_2_hsphy1>, <&usb_2_qmpphy1>, - <&usb_2_hsphy2>, - <&usb_2_hsphy3>; - phy-names = "usb2-0", "usb3-0", - "usb2-1", "usb3-1", - "usb2-2", - "usb2-3"; - dr_mode = "host"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - }; - }; - - usb_0: usb@a6f8800 { - compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; - reg = <0 0x0a6f8800 0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_0: usb@a600000 { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0x20000>; clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, @@ -3564,17 +3557,20 @@ usb_0: usb@a6f8800 { <&gcc GCC_USB30_PRIM_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>, <&pdc 14 IRQ_TYPE_EDGE_BOTH>, <&pdc 15 IRQ_TYPE_EDGE_BOTH>, <&pdc 138 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event", + interrupt-names = "dwc_usb3", + "pwr_event", "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + iommus = <&apps_smmu 0x820 0x0>; power-domains = <&gcc USB30_PRIM_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3584,45 +3580,40 @@ usb_0: usb@a6f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", "usb3-phy"; + wakeup-source; - status = "disabled"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; - usb_0_dwc3: usb@a600000 { - compatible = "snps,dwc3"; - reg = <0 0x0a600000 0 0xcd00>; - interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x820 0x0>; - phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; - phy-names = "usb2-phy", "usb3-phy"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; + status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@0 { - reg = <0>; + port@0 { + reg = <0>; - usb_0_dwc3_hs: endpoint { - }; + usb_0_dwc3_hs: endpoint { }; + }; - port@1 { - reg = <1>; + port@1 { + reg = <1>; - usb_0_dwc3_ss: endpoint { - remote-endpoint = <&usb_0_qmpphy_usb_ss_in>; - }; + usb_0_dwc3_ss: endpoint { + remote-endpoint = <&usb_0_qmpphy_usb_ss_in>; }; }; }; }; - usb_1: usb@a8f8800 { - compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; - reg = <0 0x0a8f8800 0 0x400>; + usb_1: usb@a800000 { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0x10000>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -3643,17 +3634,20 @@ usb_1: usb@a8f8800 { <&gcc GCC_USB30_SEC_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>, <&pdc 12 IRQ_TYPE_EDGE_BOTH>, <&pdc 13 IRQ_TYPE_EDGE_BOTH>, <&pdc 136 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event", + interrupt-names = "dwc_usb3", + "pwr_event", "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + iommus = <&apps_smmu 0x860 0x0>; power-domains = <&gcc USB30_SEC_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3663,37 +3657,32 @@ usb_1: usb@a8f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", "usb3-phy"; + wakeup-source; - status = "disabled"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; - usb_1_dwc3: usb@a800000 { - compatible = "snps,dwc3"; - reg = <0 0x0a800000 0 0xcd00>; - interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x860 0x0>; - phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; - phy-names = "usb2-phy", "usb3-phy"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; + status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@0 { - reg = <0>; + port@0 { + reg = <0>; - usb_1_dwc3_hs: endpoint { - }; + usb_1_dwc3_hs: endpoint { }; + }; - port@1 { - reg = <1>; + port@1 { + reg = <1>; - usb_1_dwc3_ss: endpoint { - remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; - }; + usb_1_dwc3_ss: endpoint { + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; }; }; -- 2.45.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (11 preceding siblings ...) 2025-01-14 5:11 ` [PATCH v3 12/12] arm64: dts: qcom: sc8280x: Flatten the USB nodes Bjorn Andersson @ 2025-01-14 17:44 ` Rob Herring 2025-01-14 23:04 ` Bjorn Andersson 2025-01-27 17:57 ` Stephan Gerhold 13 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2025-01-14 17:44 UTC (permalink / raw) To: Bjorn Andersson Cc: Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > The USB IP-block found in most Qualcomm platforms is modelled in the > Linux kernel as 3 different independent device drivers, but as shown by > the already existing layering violations in the Qualcomm glue driver > they can not be operated independently. > > With the current implementation, the glue driver registers the core and > has no way to know when this is done. As a result, e.g. the suspend > callbacks needs to guard against NULL pointer dereferences when trying > to peek into the struct dwc3 found in the drvdata of the child. > > Missing from the upstream Qualcomm USB support is proper handling of > role switching, in which the glue needs to be notified upon DRD mode > changes. Several attempts has been made through the years to register > callbacks etc, but they always fall short when it comes to handling of > the core's probe deferral on resources etc. > > Furhtermore, the DeviceTree binding is a direct representation of the > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > This series therefor attempts to flatten the driver split, and operate > the glue and core out of the same platform_device instance. And in order > to do this, the DeviceTree representation of the IP block is flattened. > > To avoid littering the dwc3-qcom driver with the migration code - which > we should be able to drop again in a LTS or two - this is now placed in > drivers/of/overlays. > > A patch to convert a single platform - sc8280xp - is included in the > series. The broader conversion will be submitted in a follow up series. Is it not possible to use the same overlays also fixup the .dts files at build time? Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-14 17:44 ` [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Rob Herring @ 2025-01-14 23:04 ` Bjorn Andersson 2025-01-15 18:51 ` Rob Herring 0 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-14 23:04 UTC (permalink / raw) To: Rob Herring Cc: Bjorn Andersson, Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Tue, Jan 14, 2025 at 11:44:52AM -0600, Rob Herring wrote: > On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > > The USB IP-block found in most Qualcomm platforms is modelled in the > > Linux kernel as 3 different independent device drivers, but as shown by > > the already existing layering violations in the Qualcomm glue driver > > they can not be operated independently. > > > > With the current implementation, the glue driver registers the core and > > has no way to know when this is done. As a result, e.g. the suspend > > callbacks needs to guard against NULL pointer dereferences when trying > > to peek into the struct dwc3 found in the drvdata of the child. > > > > Missing from the upstream Qualcomm USB support is proper handling of > > role switching, in which the glue needs to be notified upon DRD mode > > changes. Several attempts has been made through the years to register > > callbacks etc, but they always fall short when it comes to handling of > > the core's probe deferral on resources etc. > > > > Furhtermore, the DeviceTree binding is a direct representation of the > > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > > > This series therefor attempts to flatten the driver split, and operate > > the glue and core out of the same platform_device instance. And in order > > to do this, the DeviceTree representation of the IP block is flattened. > > > > To avoid littering the dwc3-qcom driver with the migration code - which > > we should be able to drop again in a LTS or two - this is now placed in > > drivers/of/overlays. > > > > A patch to convert a single platform - sc8280xp - is included in the > > series. The broader conversion will be submitted in a follow up series. > > Is it not possible to use the same overlays also fixup the .dts files at > build time? > I presume so. What would the benefit of that be, over fixing up the source asap? Regards, Bjorn ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-14 23:04 ` Bjorn Andersson @ 2025-01-15 18:51 ` Rob Herring 2025-01-23 3:07 ` Bjorn Andersson 0 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2025-01-15 18:51 UTC (permalink / raw) To: Bjorn Andersson Cc: Bjorn Andersson, Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Tue, Jan 14, 2025 at 5:04 PM Bjorn Andersson <andersson@kernel.org> wrote: > > On Tue, Jan 14, 2025 at 11:44:52AM -0600, Rob Herring wrote: > > On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > > > The USB IP-block found in most Qualcomm platforms is modelled in the > > > Linux kernel as 3 different independent device drivers, but as shown by > > > the already existing layering violations in the Qualcomm glue driver > > > they can not be operated independently. > > > > > > With the current implementation, the glue driver registers the core and > > > has no way to know when this is done. As a result, e.g. the suspend > > > callbacks needs to guard against NULL pointer dereferences when trying > > > to peek into the struct dwc3 found in the drvdata of the child. > > > > > > Missing from the upstream Qualcomm USB support is proper handling of > > > role switching, in which the glue needs to be notified upon DRD mode > > > changes. Several attempts has been made through the years to register > > > callbacks etc, but they always fall short when it comes to handling of > > > the core's probe deferral on resources etc. > > > > > > Furhtermore, the DeviceTree binding is a direct representation of the > > > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > > > > > This series therefor attempts to flatten the driver split, and operate > > > the glue and core out of the same platform_device instance. And in order > > > to do this, the DeviceTree representation of the IP block is flattened. > > > > > > To avoid littering the dwc3-qcom driver with the migration code - which > > > we should be able to drop again in a LTS or two - this is now placed in > > > drivers/of/overlays. > > > > > > A patch to convert a single platform - sc8280xp - is included in the > > > series. The broader conversion will be submitted in a follow up series. > > > > Is it not possible to use the same overlays also fixup the .dts files at > > build time? > > > > I presume so. What would the benefit of that be, over fixing up the > source asap? The overlays would live with all the other dts files (I think kbuild can add built-in dtbs from arch/*/boot/dts/). We can test at build time they actually apply, and ensure the new dtb matches what the fixup overlay creates. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-15 18:51 ` Rob Herring @ 2025-01-23 3:07 ` Bjorn Andersson 2025-01-23 21:22 ` Rob Herring 0 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-23 3:07 UTC (permalink / raw) To: Rob Herring Cc: Bjorn Andersson, Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Wed, Jan 15, 2025 at 12:51:42PM -0600, Rob Herring wrote: > On Tue, Jan 14, 2025 at 5:04 PM Bjorn Andersson <andersson@kernel.org> wrote: > > > > On Tue, Jan 14, 2025 at 11:44:52AM -0600, Rob Herring wrote: > > > On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > > > > The USB IP-block found in most Qualcomm platforms is modelled in the > > > > Linux kernel as 3 different independent device drivers, but as shown by > > > > the already existing layering violations in the Qualcomm glue driver > > > > they can not be operated independently. > > > > > > > > With the current implementation, the glue driver registers the core and > > > > has no way to know when this is done. As a result, e.g. the suspend > > > > callbacks needs to guard against NULL pointer dereferences when trying > > > > to peek into the struct dwc3 found in the drvdata of the child. > > > > > > > > Missing from the upstream Qualcomm USB support is proper handling of > > > > role switching, in which the glue needs to be notified upon DRD mode > > > > changes. Several attempts has been made through the years to register > > > > callbacks etc, but they always fall short when it comes to handling of > > > > the core's probe deferral on resources etc. > > > > > > > > Furhtermore, the DeviceTree binding is a direct representation of the > > > > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > > > > > > > This series therefor attempts to flatten the driver split, and operate > > > > the glue and core out of the same platform_device instance. And in order > > > > to do this, the DeviceTree representation of the IP block is flattened. > > > > > > > > To avoid littering the dwc3-qcom driver with the migration code - which > > > > we should be able to drop again in a LTS or two - this is now placed in > > > > drivers/of/overlays. > > > > > > > > A patch to convert a single platform - sc8280xp - is included in the > > > > series. The broader conversion will be submitted in a follow up series. > > > > > > Is it not possible to use the same overlays also fixup the .dts files at > > > build time? > > > > > > > I presume so. What would the benefit of that be, over fixing up the > > source asap? > > The overlays would live with all the other dts files (I think kbuild > can add built-in dtbs from arch/*/boot/dts/). We can test at build > time they actually apply, and ensure the new dtb matches what the > fixup overlay creates. > That does sounds tempting, in particular since it sounds like it would provide us with dt-validation of the end result. But, the build-time overlaid dtb files wouldn't be complete, as I programmatically transition some of the properties - to "fix" that I'd have to provide an overlay per board. Second, it was my intention to transition all the boards to the new binding as soon as possible, to avoid adding more overlays when new boards are added. So any support-system we build up for this, would be immediately obsoleted. Regards, Bjorn ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-23 3:07 ` Bjorn Andersson @ 2025-01-23 21:22 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2025-01-23 21:22 UTC (permalink / raw) To: Bjorn Andersson Cc: Bjorn Andersson, Greg Kroah-Hartman, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Wed, Jan 22, 2025 at 09:07:43PM -0600, Bjorn Andersson wrote: > On Wed, Jan 15, 2025 at 12:51:42PM -0600, Rob Herring wrote: > > On Tue, Jan 14, 2025 at 5:04 PM Bjorn Andersson <andersson@kernel.org> wrote: > > > > > > On Tue, Jan 14, 2025 at 11:44:52AM -0600, Rob Herring wrote: > > > > On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > > > > > The USB IP-block found in most Qualcomm platforms is modelled in the > > > > > Linux kernel as 3 different independent device drivers, but as shown by > > > > > the already existing layering violations in the Qualcomm glue driver > > > > > they can not be operated independently. > > > > > > > > > > With the current implementation, the glue driver registers the core and > > > > > has no way to know when this is done. As a result, e.g. the suspend > > > > > callbacks needs to guard against NULL pointer dereferences when trying > > > > > to peek into the struct dwc3 found in the drvdata of the child. > > > > > > > > > > Missing from the upstream Qualcomm USB support is proper handling of > > > > > role switching, in which the glue needs to be notified upon DRD mode > > > > > changes. Several attempts has been made through the years to register > > > > > callbacks etc, but they always fall short when it comes to handling of > > > > > the core's probe deferral on resources etc. > > > > > > > > > > Furhtermore, the DeviceTree binding is a direct representation of the > > > > > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > > > > > > > > > This series therefor attempts to flatten the driver split, and operate > > > > > the glue and core out of the same platform_device instance. And in order > > > > > to do this, the DeviceTree representation of the IP block is flattened. > > > > > > > > > > To avoid littering the dwc3-qcom driver with the migration code - which > > > > > we should be able to drop again in a LTS or two - this is now placed in > > > > > drivers/of/overlays. > > > > > > > > > > A patch to convert a single platform - sc8280xp - is included in the > > > > > series. The broader conversion will be submitted in a follow up series. > > > > > > > > Is it not possible to use the same overlays also fixup the .dts files at > > > > build time? > > > > > > > > > > I presume so. What would the benefit of that be, over fixing up the > > > source asap? > > > > The overlays would live with all the other dts files (I think kbuild > > can add built-in dtbs from arch/*/boot/dts/). We can test at build > > time they actually apply, and ensure the new dtb matches what the > > fixup overlay creates. > > > > That does sounds tempting, in particular since it sounds like it would > provide us with dt-validation of the end result. > > But, the build-time overlaid dtb files wouldn't be complete, as I > programmatically transition some of the properties - to "fix" that I'd > have to provide an overlay per board. > > Second, it was my intention to transition all the boards to the new > binding as soon as possible, to avoid adding more overlays when new > boards are added. So any support-system we build up for this, would be > immediately obsoleted. Ok, fair enough. I would still prefer the overlays live in arch/*/boot/dts/qcom/ even if we don't do the rest. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson ` (12 preceding siblings ...) 2025-01-14 17:44 ` [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Rob Herring @ 2025-01-27 17:57 ` Stephan Gerhold 2025-01-27 22:40 ` Bjorn Andersson 13 siblings, 1 reply; 27+ messages in thread From: Stephan Gerhold @ 2025-01-27 17:57 UTC (permalink / raw) To: Bjorn Andersson Cc: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Bjorn Andersson, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > The USB IP-block found in most Qualcomm platforms is modelled in the > Linux kernel as 3 different independent device drivers, but as shown by > the already existing layering violations in the Qualcomm glue driver > they can not be operated independently. > > With the current implementation, the glue driver registers the core and > has no way to know when this is done. As a result, e.g. the suspend > callbacks needs to guard against NULL pointer dereferences when trying > to peek into the struct dwc3 found in the drvdata of the child. > > Missing from the upstream Qualcomm USB support is proper handling of > role switching, in which the glue needs to be notified upon DRD mode > changes. Several attempts has been made through the years to register > callbacks etc, but they always fall short when it comes to handling of > the core's probe deferral on resources etc. > > Furhtermore, the DeviceTree binding is a direct representation of the > Linux driver model, and doesn't necessarily describe "the USB IP-block". > > This series therefor attempts to flatten the driver split, and operate > the glue and core out of the same platform_device instance. And in order > to do this, the DeviceTree representation of the IP block is flattened. > > To avoid littering the dwc3-qcom driver with the migration code - which > we should be able to drop again in a LTS or two - this is now placed in > drivers/of/overlays. > > A patch to convert a single platform - sc8280xp - is included in the > series. The broader conversion will be submitted in a follow up series. > > [...] > --- > Bjorn Andersson (12): > dt-bindings: usb: snps,dwc3: Split core description > dt-bindings: usb: Introduce qcom,snps-dwc3 > of: dynamic: Add of_changeset_add_prop_copy() > of: overlays: Introduce dwc3 flattening overlay > of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays > of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays > of: overlays: dwc3-flattening: Provide overlay symbols > usb: dwc3: core: Expose core driver as library > usb: dwc3: core: Don't touch resets and clocks > usb: dwc3: qcom: Don't rely on drvdata during probe > usb: dwc3: qcom: Transition to flattened model > arm64: dts: qcom: sc8280x: Flatten the USB nodes > > .../devicetree/bindings/usb/qcom,dwc3.yaml | 13 +- > .../devicetree/bindings/usb/qcom,snps-dwc3.yaml | 618 ++++++++ > .../devicetree/bindings/usb/snps,dwc3-common.yaml | 415 ++++++ > .../devicetree/bindings/usb/snps,dwc3.yaml | 391 +---- > arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +- > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +- > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +- > .../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts | 10 +- > .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 11 +- > .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 10 +- > .../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 18 +- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 157 +- > drivers/of/Kconfig | 2 + > drivers/of/Makefile | 2 + > drivers/of/dynamic.c | 20 + > drivers/of/overlays/Kconfig | 15 + > drivers/of/overlays/Makefile | 3 + > drivers/of/overlays/dwc3-flattening/Makefile | 94 ++ > .../of/overlays/dwc3-flattening/dwc3-flattening.c | 1552 ++++++++++++++++++++ > .../of/overlays/dwc3-flattening/dwc3-flattening.h | 188 +++ > .../overlays/dwc3-flattening/dwc3-qcom_apq8094.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_apq8096.dts | 60 + > .../dwc3-qcom_apq8096_inforce_ifc6640.dts | 58 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts | 36 + > .../dwc3-qcom_ipq4018_8dev_jalapeno.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq5018.dts | 28 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq5332.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq5424.dts | 58 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq6018.dts | 54 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts | 40 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq8074.dts | 58 + > .../overlays/dwc3-flattening/dwc3-qcom_ipq9574.dts | 29 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8953.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8992.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8994.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8996.dts | 58 + > .../dwc3-qcom_msm8996_oneplus_oneplus3.dts | 56 + > .../dwc3-qcom_msm8996_oneplus_oneplus3t.dts | 56 + > .../dwc3-qcom_msm8996_sony_dora_row.dts | 57 + > .../dwc3-qcom_msm8996_sony_kagura_row.dts | 57 + > .../dwc3-qcom_msm8996_sony_keyaki_row.dts | 57 + > .../dwc3-qcom_msm8996_xiaomi_gemini.dts | 56 + > .../dwc3-qcom_msm8996_xiaomi_natrium.dts | 56 + > .../dwc3-qcom_msm8996_xiaomi_scorpio.dts | 56 + > .../overlays/dwc3-flattening/dwc3-qcom_msm8998.dts | 34 + > .../dwc3-qcom_msm8998_fxtec_pro1.dts | 35 + > .../dwc3-qcom_msm8998_oneplus_cheeseburger.dts | 32 + > .../dwc3-qcom_msm8998_oneplus_dumpling.dts | 32 + > .../dwc3-qcom_msm8998_sony_xperia_lilac.dts | 35 + > .../dwc3-qcom_msm8998_sony_xperia_maple.dts | 35 + > .../dwc3-qcom_msm8998_sony_xperia_poplar.dts | 35 + > .../dwc3-qcom_msm8998_xiaomi_sagit.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_qcm2290.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_qcm6490.dts | 63 + > .../overlays/dwc3-flattening/dwc3-qcom_qcs404.dts | 56 + > .../overlays/dwc3-flattening/dwc3-qcom_qcs615.dts | 62 + > .../overlays/dwc3-flattening/dwc3-qcom_qcs8300.dts | 62 + > .../overlays/dwc3-flattening/dwc3-qcom_qdu1000.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_qru1000.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_sa8155p.dts | 71 + > .../overlays/dwc3-flattening/dwc3-qcom_sa8540p.dts | 129 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sa8775p.dts | 90 ++ > .../dwc3-flattening/dwc3-qcom_sar2130p.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sc7180.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sc7280.dts | 63 + > .../overlays/dwc3-flattening/dwc3-qcom_sc8180x.dts | 109 ++ > .../dwc3-flattening/dwc3-qcom_sc8280xp.dts | 129 ++ > .../dwc3-qcom_sc8280xp_microsoft_blackrock.dts | 121 ++ > .../overlays/dwc3-flattening/dwc3-qcom_sda660.dts | 59 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm450.dts | 33 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm630.dts | 57 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm632.dts | 32 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm636.dts | 59 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm660.dts | 57 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm670.dts | 36 + > .../overlays/dwc3-flattening/dwc3-qcom_sdm845.dts | 64 + > .../dwc3-qcom_sdm845_lenovo_yoga_c630.dts | 67 + > .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyln.dts | 67 + > .../dwc3-flattening/dwc3-qcom_sdm845_lg_judyp.dts | 67 + > .../dwc3-qcom_sdm845_qcom_sdm845_mtp.dts | 67 + > .../dwc3-qcom_sdm845_samsung_starqltechn.dts | 67 + > .../dwc3-qcom_sdm845_samsung_w737.dts | 67 + > .../dwc3-qcom_sdm845_shift_axolotl.dts | 67 + > .../dwc3-qcom_sdm845_thundercomm_db845c.dts | 67 + > .../dwc3-qcom_sdm845_xiaomi_beryllium.dts | 67 + > .../dwc3-qcom_sdm845_xiaomi_beryllium_ebbg.dts | 67 + > .../overlays/dwc3-flattening/dwc3-qcom_sdx55.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_sdx65.dts | 38 + > .../overlays/dwc3-flattening/dwc3-qcom_sdx75.dts | 36 + > .../overlays/dwc3-flattening/dwc3-qcom_sm4250.dts | 37 + > .../dwc3-qcom_sm4250_oneplus_billie2.dts | 35 + > .../overlays/dwc3-flattening/dwc3-qcom_sm6115.dts | 37 + > .../dwc3-qcom_sm6115_lenovo_j606f.dts | 35 + > .../overlays/dwc3-flattening/dwc3-qcom_sm6125.dts | 36 + > .../overlays/dwc3-flattening/dwc3-qcom_sm6350.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sm6375.dts | 36 + > .../overlays/dwc3-flattening/dwc3-qcom_sm7125.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sm7225.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sm7325.dts | 60 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8150.dts | 67 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8250.dts | 67 + > .../dwc3-qcom_sm8250_xiaomi_elish.dts | 64 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8350.dts | 67 + > .../dwc3-qcom_sm8350_microsoft_surface_duo2.dts | 67 + > .../dwc3-qcom_sm8350_qcom_sm8350_hdk.dts | 69 + > .../dwc3-qcom_sm8350_qcom_sm8350_mtp.dts | 67 + > .../dwc3-qcom_sm8350_sony_pdx214_generic.dts | 67 + > .../dwc3-qcom_sm8350_sony_pdx215_generic.dts | 67 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8450.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8550.dts | 39 + > .../overlays/dwc3-flattening/dwc3-qcom_sm8650.dts | 39 + > .../dwc3-flattening/dwc3-qcom_x1e80100.dts | 153 ++ > .../dwc3-qcom_x1e80100_hp_omnibook_x14.dts | 149 ++ > drivers/usb/dwc3/core.c | 167 ++- > drivers/usb/dwc3/dwc3-qcom.c | 149 +- > drivers/usb/dwc3/glue.h | 22 + > include/linux/of.h | 3 + > 118 files changed, 8389 insertions(+), 670 deletions(-) > --- This is quite a lot of code and new files for a temporary migration. It's also difficult to test these changes fully, since there are separate overlays for each SoC and sometimes even each board. Would it be easier to just duplicate the dwc3-qcom driver for now? Making a copy of the current dwc3-qcom.c would be just 1000 lines of extra code, compared to more than 7000 for the overlay approach. The copy (e.g. dwc3-qcom-legacy.c) would keep handling the old bindings with the existing code (that is known to work to some extent). We can then improve upon the main version without risk of breaking any old DTBs. If we decide to drop support for the old DTBs at some point, we can just drop dwc3-qcom-legacy. This approach is also not pretty, but I think the risk and effort would be lower than making sure the overlay approach works on all the affected targets. Thanks, Stephan ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-27 17:57 ` Stephan Gerhold @ 2025-01-27 22:40 ` Bjorn Andersson 2025-01-28 10:42 ` Konrad Dybcio 0 siblings, 1 reply; 27+ messages in thread From: Bjorn Andersson @ 2025-01-27 22:40 UTC (permalink / raw) To: Stephan Gerhold Cc: Bjorn Andersson, Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On Mon, Jan 27, 2025 at 06:57:41PM +0100, Stephan Gerhold wrote: > On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: [..] > > 118 files changed, 8389 insertions(+), 670 deletions(-) > > --- > > This is quite a lot of code and new files for a temporary migration. > It's also difficult to test these changes fully, since there are > separate overlays for each SoC and sometimes even each board. > > Would it be easier to just duplicate the dwc3-qcom driver for now? > Making a copy of the current dwc3-qcom.c would be just 1000 lines of > extra code, compared to more than 7000 for the overlay approach. > > The copy (e.g. dwc3-qcom-legacy.c) would keep handling the old bindings > with the existing code (that is known to work to some extent). We can > then improve upon the main version without risk of breaking any old > DTBs. If we decide to drop support for the old DTBs at some point, we > can just drop dwc3-qcom-legacy. > > This approach is also not pretty, but I think the risk and effort would > be lower than making sure the overlay approach works on all the affected > targets. > I like this suggestion. It's much more isolated and we know the current state of the driver works with the current dtbs out there - so backwards compatibility would be handled. I also did end up having to use separate compatibles for the old and new binding/driver, so this should be quite clean - i.e. nicer than the overlay-based path... The one drawback would be that devices that isn't updated to a new dtb would not gain the upcoming improved support for role switching, or any of the improvements in pm_runtime-support (as I assume we'd only care about the new driver). But I think that's worth the saving in complexity. Regards, Bjorn ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure 2025-01-27 22:40 ` Bjorn Andersson @ 2025-01-28 10:42 ` Konrad Dybcio 0 siblings, 0 replies; 27+ messages in thread From: Konrad Dybcio @ 2025-01-28 10:42 UTC (permalink / raw) To: Bjorn Andersson, Stephan Gerhold Cc: Bjorn Andersson, Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Felipe Balbi, Wesley Cheng, Saravana Kannan, Thinh Nguyen, Philipp Zabel, Konrad Dybcio, Frank Li, linux-arm-msm, linux-usb, devicetree, linux-kernel On 27.01.2025 11:40 PM, Bjorn Andersson wrote: > On Mon, Jan 27, 2025 at 06:57:41PM +0100, Stephan Gerhold wrote: >> On Mon, Jan 13, 2025 at 09:11:33PM -0800, Bjorn Andersson wrote: > [..] >>> 118 files changed, 8389 insertions(+), 670 deletions(-) >>> --- >> >> This is quite a lot of code and new files for a temporary migration. >> It's also difficult to test these changes fully, since there are >> separate overlays for each SoC and sometimes even each board. >> >> Would it be easier to just duplicate the dwc3-qcom driver for now? >> Making a copy of the current dwc3-qcom.c would be just 1000 lines of >> extra code, compared to more than 7000 for the overlay approach. >> >> The copy (e.g. dwc3-qcom-legacy.c) would keep handling the old bindings >> with the existing code (that is known to work to some extent). We can >> then improve upon the main version without risk of breaking any old >> DTBs. If we decide to drop support for the old DTBs at some point, we >> can just drop dwc3-qcom-legacy. >> >> This approach is also not pretty, but I think the risk and effort would >> be lower than making sure the overlay approach works on all the affected >> targets. >> > > I like this suggestion. > > It's much more isolated and we know the current state of the driver > works with the current dtbs out there - so backwards compatibility would > be handled. I also did end up having to use separate compatibles for the > old and new binding/driver, so this should be quite clean - i.e. > nicer than the overlay-based path... > > The one drawback would be that devices that isn't updated to a new dtb > would not gain the upcoming improved support for role switching, or any > of the improvements in pm_runtime-support (as I assume we'd only care > about the new driver). But I think that's worth the saving in > complexity. If a user explicitly decides not to update, there's only so much we can do Konrad ^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2025-01-28 10:42 UTC | newest] Thread overview: 27+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-01-14 5:11 [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 01/12] dt-bindings: usb: snps,dwc3: Split core description Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 02/12] dt-bindings: usb: Introduce qcom,snps-dwc3 Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 03/12] of: dynamic: Add of_changeset_add_prop_copy() Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 04/12] of: overlays: Introduce dwc3 flattening overlay Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 05/12] of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 06/12] of: overlays: dwc3-flattening: Add Qualcomm Arm64 board overlays Bjorn Andersson 2025-01-14 17:42 ` Rob Herring 2025-01-14 22:46 ` Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 07/12] of: overlays: dwc3-flattening: Provide overlay symbols Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 08/12] usb: dwc3: core: Expose core driver as library Bjorn Andersson 2025-01-14 19:43 ` Frank Li 2025-01-14 22:55 ` Bjorn Andersson 2025-01-15 1:56 ` Thinh Nguyen 2025-01-15 2:59 ` Thinh Nguyen 2025-01-14 5:11 ` [PATCH v3 09/12] usb: dwc3: core: Don't touch resets and clocks Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 10/12] usb: dwc3: qcom: Don't rely on drvdata during probe Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 11/12] usb: dwc3: qcom: Transition to flattened model Bjorn Andersson 2025-01-14 5:11 ` [PATCH v3 12/12] arm64: dts: qcom: sc8280x: Flatten the USB nodes Bjorn Andersson 2025-01-14 17:44 ` [PATCH v3 00/12] usb: dwc3: qcom: Flatten dwc3 structure Rob Herring 2025-01-14 23:04 ` Bjorn Andersson 2025-01-15 18:51 ` Rob Herring 2025-01-23 3:07 ` Bjorn Andersson 2025-01-23 21:22 ` Rob Herring 2025-01-27 17:57 ` Stephan Gerhold 2025-01-27 22:40 ` Bjorn Andersson 2025-01-28 10:42 ` Konrad Dybcio
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