From: E Shattow <e@freeshell.de>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, E Shattow <e@freeshell.de>
Subject: [PATCH v2 0/5] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes
Date: Sun, 2 Feb 2025 17:37:06 -0800 [thread overview]
Message-ID: <20250203013730.269558-1-e@freeshell.de> (raw)
U-Boot boot loader has adopted using the Linux dt-rebasing tree for dts
with StarFive VisionFive2 board target (and related JH7110 common boards).
Sync the minimum changes from jh7110-common.dtsi needed for boot so these
can be dropped from U-Boot.
Changes since v1:
Do not set unused eeprom label.
Do not set no-op zero-value assigned-clock-rates, adjust commit message.
E Shattow (5):
riscv: dts: starfive: jh7110-common: replace syscrg clock assignments
riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2
cycles max 100MHz
riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to
uart0
riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by
boot loader
.../boot/dts/starfive/jh7110-common.dtsi | 28 +++++++++++++++----
1 file changed, 23 insertions(+), 5 deletions(-)
base-commit: 708d55db3edbe2ccf88d94b5f2e2b404bc0ba37c
--
2.47.2
next reply other threads:[~2025-02-03 1:51 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-03 1:37 E Shattow [this message]
2025-02-03 1:37 ` [PATCH v2 1/5] riscv: dts: starfive: jh7110-common: replace syscrg clock assignments E Shattow
2025-02-05 10:16 ` Emil Renner Berthing
2025-02-05 12:52 ` E Shattow
2025-02-07 8:31 ` Hal Feng
2025-02-09 23:33 ` E Shattow
2025-02-20 6:38 ` Hal Feng
2025-02-28 8:08 ` E Shattow
2025-02-07 12:21 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 2/5] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz E Shattow
2025-02-05 10:18 ` Emil Renner Berthing
2025-02-05 13:21 ` E Shattow
2025-02-07 12:23 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0 E Shattow
2025-02-05 7:23 ` Hal Feng
2025-02-05 10:29 ` Emil Renner Berthing
2025-04-23 20:18 ` E Shattow
2025-02-03 1:37 ` [PATCH v2 4/5] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5 E Shattow
2025-02-05 10:33 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 5/5] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader E Shattow
2025-02-05 7:57 ` Hal Feng
2025-02-05 10:01 ` Heinrich Schuchardt
2025-02-06 2:59 ` Hal Feng
2025-02-06 11:17 ` E Shattow
2025-02-07 3:01 ` Hal Feng
2025-02-28 7:53 ` E Shattow
2025-02-28 9:54 ` Maud Spierings
2025-04-24 5:15 ` E Shattow
2025-04-24 10:54 ` Heinrich Schuchardt
2025-04-24 23:37 ` E Shattow
2025-02-05 10:35 ` Emil Renner Berthing
2025-02-05 10:53 ` Conor Dooley
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