From: E Shattow <e@freeshell.de>
To: Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, E Shattow <e@freeshell.de>,
Hal Feng <hal.feng@starfivetech.com>
Subject: [PATCH v2 2/5] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
Date: Sun, 2 Feb 2025 17:37:08 -0800 [thread overview]
Message-ID: <20250203013730.269558-3-e@freeshell.de> (raw)
In-Reply-To: <20250203013730.269558-1-e@freeshell.de>
Sync qspi flash setting to read-delay=2 and spi-max-frequency 100MHz for
better compatibility with operating system and downstream boot loader SPL
secondary program loader.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index a5661b677687..8a59c3001339 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -317,8 +317,8 @@ &qspi {
nor_flash: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
- cdns,read-delay = <5>;
- spi-max-frequency = <12000000>;
+ cdns,read-delay = <2>;
+ spi-max-frequency = <100000000>;
cdns,tshsl-ns = <1>;
cdns,tsd2d-ns = <1>;
cdns,tchsh-ns = <1>;
--
2.47.2
next prev parent reply other threads:[~2025-02-03 1:41 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-03 1:37 [PATCH v2 0/5] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes E Shattow
2025-02-03 1:37 ` [PATCH v2 1/5] riscv: dts: starfive: jh7110-common: replace syscrg clock assignments E Shattow
2025-02-05 10:16 ` Emil Renner Berthing
2025-02-05 12:52 ` E Shattow
2025-02-07 8:31 ` Hal Feng
2025-02-09 23:33 ` E Shattow
2025-02-20 6:38 ` Hal Feng
2025-02-28 8:08 ` E Shattow
2025-02-07 12:21 ` Emil Renner Berthing
2025-02-03 1:37 ` E Shattow [this message]
2025-02-05 10:18 ` [PATCH v2 2/5] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz Emil Renner Berthing
2025-02-05 13:21 ` E Shattow
2025-02-07 12:23 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0 E Shattow
2025-02-05 7:23 ` Hal Feng
2025-02-05 10:29 ` Emil Renner Berthing
2025-04-23 20:18 ` E Shattow
2025-02-03 1:37 ` [PATCH v2 4/5] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5 E Shattow
2025-02-05 10:33 ` Emil Renner Berthing
2025-02-03 1:37 ` [PATCH v2 5/5] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader E Shattow
2025-02-05 7:57 ` Hal Feng
2025-02-05 10:01 ` Heinrich Schuchardt
2025-02-06 2:59 ` Hal Feng
2025-02-06 11:17 ` E Shattow
2025-02-07 3:01 ` Hal Feng
2025-02-28 7:53 ` E Shattow
2025-02-28 9:54 ` Maud Spierings
2025-04-24 5:15 ` E Shattow
2025-04-24 10:54 ` Heinrich Schuchardt
2025-04-24 23:37 ` E Shattow
2025-02-05 10:35 ` Emil Renner Berthing
2025-02-05 10:53 ` Conor Dooley
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