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Mon, 03 Feb 2025 08:27:12 -0800 (PST) Date: Mon, 3 Feb 2025 21:57:06 +0530 From: Manivannan Sadhasivam To: Varadarajan Narayanan Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, p.zabel@pengutronix.de, dmitry.baryshkov@linaro.org, quic_nsekar@quicinc.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Praveenkumar I , Konrad Dybcio Subject: Re: [PATCH v7 7/7] arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers Message-ID: <20250203162706.bz2xtpyuvylgzfdw@thinkpad> References: <20250122063411.3503097-1-quic_varada@quicinc.com> <20250122063411.3503097-8-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250122063411.3503097-8-quic_varada@quicinc.com> On Wed, Jan 22, 2025 at 12:04:11PM +0530, Varadarajan Narayanan wrote: > From: Praveenkumar I > > Enable the PCIe controller and PHY nodes for RDP 441. > > Reviewed-by: Konrad Dybcio > Signed-off-by: Praveenkumar I > Signed-off-by: Varadarajan Narayanan Reviewed-by: Manivannan Sadhasivam - Mani > --- > v5: Add 'Reviewed-by: Konrad Dybcio' > > v4: Fix nodes sort order > Use property-n followed by property-names > > v3: Reorder nodes alphabetically > Fix commit subject > --- > arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts | 76 +++++++++++++++++++++ > 1 file changed, 76 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > index 846413817e9a..79ec77cfe552 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > @@ -32,6 +32,34 @@ &sdhc { > status = "okay"; > }; > > +&pcie0 { > + pinctrl-0 = <&pcie0_default>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; > + > + status = "okay"; > +}; > + > +&pcie0_phy { > + status = "okay"; > +}; > + > +&pcie1 { > + pinctrl-0 = <&pcie1_default>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; > + > + status = "okay"; > +}; > + > +&pcie1_phy { > + status = "okay"; > +}; > + > &tlmm { > i2c_1_pins: i2c-1-state { > pins = "gpio29", "gpio30"; > @@ -40,6 +68,54 @@ i2c_1_pins: i2c-1-state { > bias-pull-up; > }; > > + pcie0_default: pcie0-default-state { > + clkreq-n-pins { > + pins = "gpio37"; > + function = "pcie0_clk"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio38"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + output-low; > + }; > + > + wake-n-pins { > + pins = "gpio39"; > + function = "pcie0_wake"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + }; > + > + pcie1_default: pcie1-default-state { > + clkreq-n-pins { > + pins = "gpio46"; > + function = "pcie1_clk"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio47"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + output-low; > + }; > + > + wake-n-pins { > + pins = "gpio48"; > + function = "pcie1_wake"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + }; > + > sdc_default_state: sdc-default-state { > clk-pins { > pins = "gpio13"; > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம்