* [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support
@ 2025-01-09 4:35 Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
Qualcomm SAR2130P is one of the platforms which require 4-byte reads
when accessing the QFPROM data. Fix several omission in the NVMEM core,
rework the QFPROM driver to use readl() instead of readb() and finally
add compatible string for the QFPROM as present on the Qualcomm
SAR2130P.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Changes in v4:
- Fix conition for bits vs bytes overflow (Akhil)
- Link to v3: https://lore.kernel.org/r/20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org
Changes in v3:
- Reworked the qfprom driver to specify stride and word size (Srinivas)
- Link to v2: https://lore.kernel.org/r/20241027-sar2130p-nvmem-v2-0-743c1271bf2d@linaro.org
Changes in v2:
- Picked up required patch from QCLinux.
- Link to v1: https://lore.kernel.org/r/20241017-sar2130p-nvmem-v1-1-6cc32789afc6@linaro.org
---
Dmitry Baryshkov (5):
nvmem: core: fix bit offsets of more than one byte
nvmem: core: verify cell's raw_len
nvmem: core: update raw_len if the bit reading is required
nvmem: qfprom: switch to 4-byte aligned reads
dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible
.../devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
drivers/nvmem/core.c | 36 +++++++++++++++++-----
drivers/nvmem/qfprom.c | 26 ++++++++++++----
3 files changed, 49 insertions(+), 14 deletions(-)
---
base-commit: f8bde2c106663ee2398a16bf6500f1cc8f5cf64e
change-id: 20241017-sar2130p-nvmem-5f856d99bbb7
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
@ 2025-01-09 4:35 ` Dmitry Baryshkov
2025-02-04 23:40 ` Dmitry Baryshkov
2025-02-17 10:15 ` Srinivas Kandagatla
2025-01-09 4:35 ` [PATCH v4 2/5] nvmem: core: verify cell's raw_len Dmitry Baryshkov
` (3 subsequent siblings)
4 siblings, 2 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
If the NVMEM specifies a stride to access data, reading particular cell
might require bit offset that is bigger than one byte. Rework NVMEM core
code to support bit offsets of more than 8 bits.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/nvmem/core.c | 24 +++++++++++++++++-------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index d6494dfc20a7324bde6415776dcabbb0bfdd334b..7fa85b0804db360035d7471002dbf79658d5830b 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -834,7 +834,9 @@ static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_nod
if (addr && len == (2 * sizeof(u32))) {
info.bit_offset = be32_to_cpup(addr++);
info.nbits = be32_to_cpup(addr);
- if (info.bit_offset >= BITS_PER_BYTE || info.nbits < 1) {
+ if (info.bit_offset >= BITS_PER_BYTE * info.bytes ||
+ info.nbits < 1 ||
+ info.bit_offset + info.nbits > BITS_PER_BYTE * info.bytes) {
dev_err(dev, "nvmem: invalid bits on %pOF\n", child);
of_node_put(child);
return -EINVAL;
@@ -1627,21 +1629,29 @@ EXPORT_SYMBOL_GPL(nvmem_cell_put);
static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell, void *buf)
{
u8 *p, *b;
- int i, extra, bit_offset = cell->bit_offset;
+ int i, extra, bytes_offset;
+ int bit_offset = cell->bit_offset;
p = b = buf;
- if (bit_offset) {
+
+ bytes_offset = bit_offset / BITS_PER_BYTE;
+ b += bytes_offset;
+ bit_offset %= BITS_PER_BYTE;
+
+ if (bit_offset % BITS_PER_BYTE) {
/* First shift */
- *b++ >>= bit_offset;
+ *p = *b++ >> bit_offset;
/* setup rest of the bytes if any */
for (i = 1; i < cell->bytes; i++) {
/* Get bits from next byte and shift them towards msb */
- *p |= *b << (BITS_PER_BYTE - bit_offset);
+ *p++ |= *b << (BITS_PER_BYTE - bit_offset);
- p = b;
- *b++ >>= bit_offset;
+ *p = *b++ >> bit_offset;
}
+ } else if (p != b) {
+ memmove(p, b, cell->bytes - bytes_offset);
+ p += cell->bytes - 1;
} else {
/* point to the msb */
p += cell->bytes - 1;
--
2.39.5
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
@ 2025-01-09 4:35 ` Dmitry Baryshkov
2025-02-19 14:51 ` Mark Brown
2025-01-09 4:35 ` [PATCH v4 3/5] nvmem: core: update raw_len if the bit reading is required Dmitry Baryshkov
` (2 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise
Otherwise drivers might face incomplete read while accessing the last
part of the NVMEM cell.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/nvmem/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 7fa85b0804db360035d7471002dbf79658d5830b..59885d8b6a19d01f50759f09d453b092d1ec44bb 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -602,6 +602,14 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem,
return -EINVAL;
}
+ if (!IS_ALIGNED(cell->raw_len, nvmem->word_size)) {
+ dev_err(&nvmem->dev,
+ "cell %s raw len %zd unaligned to nvmem word size %d\n",
+ cell->name ?: "<unknown>", cell->raw_len,
+ nvmem->word_size);
+ return -EINVAL;
+ }
+
return 0;
}
--
2.39.5
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v4 3/5] nvmem: core: update raw_len if the bit reading is required
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 2/5] nvmem: core: verify cell's raw_len Dmitry Baryshkov
@ 2025-01-09 4:35 ` Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 4/5] nvmem: qfprom: switch to 4-byte aligned reads Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible Dmitry Baryshkov
4 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
If NVMEM cell uses bit offset or specifies bit truncation, update
raw_len manually (following the cell->bytes update), ensuring that the
NVMEM access is still word-aligned.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/nvmem/core.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 59885d8b6a19d01f50759f09d453b092d1ec44bb..d3c2e6917ed32ace30844faaab27c41779b5bbf6 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -591,9 +591,11 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem,
cell->nbits = info->nbits;
cell->np = info->np;
- if (cell->nbits)
+ if (cell->nbits) {
cell->bytes = DIV_ROUND_UP(cell->nbits + cell->bit_offset,
BITS_PER_BYTE);
+ cell->raw_len = ALIGN(cell->bytes, nvmem->word_size);
+ }
if (!IS_ALIGNED(cell->offset, nvmem->stride)) {
dev_err(&nvmem->dev,
--
2.39.5
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v4 4/5] nvmem: qfprom: switch to 4-byte aligned reads
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
` (2 preceding siblings ...)
2025-01-09 4:35 ` [PATCH v4 3/5] nvmem: core: update raw_len if the bit reading is required Dmitry Baryshkov
@ 2025-01-09 4:35 ` Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible Dmitry Baryshkov
4 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
All platforms since Snapdragon 8 Gen1 (SM8450) require using 4-byte
reads to access QFPROM data. While older platforms were more than happy
with 1-byte reads, change the qfprom driver to use 4-byte reads for all
the platforms. Specify stride and word size of 4 bytes. To retain
compatibility with the existing DT and to simplify porting data from
vendor kernels, use fixup_dt_cell_info in order to bump alignment
requirements.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/nvmem/qfprom.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
index 116a39e804c70b4a0374f8ea3ac6ba1dd612109d..a872c640b8c5a558da9ea00e3804c904f8987247 100644
--- a/drivers/nvmem/qfprom.c
+++ b/drivers/nvmem/qfprom.c
@@ -321,19 +321,32 @@ static int qfprom_reg_read(void *context,
unsigned int reg, void *_val, size_t bytes)
{
struct qfprom_priv *priv = context;
- u8 *val = _val;
- int i = 0, words = bytes;
+ u32 *val = _val;
void __iomem *base = priv->qfpcorrected;
+ int words = DIV_ROUND_UP(bytes, sizeof(u32));
+ int i;
if (read_raw_data && priv->qfpraw)
base = priv->qfpraw;
- while (words--)
- *val++ = readb(base + reg + i++);
+ for (i = 0; i < words; i++)
+ *val++ = readl(base + reg + i * sizeof(u32));
return 0;
}
+/* Align reads to word boundary */
+static void qfprom_fixup_dt_cell_info(struct nvmem_device *nvmem,
+ struct nvmem_cell_info *cell)
+{
+ unsigned int byte_offset = cell->offset % sizeof(u32);
+
+ cell->bit_offset += byte_offset * BITS_PER_BYTE;
+ cell->offset -= byte_offset;
+ if (byte_offset && !cell->nbits)
+ cell->nbits = cell->bytes * BITS_PER_BYTE;
+}
+
static void qfprom_runtime_disable(void *data)
{
pm_runtime_disable(data);
@@ -358,10 +371,11 @@ static int qfprom_probe(struct platform_device *pdev)
struct nvmem_config econfig = {
.name = "qfprom",
.add_legacy_fixed_of_cells = true,
- .stride = 1,
- .word_size = 1,
+ .stride = 4,
+ .word_size = 4,
.id = NVMEM_DEVID_AUTO,
.reg_read = qfprom_reg_read,
+ .fixup_dt_cell_info = qfprom_fixup_dt_cell_info,
};
struct device *dev = &pdev->dev;
struct resource *res;
--
2.39.5
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
` (3 preceding siblings ...)
2025-01-09 4:35 ` [PATCH v4 4/5] nvmem: qfprom: switch to 4-byte aligned reads Dmitry Baryshkov
@ 2025-01-09 4:35 ` Dmitry Baryshkov
2025-02-04 16:55 ` Rob Herring
4 siblings, 1 reply; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-01-09 4:35 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
Document compatible for the QFPROM on SAR2130P platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 80845c722ae46611c722effeaaf014a0caf76e4a..9755b31946bf9d4c1055a993145d06c274b61a37 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
@@ -32,6 +32,7 @@ properties:
- qcom,msm8998-qfprom
- qcom,qcm2290-qfprom
- qcom,qcs404-qfprom
+ - qcom,sar2130p-qfprom
- qcom,sc7180-qfprom
- qcom,sc7280-qfprom
- qcom,sc8280xp-qfprom
--
2.39.5
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible
2025-01-09 4:35 ` [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible Dmitry Baryshkov
@ 2025-02-04 16:55 ` Rob Herring
0 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2025-02-04 16:55 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Srinivas Kandagatla, Krzysztof Kozlowski, Conor Dooley,
Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
On Thu, Jan 09, 2025 at 06:35:49AM +0200, Dmitry Baryshkov wrote:
> Document compatible for the QFPROM on SAR2130P platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
> 1 file changed, 1 insertion(+)
As the user in the .dts is already upstream, I've applied this.
Rob
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
@ 2025-02-04 23:40 ` Dmitry Baryshkov
2025-02-17 10:15 ` Srinivas Kandagatla
1 sibling, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-02-04 23:40 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
On Thu, Jan 09, 2025 at 06:35:45AM +0200, Dmitry Baryshkov wrote:
> If the NVMEM specifies a stride to access data, reading particular cell
> might require bit offset that is bigger than one byte. Rework NVMEM core
> code to support bit offsets of more than 8 bits.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/nvmem/core.c | 24 +++++++++++++++++-------
> 1 file changed, 17 insertions(+), 7 deletions(-)
Srinivas, it has been almost a month ago, we are past the merge window.
Could you please review the patchset? I'd like to understand if we need
to spend more time on it or if it is fine.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
2025-02-04 23:40 ` Dmitry Baryshkov
@ 2025-02-17 10:15 ` Srinivas Kandagatla
1 sibling, 0 replies; 14+ messages in thread
From: Srinivas Kandagatla @ 2025-02-17 10:15 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Akhil P Oommen, linux-arm-msm, devicetree, linux-kernel
On 09/01/2025 04:35, Dmitry Baryshkov wrote:
> If the NVMEM specifies a stride to access data, reading particular cell
> might require bit offset that is bigger than one byte. Rework NVMEM core
> code to support bit offsets of more than 8 bits.
If the plan is to support bit offset above 8 bits, please update
./Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml to
reflect this too.
--srini
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/nvmem/core.c | 24 +++++++++++++++++-------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
> index d6494dfc20a7324bde6415776dcabbb0bfdd334b..7fa85b0804db360035d7471002dbf79658d5830b 100644
> --- a/drivers/nvmem/core.c
> +++ b/drivers/nvmem/core.c
> @@ -834,7 +834,9 @@ static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_nod
> if (addr && len == (2 * sizeof(u32))) {
> info.bit_offset = be32_to_cpup(addr++);
> info.nbits = be32_to_cpup(addr);
> - if (info.bit_offset >= BITS_PER_BYTE || info.nbits < 1) {
> + if (info.bit_offset >= BITS_PER_BYTE * info.bytes ||
> + info.nbits < 1 ||
> + info.bit_offset + info.nbits > BITS_PER_BYTE * info.bytes) {
> dev_err(dev, "nvmem: invalid bits on %pOF\n", child);
> of_node_put(child);
> return -EINVAL;
> @@ -1627,21 +1629,29 @@ EXPORT_SYMBOL_GPL(nvmem_cell_put);
> static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell, void *buf)
> {
> u8 *p, *b;
> - int i, extra, bit_offset = cell->bit_offset;
> + int i, extra, bytes_offset;
> + int bit_offset = cell->bit_offset;
>
> p = b = buf;
> - if (bit_offset) {
> +
> + bytes_offset = bit_offset / BITS_PER_BYTE;
> + b += bytes_offset;
> + bit_offset %= BITS_PER_BYTE;
> +
> + if (bit_offset % BITS_PER_BYTE) {
> /* First shift */
> - *b++ >>= bit_offset;
> + *p = *b++ >> bit_offset;
>
> /* setup rest of the bytes if any */
> for (i = 1; i < cell->bytes; i++) {
> /* Get bits from next byte and shift them towards msb */
> - *p |= *b << (BITS_PER_BYTE - bit_offset);
> + *p++ |= *b << (BITS_PER_BYTE - bit_offset);
>
> - p = b;
> - *b++ >>= bit_offset;
> + *p = *b++ >> bit_offset;
> }
> + } else if (p != b) {
> + memmove(p, b, cell->bytes - bytes_offset);
> + p += cell->bytes - 1;
> } else {
> /* point to the msb */
> p += cell->bytes - 1;
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-01-09 4:35 ` [PATCH v4 2/5] nvmem: core: verify cell's raw_len Dmitry Baryshkov
@ 2025-02-19 14:51 ` Mark Brown
2025-02-19 15:14 ` Dmitry Baryshkov
0 siblings, 1 reply; 14+ messages in thread
From: Mark Brown @ 2025-02-19 14:51 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Akhil P Oommen, linux-arm-msm, devicetree,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 9968 bytes --]
On Thu, Jan 09, 2025 at 06:35:46AM +0200, Dmitry Baryshkov wrote:
> Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise
> Otherwise drivers might face incomplete read while accessing the last
> part of the NVMEM cell.
I'm seeing a bunch of failures on i.MX platforms in -next which bisect
to this patch. For example on the i.MX6q based UDOOq various things
including the ethernet fail to come up due to the efuse not appearing:
[ 1.735264] nvmem imx-ocotp0: cell mac-addr raw len 6 unaligned to nvmem word size 4
[ 1.735289] imx_ocotp 21bc000.efuse: probe with driver imx_ocotp failed with error -22
...
[ 12.647970] platform 20c8000.anatop:tempmon: deferred probe pending: platform: wait for supplier /soc/bus@2100000/efuse@21bc000/temp-grade@20
[ 12.648001] platform imx6q-cpufreq: deferred probe pending: (reason unknown)
[ 12.648012] platform 2188000.ethernet: deferred probe pending: platform: wait for supplier /soc/bus@2100000/efuse@21bc000/mac-addr@88
full log:
https://lava.sirena.org.uk/scheduler/job/1128243
I'm also seeing the efuse failing to come up on i.MX8MP platforms:
[ 2.503137] nvmem imx-ocotp0: cell mac-address raw len 6 unaligned to nvmem word size 4
[ 2.503155] imx_ocotp 30350000.efuse: probe with driver imx_ocotp failed with error -22
Full log:
https://lava.sirena.org.uk/scheduler/job/1126672
Bisection log, there's a bunch of additional good commits added at the
start because my automation feeds in results it already knows about to
narrow things down:
# bad: [8936cec5cb6e27649b86fabf383d7ce4113bba49] Add linux-next specific files for 20250219
# good: [67961d4f4e34f5ed1aeebab08f42c2e706837ec5] Merge branch 'for-linux-next-fixes' of https://gitlab.freedesktop.org/drm/misc/kernel.git
# good: [d1a09c610027e446ed30c21f61c2f2443bf92a3f] MAINTAINERS: adjust the file entry in SPI OFFLOAD
# good: [5d9fca12f54d3e25e02521aa8f3ec5d53759b334] ASoC: amd: ps: fix inconsistent indenting warning in check_and_handle_sdw_dma_irq()
# good: [e08fe24c34d37d00e84009f2fb4c35f5978041e6] ASoC: SOF: Intel: Use str_enable_disable() helper
# good: [d64c4c3d1c578f98d70db1c5e2535b47adce9d07] ASoC: tas2764: Add reg defaults for TAS2764_INT_CLK_CFG
# good: [42da18e62652b58ba5ecd1524c146b202cda9bb7] ASoC: soc-pcm: cleanup dpcm_fe_dai_do_trigger()
# good: [994719ed6d81a6f4677875ab6730254c0bc484ea] ASoC: Intel: avs: Use str_on_off() in avs_dsp_core_power()
# good: [ae575d2145d1a2c8bb5d2835d7d54751f3b0bace] ASoC: tegra: Remove the isomgr_bw APIs export
# good: [f22ba3561daa792dd138ed543e0bf48efe0b999c] ASoC: SOF: imx-common: set sdev->pdata->hw_pdata after common is alloc'd
# good: [ad0fbcebb5f6e093d433a0873758a2778d747eb8] ASoC: adau1701: use gpiod_multi_set_value_cansleep
# good: [e957c96455e8f4c630d5e374312cad0633ca7e17] spi: offload: fix use after free
# good: [ff4d4158ef9143327a42f7be4298751cb0d1be69] spi: spi-offload-trigger-pwm: add extra headers
# good: [21aa330fec31bb530a4ef6c9555fb157d0711112] ASoC: fsl_micfil: Add decimation filter bypass mode support
# good: [c5528214c7c0a753c908a7b353309ba665985fb4] ASoC: codecs: wcd93xx-sdw: fix of_property_read_bool() warnings
# good: [330cbb40bb3664a18a19760bd6dc6003d6624041] dt-bindings: ASoC: rockchip: Add compatible for RK3588 SPDIF
# good: [5a19e1985d014fab9892348f6175a19143cec810] spi: axi-spi-engine: implement offload support
# good: [6cf5df1040ba0694aea6a5edc6f31811a442ea36] ASoC: SOF: imx: add driver for the imx95 chip
# good: [9da195880f167ab7c2d595388decf783c9920121] ASoC: SDCA: Add support for PDE Entity properties
# good: [852c0b7204ded184924c41ab99b2ac7a70ad4dab] ASoC: Intel: soc-acpi-intel-ptl-match: add rt713_vb_l2_rt1320_l13
# good: [4bb5b6f13fd83b32c8a93fbd399e7558415d1ce0] ASoC: amd: amd_sdw: Add quirks for Dell SKU's
# good: [cb161c333927142818d6bf22a4da2b023fb2b8c9] ASoC: tas2781: Switch to use %ptTsr
# good: [153dbf4adad0082d030c30d20541df2b1af52db6] regmap: irq: Use one way of setting all bits in the register
# good: [0e9a970d7b2cb98d741bc0e32ad8c8f30c009c63] ASoC: qcom: sdw: Add get and set channel maps support from codec to cpu dais
# good: [583348bd65ceaf4a5067a6267dd236929e1b4b37] ASoC: SOF: ipc4-topology: Improve the information in prepare_copier prints
# good: [0a7c85b516830c0bb088b0bdb2f2c50c76fc531a] regulator: ad5398: Fix incorrect power down bit mask
# good: [4c7518062d638837cea915e0ffe30f846780639a] ASoC: SOF: ipc4: Add support for split firmware releases
# good: [215705db51eb23052c73126d2efb6acbc2db0424] spi: Replace custom fsleep() implementation
# good: [6603c5133daadbb3277fbd93be0d0d5b8ec928e8] ASoC: dt-bindings: atmel,at91-ssc: Convert to YAML format
# good: [25fac20edd09b60651eabcc57c187b1277f43d08] spi: gpio: Support a single always-selected device
# good: [e27c125040b1e1f26d910b46daabbe55e67fdf3b] ASoC: codecs: wcd934x: use wcd934x binding header
# good: [652ffad172d089acb1a20e5fde1b66e687832b06] spi: fsi: Batch TX operations
# good: [6eab7034579917f207ca6d8e3f4e11e85e0ab7d5] ASoC: soc-core: Stop using of_property_read_bool() for non-boolean properties
# good: [856366dc924a9561dae39f252b45dfd6cc6895ce] ALSA: hda: Select avs-driver by default on MBL
# good: [5a6a461079decea452fdcae955bccecf92e07e97] regulator: ad5398: Add device tree support
# good: [f5aab0438ef17f01c5ecd25e61ae6a03f82a4586] regulator: pca9450: Fix enable register for LDO5
# good: [c1ac98492d1584d31f335d233a5cd7a4d4116e5a] spi: realtek-rtl-snand: Drop unneeded assignment for cache_type
# good: [7ed1b265021dd13ce5619501b388e489ddc8e204] ASoC: cpcap: Implement jack detection
# good: [89785306453ce6d949e783f6936821a0b7649ee2] spi: zynqmp-gqspi: Always acknowledge interrupts
# good: [995cf0e014b0144edf1125668a97c252c5ab775e] regmap: Reorder 'struct regmap'
git bisect start '8936cec5cb6e27649b86fabf383d7ce4113bba49' '67961d4f4e34f5ed1aeebab08f42c2e706837ec5' 'd1a09c610027e446ed30c21f61c2f2443bf92a3f' '5d9fca12f54d3e25e02521aa8f3ec5d53759b334' 'e08fe24c34d37d00e84009f2fb4c35f5978041e6' 'd64c4c3d1c578f98d70db1c5e2535b47adce9d07' '42da18e62652b58ba5ecd1524c146b202cda9bb7' '994719ed6d81a6f4677875ab6730254c0bc484ea' 'ae575d2145d1a2c8bb5d2835d7d54751f3b0bace' 'f22ba3561daa792dd138ed543e0bf48efe0b999c' 'ad0fbcebb5f6e093d433a0873758a2778d747eb8' 'e957c96455e8f4c630d5e374312cad0633ca7e17' 'ff4d4158ef9143327a42f7be4298751cb0d1be69' '21aa330fec31bb530a4ef6c9555fb157d0711112' 'c5528214c7c0a753c908a7b353309ba665985fb4' '330cbb40bb3664a18a19760bd6dc6003d6624041' '5a19e1985d014fab9892348f6175a19143cec810' '6cf5df1040ba0694aea6a5edc6f31811a442ea36' '9da195880f167ab7c2d595388decf783c9920121' '852c0b7204ded184924c41ab99b2ac7a70ad4dab' '4bb5b6f13fd83b32c8a93fbd399e7558415d1ce0' 'cb161c333927142818d6bf22a4da2b023fb2b8c9' '153dbf4adad0082d030c30d20541df2b1af52db6' '0e9a970d7b2cb98d741bc0e32ad8c8f30c009c63' '583348bd65ceaf4a5067a6267dd236929e1b4b37' '0a7c85b516830c0bb088b0bdb2f2c50c76fc531a' '4c7518062d638837cea915e0ffe30f846780639a' '215705db51eb23052c73126d2efb6acbc2db0424' '6603c5133daadbb3277fbd93be0d0d5b8ec928e8' '25fac20edd09b60651eabcc57c187b1277f43d08' 'e27c125040b1e1f26d910b46daabbe55e67fdf3b' '652ffad172d089acb1a20e5fde1b66e687832b06' '6eab7034579917f207ca6d8e3f4e11e85e0ab7d5' '856366dc924a9561dae39f252b45dfd6cc6895ce' '5a6a461079decea452fdcae955bccecf92e07e97' 'f5aab0438ef17f01c5ecd25e61ae6a03f82a4586' 'c1ac98492d1584d31f335d233a5cd7a4d4116e5a' '7ed1b265021dd13ce5619501b388e489ddc8e204' '89785306453ce6d949e783f6936821a0b7649ee2' '995cf0e014b0144edf1125668a97c252c5ab775e'
# bad: [8936cec5cb6e27649b86fabf383d7ce4113bba49] Add linux-next specific files for 20250219
git bisect bad 8936cec5cb6e27649b86fabf383d7ce4113bba49
# good: [4aa591507214c82976992e1810d5ac121a8545d2] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
git bisect good 4aa591507214c82976992e1810d5ac121a8545d2
# good: [79eb91f3f44b4146967f38834f55b21c328569ee] Merge branch 'for-next' of git://git.kernel.dk/linux-block.git
git bisect good 79eb91f3f44b4146967f38834f55b21c328569ee
# good: [c21be55001aaa27cb2470ecc26109970058228f1] Merge branch 'driver-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git
git bisect good c21be55001aaa27cb2470ecc26109970058228f1
# good: [b708438ccc2b4dc37ec478db6589c03aca76c4ac] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
git bisect good b708438ccc2b4dc37ec478db6589c03aca76c4ac
# bad: [3a3b9078eb6ae21a99e26b80447e1dcf31cd6491] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-auxdisplay.git
git bisect bad 3a3b9078eb6ae21a99e26b80447e1dcf31cd6491
# good: [7e17e80c3a7eb2734795f66ba946f933412d597f] Merge branch 'for-6.14/stack-order' into for-next
git bisect good 7e17e80c3a7eb2734795f66ba946f933412d597f
# good: [e5bb72d538dabba8cad1224b853aa0fbd6d79844] Merge branch 'at24/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
git bisect good e5bb72d538dabba8cad1224b853aa0fbd6d79844
# bad: [4770132f37dbf327d25455d226e54fafbef6a5c4] nvmem: qfprom: switch to 4-byte aligned reads
git bisect bad 4770132f37dbf327d25455d226e54fafbef6a5c4
# good: [3419bdfd88e314bc5f80b02fa4651c81a0a85b57] dt-bindings: nvmem: qfprom: Add X1E80100 compatible
git bisect good 3419bdfd88e314bc5f80b02fa4651c81a0a85b57
# good: [d5d9e982a0886a1a99a1a8ef5320c57e257b4fb0] nvmem: core: fix bit offsets of more than one byte
git bisect good d5d9e982a0886a1a99a1a8ef5320c57e257b4fb0
# bad: [eca73df072715efb5e880514bb8395e0a4e74a59] nvmem: core: update raw_len if the bit reading is required
git bisect bad eca73df072715efb5e880514bb8395e0a4e74a59
# bad: [11ccaa3121119eeff9ab9d537e0cf6be3b10698b] nvmem: core: verify cell's raw_len
git bisect bad 11ccaa3121119eeff9ab9d537e0cf6be3b10698b
# first bad commit: [11ccaa3121119eeff9ab9d537e0cf6be3b10698b] nvmem: core: verify cell's raw_len
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-02-19 14:51 ` Mark Brown
@ 2025-02-19 15:14 ` Dmitry Baryshkov
2025-02-20 14:18 ` Mark Brown
0 siblings, 1 reply; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-02-19 15:14 UTC (permalink / raw)
To: Mark Brown
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Akhil P Oommen, linux-arm-msm, devicetree,
linux-kernel
On Wed, 19 Feb 2025 at 16:51, Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Jan 09, 2025 at 06:35:46AM +0200, Dmitry Baryshkov wrote:
> > Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise
> > Otherwise drivers might face incomplete read while accessing the last
> > part of the NVMEM cell.
>
> I'm seeing a bunch of failures on i.MX platforms in -next which bisect
> to this patch. For example on the i.MX6q based UDOOq various things
> including the ethernet fail to come up due to the efuse not appearing:
>
> [ 1.735264] nvmem imx-ocotp0: cell mac-addr raw len 6 unaligned to nvmem word size 4
> [ 1.735289] imx_ocotp 21bc000.efuse: probe with driver imx_ocotp failed with error -22
This looks like an error on the i.MX platforms. The raw_len must be
aligned to word size. I think the easiest fix is to implement the
.fixup_dt_cell_info() callback like I did for the qfprom driver.
>
> ...
>
> [ 12.647970] platform 20c8000.anatop:tempmon: deferred probe pending: platform: wait for supplier /soc/bus@2100000/efuse@21bc000/temp-grade@20
> [ 12.648001] platform imx6q-cpufreq: deferred probe pending: (reason unknown)
> [ 12.648012] platform 2188000.ethernet: deferred probe pending: platform: wait for supplier /soc/bus@2100000/efuse@21bc000/mac-addr@88
>
> full log:
>
> https://lava.sirena.org.uk/scheduler/job/1128243
>
> I'm also seeing the efuse failing to come up on i.MX8MP platforms:
>
> [ 2.503137] nvmem imx-ocotp0: cell mac-address raw len 6 unaligned to nvmem word size 4
> [ 2.503155] imx_ocotp 30350000.efuse: probe with driver imx_ocotp failed with error -22
>
> Full log:
>
> https://lava.sirena.org.uk/scheduler/job/1126672
>
> Bisection log, there's a bunch of additional good commits added at the
> start because my automation feeds in results it already knows about to
> narrow things down:
>
> # bad: [8936cec5cb6e27649b86fabf383d7ce4113bba49] Add linux-next specific files for 20250219
> # good: [67961d4f4e34f5ed1aeebab08f42c2e706837ec5] Merge branch 'for-linux-next-fixes' of https://gitlab.freedesktop.org/drm/misc/kernel.git
> # good: [d1a09c610027e446ed30c21f61c2f2443bf92a3f] MAINTAINERS: adjust the file entry in SPI OFFLOAD
> # good: [5d9fca12f54d3e25e02521aa8f3ec5d53759b334] ASoC: amd: ps: fix inconsistent indenting warning in check_and_handle_sdw_dma_irq()
> # good: [e08fe24c34d37d00e84009f2fb4c35f5978041e6] ASoC: SOF: Intel: Use str_enable_disable() helper
> # good: [d64c4c3d1c578f98d70db1c5e2535b47adce9d07] ASoC: tas2764: Add reg defaults for TAS2764_INT_CLK_CFG
> # good: [42da18e62652b58ba5ecd1524c146b202cda9bb7] ASoC: soc-pcm: cleanup dpcm_fe_dai_do_trigger()
> # good: [994719ed6d81a6f4677875ab6730254c0bc484ea] ASoC: Intel: avs: Use str_on_off() in avs_dsp_core_power()
> # good: [ae575d2145d1a2c8bb5d2835d7d54751f3b0bace] ASoC: tegra: Remove the isomgr_bw APIs export
> # good: [f22ba3561daa792dd138ed543e0bf48efe0b999c] ASoC: SOF: imx-common: set sdev->pdata->hw_pdata after common is alloc'd
> # good: [ad0fbcebb5f6e093d433a0873758a2778d747eb8] ASoC: adau1701: use gpiod_multi_set_value_cansleep
> # good: [e957c96455e8f4c630d5e374312cad0633ca7e17] spi: offload: fix use after free
> # good: [ff4d4158ef9143327a42f7be4298751cb0d1be69] spi: spi-offload-trigger-pwm: add extra headers
> # good: [21aa330fec31bb530a4ef6c9555fb157d0711112] ASoC: fsl_micfil: Add decimation filter bypass mode support
> # good: [c5528214c7c0a753c908a7b353309ba665985fb4] ASoC: codecs: wcd93xx-sdw: fix of_property_read_bool() warnings
> # good: [330cbb40bb3664a18a19760bd6dc6003d6624041] dt-bindings: ASoC: rockchip: Add compatible for RK3588 SPDIF
> # good: [5a19e1985d014fab9892348f6175a19143cec810] spi: axi-spi-engine: implement offload support
> # good: [6cf5df1040ba0694aea6a5edc6f31811a442ea36] ASoC: SOF: imx: add driver for the imx95 chip
> # good: [9da195880f167ab7c2d595388decf783c9920121] ASoC: SDCA: Add support for PDE Entity properties
> # good: [852c0b7204ded184924c41ab99b2ac7a70ad4dab] ASoC: Intel: soc-acpi-intel-ptl-match: add rt713_vb_l2_rt1320_l13
> # good: [4bb5b6f13fd83b32c8a93fbd399e7558415d1ce0] ASoC: amd: amd_sdw: Add quirks for Dell SKU's
> # good: [cb161c333927142818d6bf22a4da2b023fb2b8c9] ASoC: tas2781: Switch to use %ptTsr
> # good: [153dbf4adad0082d030c30d20541df2b1af52db6] regmap: irq: Use one way of setting all bits in the register
> # good: [0e9a970d7b2cb98d741bc0e32ad8c8f30c009c63] ASoC: qcom: sdw: Add get and set channel maps support from codec to cpu dais
> # good: [583348bd65ceaf4a5067a6267dd236929e1b4b37] ASoC: SOF: ipc4-topology: Improve the information in prepare_copier prints
> # good: [0a7c85b516830c0bb088b0bdb2f2c50c76fc531a] regulator: ad5398: Fix incorrect power down bit mask
> # good: [4c7518062d638837cea915e0ffe30f846780639a] ASoC: SOF: ipc4: Add support for split firmware releases
> # good: [215705db51eb23052c73126d2efb6acbc2db0424] spi: Replace custom fsleep() implementation
> # good: [6603c5133daadbb3277fbd93be0d0d5b8ec928e8] ASoC: dt-bindings: atmel,at91-ssc: Convert to YAML format
> # good: [25fac20edd09b60651eabcc57c187b1277f43d08] spi: gpio: Support a single always-selected device
> # good: [e27c125040b1e1f26d910b46daabbe55e67fdf3b] ASoC: codecs: wcd934x: use wcd934x binding header
> # good: [652ffad172d089acb1a20e5fde1b66e687832b06] spi: fsi: Batch TX operations
> # good: [6eab7034579917f207ca6d8e3f4e11e85e0ab7d5] ASoC: soc-core: Stop using of_property_read_bool() for non-boolean properties
> # good: [856366dc924a9561dae39f252b45dfd6cc6895ce] ALSA: hda: Select avs-driver by default on MBL
> # good: [5a6a461079decea452fdcae955bccecf92e07e97] regulator: ad5398: Add device tree support
> # good: [f5aab0438ef17f01c5ecd25e61ae6a03f82a4586] regulator: pca9450: Fix enable register for LDO5
> # good: [c1ac98492d1584d31f335d233a5cd7a4d4116e5a] spi: realtek-rtl-snand: Drop unneeded assignment for cache_type
> # good: [7ed1b265021dd13ce5619501b388e489ddc8e204] ASoC: cpcap: Implement jack detection
> # good: [89785306453ce6d949e783f6936821a0b7649ee2] spi: zynqmp-gqspi: Always acknowledge interrupts
> # good: [995cf0e014b0144edf1125668a97c252c5ab775e] regmap: Reorder 'struct regmap'
> git bisect start '8936cec5cb6e27649b86fabf383d7ce4113bba49' '67961d4f4e34f5ed1aeebab08f42c2e706837ec5' 'd1a09c610027e446ed30c21f61c2f2443bf92a3f' '5d9fca12f54d3e25e02521aa8f3ec5d53759b334' 'e08fe24c34d37d00e84009f2fb4c35f5978041e6' 'd64c4c3d1c578f98d70db1c5e2535b47adce9d07' '42da18e62652b58ba5ecd1524c146b202cda9bb7' '994719ed6d81a6f4677875ab6730254c0bc484ea' 'ae575d2145d1a2c8bb5d2835d7d54751f3b0bace' 'f22ba3561daa792dd138ed543e0bf48efe0b999c' 'ad0fbcebb5f6e093d433a0873758a2778d747eb8' 'e957c96455e8f4c630d5e374312cad0633ca7e17' 'ff4d4158ef9143327a42f7be4298751cb0d1be69' '21aa330fec31bb530a4ef6c9555fb157d0711112' 'c5528214c7c0a753c908a7b353309ba665985fb4' '330cbb40bb3664a18a19760bd6dc6003d6624041' '5a19e1985d014fab9892348f6175a19143cec810' '6cf5df1040ba0694aea6a5edc6f31811a442ea36' '9da195880f167ab7c2d595388decf783c9920121' '852c0b7204ded184924c41ab99b2ac7a70ad4dab' '4bb5b6f13fd83b32c8a93fbd399e7558415d1ce0' 'cb161c333927142818d6bf22a4da2b023fb2b8c9' '153dbf4adad0082d030c30d20541df2b1af52db6' '0e9a970d7b2cb98d741bc0e32ad8c8f30c009c63' '583348bd65ceaf4a5067a6267dd236929e1b4b37' '0a7c85b516830c0bb088b0bdb2f2c50c76fc531a' '4c7518062d638837cea915e0ffe30f846780639a' '215705db51eb23052c73126d2efb6acbc2db0424' '6603c5133daadbb3277fbd93be0d0d5b8ec928e8' '25fac20edd09b60651eabcc57c187b1277f43d08' 'e27c125040b1e1f26d910b46daabbe55e67fdf3b' '652ffad172d089acb1a20e5fde1b66e687832b06' '6eab7034579917f207ca6d8e3f4e11e85e0ab7d5' '856366dc924a9561dae39f252b45dfd6cc6895ce' '5a6a461079decea452fdcae955bccecf92e07e97' 'f5aab0438ef17f01c5ecd25e61ae6a03f82a4586' 'c1ac98492d1584d31f335d233a5cd7a4d4116e5a' '7ed1b265021dd13ce5619501b388e489ddc8e204' '89785306453ce6d949e783f6936821a0b7649ee2' '995cf0e014b0144edf1125668a97c252c5ab775e'
> # bad: [8936cec5cb6e27649b86fabf383d7ce4113bba49] Add linux-next specific files for 20250219
> git bisect bad 8936cec5cb6e27649b86fabf383d7ce4113bba49
> # good: [4aa591507214c82976992e1810d5ac121a8545d2] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
> git bisect good 4aa591507214c82976992e1810d5ac121a8545d2
> # good: [79eb91f3f44b4146967f38834f55b21c328569ee] Merge branch 'for-next' of git://git.kernel.dk/linux-block.git
> git bisect good 79eb91f3f44b4146967f38834f55b21c328569ee
> # good: [c21be55001aaa27cb2470ecc26109970058228f1] Merge branch 'driver-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git
> git bisect good c21be55001aaa27cb2470ecc26109970058228f1
> # good: [b708438ccc2b4dc37ec478db6589c03aca76c4ac] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
> git bisect good b708438ccc2b4dc37ec478db6589c03aca76c4ac
> # bad: [3a3b9078eb6ae21a99e26b80447e1dcf31cd6491] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-auxdisplay.git
> git bisect bad 3a3b9078eb6ae21a99e26b80447e1dcf31cd6491
> # good: [7e17e80c3a7eb2734795f66ba946f933412d597f] Merge branch 'for-6.14/stack-order' into for-next
> git bisect good 7e17e80c3a7eb2734795f66ba946f933412d597f
> # good: [e5bb72d538dabba8cad1224b853aa0fbd6d79844] Merge branch 'at24/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
> git bisect good e5bb72d538dabba8cad1224b853aa0fbd6d79844
> # bad: [4770132f37dbf327d25455d226e54fafbef6a5c4] nvmem: qfprom: switch to 4-byte aligned reads
> git bisect bad 4770132f37dbf327d25455d226e54fafbef6a5c4
> # good: [3419bdfd88e314bc5f80b02fa4651c81a0a85b57] dt-bindings: nvmem: qfprom: Add X1E80100 compatible
> git bisect good 3419bdfd88e314bc5f80b02fa4651c81a0a85b57
> # good: [d5d9e982a0886a1a99a1a8ef5320c57e257b4fb0] nvmem: core: fix bit offsets of more than one byte
> git bisect good d5d9e982a0886a1a99a1a8ef5320c57e257b4fb0
> # bad: [eca73df072715efb5e880514bb8395e0a4e74a59] nvmem: core: update raw_len if the bit reading is required
> git bisect bad eca73df072715efb5e880514bb8395e0a4e74a59
> # bad: [11ccaa3121119eeff9ab9d537e0cf6be3b10698b] nvmem: core: verify cell's raw_len
> git bisect bad 11ccaa3121119eeff9ab9d537e0cf6be3b10698b
> # first bad commit: [11ccaa3121119eeff9ab9d537e0cf6be3b10698b] nvmem: core: verify cell's raw_len
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-02-19 15:14 ` Dmitry Baryshkov
@ 2025-02-20 14:18 ` Mark Brown
2025-02-20 15:50 ` Dmitry Baryshkov
0 siblings, 1 reply; 14+ messages in thread
From: Mark Brown @ 2025-02-20 14:18 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Akhil P Oommen, linux-arm-msm, devicetree,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1310 bytes --]
On Wed, Feb 19, 2025 at 05:14:43PM +0200, Dmitry Baryshkov wrote:
> On Wed, 19 Feb 2025 at 16:51, Mark Brown <broonie@kernel.org> wrote:
> > On Thu, Jan 09, 2025 at 06:35:46AM +0200, Dmitry Baryshkov wrote:
> > > Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise
> > > Otherwise drivers might face incomplete read while accessing the last
> > > part of the NVMEM cell.
> > I'm seeing a bunch of failures on i.MX platforms in -next which bisect
> > to this patch. For example on the i.MX6q based UDOOq various things
> > including the ethernet fail to come up due to the efuse not appearing:
> > [ 1.735264] nvmem imx-ocotp0: cell mac-addr raw len 6 unaligned to nvmem word size 4
> > [ 1.735289] imx_ocotp 21bc000.efuse: probe with driver imx_ocotp failed with error -22
> This looks like an error on the i.MX platforms. The raw_len must be
> aligned to word size. I think the easiest fix is to implement the
> .fixup_dt_cell_info() callback like I did for the qfprom driver.
That sounds pluasible, but as things stand we've got a regression on
these platforms - taking out ethernet breaks NFS boot apart from
anything else. I'd also be a bit concerned that there might be other
users with issues, does this need an audit of users before trying to
enforce this requirement?
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-02-20 14:18 ` Mark Brown
@ 2025-02-20 15:50 ` Dmitry Baryshkov
2025-02-20 19:12 ` Mark Brown
0 siblings, 1 reply; 14+ messages in thread
From: Dmitry Baryshkov @ 2025-02-20 15:50 UTC (permalink / raw)
To: Mark Brown
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Akhil P Oommen, linux-arm-msm, devicetree,
linux-kernel
On Thu, Feb 20, 2025 at 02:18:06PM +0000, Mark Brown wrote:
> On Wed, Feb 19, 2025 at 05:14:43PM +0200, Dmitry Baryshkov wrote:
> > On Wed, 19 Feb 2025 at 16:51, Mark Brown <broonie@kernel.org> wrote:
> > > On Thu, Jan 09, 2025 at 06:35:46AM +0200, Dmitry Baryshkov wrote:
>
> > > > Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise
> > > > Otherwise drivers might face incomplete read while accessing the last
> > > > part of the NVMEM cell.
>
> > > I'm seeing a bunch of failures on i.MX platforms in -next which bisect
> > > to this patch. For example on the i.MX6q based UDOOq various things
> > > including the ethernet fail to come up due to the efuse not appearing:
>
> > > [ 1.735264] nvmem imx-ocotp0: cell mac-addr raw len 6 unaligned to nvmem word size 4
> > > [ 1.735289] imx_ocotp 21bc000.efuse: probe with driver imx_ocotp failed with error -22
>
> > This looks like an error on the i.MX platforms. The raw_len must be
> > aligned to word size. I think the easiest fix is to implement the
> > .fixup_dt_cell_info() callback like I did for the qfprom driver.
>
> That sounds pluasible, but as things stand we've got a regression on
> these platforms - taking out ethernet breaks NFS boot apart from
> anything else. I'd also be a bit concerned that there might be other
> users with issues, does this need an audit of users before trying to
> enforce this requirement?
A quick grep shows that there are enough drivers using word size greater
than 1. Would you mind checking if the following patch fixes an issue
for you? (Note, compile-tested only.)
From 2bde6ec5c9e74771f29170cfa11623208266880b Mon Sep 17 00:00:00 2001
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Thu, 20 Feb 2025 17:43:54 +0200
Subject: [PATCH] nvmem: make the misaligned raw_len non-fatal
The commit 11ccaa312111 ("nvmem: core: verify cell's raw_len") enforced
the raw read len being aligned to the NVMEM's word_size. However this
change broke some of the platforms, because those used misaligned
reads. Make this error non-fatal for the drivers that didn't specify
raw_len directly and just increase the raw_len making it aligned.
Fixes: 11ccaa312111 ("nvmem: core: verify cell's raw_len")
Reported-by: Mark Brown <broonie@kernel.org>
Closes: https://lore.kernel.org/linux-arm-msm/Z7Xv9lNc6ckJVtKc@finisterre.sirena.org.uk/
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/nvmem/core.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index b6f8544fd966..e206efc29a00 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -612,7 +612,11 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem,
"cell %s raw len %zd unaligned to nvmem word size %d\n",
cell->name ?: "<unknown>", cell->raw_len,
nvmem->word_size);
- return -EINVAL;
+
+ if (info->raw_len)
+ return -EINVAL;
+
+ cell->raw_len = ALIGN(cell->raw_len, nvmem->word_size);
}
return 0;
--
2.39.5
--
With best wishes
Dmitry
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v4 2/5] nvmem: core: verify cell's raw_len
2025-02-20 15:50 ` Dmitry Baryshkov
@ 2025-02-20 19:12 ` Mark Brown
0 siblings, 0 replies; 14+ messages in thread
From: Mark Brown @ 2025-02-20 19:12 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Akhil P Oommen, linux-arm-msm, devicetree,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 424 bytes --]
On Thu, Feb 20, 2025 at 05:50:39PM +0200, Dmitry Baryshkov wrote:
> A quick grep shows that there are enough drivers using word size greater
> than 1. Would you mind checking if the following patch fixes an issue
> for you? (Note, compile-tested only.)
That fixes at least some of the platforms (my lab's quite busy right
now) and looks like it should fix all of them:
Tested-by: Mark Brown <broonie@kernel.org>
Thanks!
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-02-20 19:12 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
2025-02-04 23:40 ` Dmitry Baryshkov
2025-02-17 10:15 ` Srinivas Kandagatla
2025-01-09 4:35 ` [PATCH v4 2/5] nvmem: core: verify cell's raw_len Dmitry Baryshkov
2025-02-19 14:51 ` Mark Brown
2025-02-19 15:14 ` Dmitry Baryshkov
2025-02-20 14:18 ` Mark Brown
2025-02-20 15:50 ` Dmitry Baryshkov
2025-02-20 19:12 ` Mark Brown
2025-01-09 4:35 ` [PATCH v4 3/5] nvmem: core: update raw_len if the bit reading is required Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 4/5] nvmem: qfprom: switch to 4-byte aligned reads Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible Dmitry Baryshkov
2025-02-04 16:55 ` Rob Herring
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