* [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node
@ 2025-02-05 10:11 niravkumar.l.rabara
2025-02-05 21:38 ` Krzysztof Kozlowski
2025-02-25 12:39 ` Dinh Nguyen
0 siblings, 2 replies; 3+ messages in thread
From: niravkumar.l.rabara @ 2025-02-05 10:11 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
niravkumar.l.rabara, nirav.rabara, devicetree, linux-kernel
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
changes in v2:
* Removed unexpected properties to fix dts build warnings.
Link to v1:https://lore.kernel.org/all/20250108112834.2880709-1-niravkumar.l.rabara@intel.com/
.../boot/dts/intel/socfpga_agilex5_socdk.dts | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index c533e5a3a610..5eda77242c5d 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -25,6 +25,37 @@ &osc1 {
clock-frequency = <25000000>;
};
+&qspi {
+ status = "okay";
+ flash@0 {
+ compatible = "micron,mt25qu02g", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+ cdns,read-delay = <2>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qspi_boot: partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x04200000>;
+ };
+
+ root: partition@4200000 {
+ label = "root";
+ reg = <0x04200000 0x0be00000>;
+ };
+ };
+ };
+};
+
&uart0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node
2025-02-05 10:11 [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node niravkumar.l.rabara
@ 2025-02-05 21:38 ` Krzysztof Kozlowski
2025-02-25 12:39 ` Dinh Nguyen
1 sibling, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-05 21:38 UTC (permalink / raw)
To: niravkumar.l.rabara, Dinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, nirav.rabara, devicetree,
linux-kernel
On 05/02/2025 11:11, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node
2025-02-05 10:11 [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node niravkumar.l.rabara
2025-02-05 21:38 ` Krzysztof Kozlowski
@ 2025-02-25 12:39 ` Dinh Nguyen
1 sibling, 0 replies; 3+ messages in thread
From: Dinh Nguyen @ 2025-02-25 12:39 UTC (permalink / raw)
To: niravkumar.l.rabara, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, nirav.rabara, devicetree, linux-kernel
On 2/5/25 04:11, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
>
> changes in v2:
> * Removed unexpected properties to fix dts build warnings.
>
> Link to v1:https://lore.kernel.org/all/20250108112834.2880709-1-niravkumar.l.rabara@intel.com/
>
> .../boot/dts/intel/socfpga_agilex5_socdk.dts | 31 +++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
>
Applied!
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-02-05 10:11 [PATCH v2] arm64: dts: socfpga: agilex5: add qspi flash node niravkumar.l.rabara
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2025-02-25 12:39 ` Dinh Nguyen
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