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Fri, 07 Feb 2025 02:31:21 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dc2f6aeafsm3170442f8f.20.2025.02.07.02.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 02:31:20 -0800 (PST) From: Neil Armstrong Subject: [PATCH 0/2] arm64: dts: qcom: sm8650: switch to 4 interrupt cells to add PPI partitions for PMUs Date: Fri, 07 Feb 2025 11:31:14 +0100 Message-Id: <20250207-topic-sm8650-pmu-ppi-partition-v1-0-dd3ba17b3eea@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAPLgpWcC/x2NQQ5AMBAAvyJ7tkk1oeUr4lC62AM2bYlE/F3jO IeZeSBSYIrQFQ8EujjysWeoygKm1e0LIfvMoJWulVYG0yE8YdxsUyuU7UQRRnEhccoqVtT62Y7 WGO8gRyTQzPc/6If3/QDFv/yscAAAAA== X-Change-ID: 20250207-topic-sm8650-pmu-ppi-partition-1e9df8b877da To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Swich to 4 interrupt cells on the GIC node to allow us passing the proper PPI interrupt partitions for the ARM PMUs. Signed-off-by: Neil Armstrong --- Neil Armstrong (2): arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs arch/arm64/boot/dts/qcom/sm8650.dtsi | 556 ++++++++++++++++++----------------- 1 file changed, 285 insertions(+), 271 deletions(-) --- base-commit: 808eb958781e4ebb6e9c0962af2e856767e20f45 change-id: 20250207-topic-sm8650-pmu-ppi-partition-1e9df8b877da Best regards, -- Neil Armstrong