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Fri, 07 Feb 2025 02:31:22 -0800 (PST) From: Neil Armstrong Date: Fri, 07 Feb 2025 11:31:16 +0100 Subject: [PATCH 2/2] arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250207-topic-sm8650-pmu-ppi-partition-v1-2-dd3ba17b3eea@linaro.org> References: <20250207-topic-sm8650-pmu-ppi-partition-v1-0-dd3ba17b3eea@linaro.org> In-Reply-To: <20250207-topic-sm8650-pmu-ppi-partition-v1-0-dd3ba17b3eea@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1771; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=K5sfaUH/v+Xme55AC7a2g1rmK4tSrrtqeCU0W09g/y0=; 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Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index eea73474bc857260fce26ca417d286a737ac8ddb..47df1ca020331421a14fca3fc0002a46f2083291 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -428,17 +428,17 @@ memory@a0000000 { pmu-a520 { compatible = "arm,cortex-a520-pmu"; - interrupts = ; + interrupts = ; }; pmu-a720 { compatible = "arm,cortex-a720-pmu"; - interrupts = ; + interrupts = ; }; pmu-x4 { compatible = "arm,cortex-x4-pmu"; - interrupts = ; + interrupts = ; }; psci { @@ -5309,6 +5309,20 @@ intc: interrupt-controller@17100000 { #size-cells = <2>; ranges; + ppi-partitions { + ppi_cluster0: interrupt-partition-0 { + affinity = <&cpu0 &cpu1>; + }; + + ppi_cluster1: interrupt-partition-1 { + affinity = <&cpu2 &cpu3 &cpu4 &cpu5 &cpu6>; + }; + + ppi_cluster2: interrupt-partition-2 { + affinity = <&cpu7>; + }; + }; + gic_its: msi-controller@17140000 { compatible = "arm,gic-v3-its"; reg = <0 0x17140000 0 0x20000>; -- 2.34.1