[PATCH v11 0/3] riscv: rtc: sophgo: add rtc support for CV1800

[PATCH v11 0/3] riscv: rtc: sophgo: add rtc support for CV1800

[Alexander Sverdlin]

Real Time Clock (RTC) is an independently powered module
within the chip, which includes a 32KHz oscillator and
a Power On Reset/POR submodule. It can be used for time
display and timed alarm generation.

Changes since v10:
- only start RTC on set_time;
- add machine restart handler (as separate patch 3/3);

Changes since v9:
- picked up orphaned series;
- further simplified bitmask macros;
- unconditional RTC start (rtc_enable_sec_counter());
- dropped ANA_CALIB modification;
- successfully tested on SG2000;

v9: https://lore.kernel.org/linux-riscv/20240428060848.706573-1-qiujingbao.dlmu@gmail.com/

Changes since v8:
- delete unused macros
- using 0/1 instead of the DISABLE/ENABLE macro
- pass in the correct pointer when applying for IRQ
- convert the incoming pointer into an appropriate
  structure pointer in the irq handler

v8: https://lore.kernel.org/all/20240204044143.415915-1-qiujingbao.dlmu@gmail.com/

Changes since v7:
- pass checkpatch.pl --strict
- using u32 replace uint32
- using devm_kzalloc(*) replace
  devm_kzalloc(sizeof())
- sort header files alphabetically
- delete unnecessary header files
- fix wrap error
- drop dependent description
- using hardware automatic calibration replace
  software calibration. see documentation 197 page

v7: https://lore.kernel.org/all/20240122080500.2621-1-qiujingbao.dlmu@gmail.com/
documentation: https://github.com/milkv-duo/duo-files/blob/main/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf

Changes since v6:
- completely delete POR dt node
- remove syscon tag
- use devm_regmap_init_mmio() replace
  syscon_node_to_regmap

v6: https://lore.kernel.org/all/20240115160600.5444-1-qiujingbao.dlmu@gmail.com/

Changes since v5:
- remove unnecessary lock
- fix cv1800_rtc_alarm_irq_enable()
- remove duplicate checks
- using alrm->enabled instead of unconditionally
  enabling
- remove disable alarms on probe
- using rtc_update_irq() replace mess of alarm
- remove leak clk
- useing devm_rtc_allocate_device() and
  devm_rtc_register_device() instead old way
- add judgment for rtc_enable_sec_counter()
- add POR nodes in DTS. This POR device shares
  the register region with the RTC device

v5: https://lore.kernel.org/all/20240108072253.30183-1-qiujingbao.dlmu@gmail.com/

Changes since v4:
- remove POR dt-bindings because it empty
- remove MFD dt-bindings because SoC does
  not have MFDs
- add syscon attribute to share registers
  with POR

v4: https://lore.kernel.org/all/20231229090643.116575-1-qiujingbao.dlmu@gmail.com/

Changes since v3:
- temporarily not submitting RTC driver code
  waiting for communication with IC designer
- add MFD dt-bindings
- add POR dt-bindings

v3: https://lore.kernel.org/all/20231226100431.331616-1-qiujingbao.dlmu@gmail.com/

Changes since v2:
- add mfd support for CV1800
- add rtc to mfd
- using regmap replace iomap
- merge register address in dts

v2: https://lore.kernel.org/lkml/20231217110952.78784-1-qiujingbao.dlmu@gmail.com/

Changes since v1
- fix duplicate names in subject
- using RTC replace RTC controller
- improve the properties of dt-bindings
- using `unevaluatedProperties` replace `additionalProperties`
- dt-bindings passed the test
- using `devm_platform_ioremap_resource()` replace
  `platform_get_resource()` and `devm_ioremap_resource()`
- fix random order of the code
- fix wrong wrapping of the `devm_request_irq()` and map the flag with dts
- using devm_clk_get_enabled replace `devm_clk_get()` and
  `clk_prepare_enable()`
- fix return style
- add rtc clock calibration function
- use spinlock when write register on read/set time

v1: https://lore.kernel.org/lkml/20231121094642.2973795-1-qiujingbao.dlmu@gmail.com/

Alexander Sverdlin (1):
  rtc: sophgo: cv18xx: Add restart handler

Jingbao Qiu (2):
  dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC
  rtc: sophgo: add rtc support for Sophgo CV1800 SoC

 .../bindings/rtc/sophgo,cv1800-rtc.yaml       |  53 ++++
 drivers/rtc/Kconfig                           |  10 +
 drivers/rtc/Makefile                          |   1 +
 drivers/rtc/rtc-cv1800.c                      | 277 ++++++++++++++++++
 4 files changed, 341 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
 create mode 100644 drivers/rtc/rtc-cv1800.c

-- 
2.48.1

[PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Alexander Sverdlin]

From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>

Add RTC devicetree binding for Sophgo CV1800 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
---
 .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml

diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
new file mode 100644
index 000000000000..b36b51a69166
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Real Time Clock of the Sophgo CV1800 SoC
+
+description:
+  Real Time Clock (RTC) is an independently powered module
+  within the chip, which includes a 32KHz oscillator and a
+  Power On Reset/POR submodule. It can be used for time display
+  and timed alarm generation. In addition, the hardware state
+  machine provides triggering and timing control for chip
+  power on, off, and reset.
+
+maintainers:
+  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
+
+allOf:
+  - $ref: rtc.yaml#
+
+properties:
+  compatible:
+    const: sophgo,cv1800-rtc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    rtc@5025000 {
+        compatible = "sophgo,cv1800-rtc";
+        reg = <0x5025000 0x2000>;
+        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&osc>;
+    };
-- 
2.48.1

[PATCH v11 2/3] rtc: sophgo: add rtc support for Sophgo CV1800 SoC

[Alexander Sverdlin]

From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>

Implement the RTC driver for CV1800, which able to provide time alarm.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
---
Changes since v10:
- only start RTC on set_time;
Changes since v9:
- further simplified bitmask macros;
- unconditional RTC start (rtc_enable_sec_counter()), otherwise
didn't start on SG2000;
- dropped ANA_CALIB modification (has been forgotten in v8 with
the drop of SW calibration to switch to HW calibration);
- successfully tested on SG2000;

 drivers/rtc/Kconfig      |  10 ++
 drivers/rtc/Makefile     |   1 +
 drivers/rtc/rtc-cv1800.c | 228 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 239 insertions(+)
 create mode 100644 drivers/rtc/rtc-cv1800.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 0bbbf778ecfa..019622db3e93 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1159,6 +1159,16 @@ config RTC_DRV_DS2404
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-ds2404.
 
+config RTC_DRV_CV1800
+	tristate "Sophgo CV1800 RTC"
+	depends on ARCH_SOPHGO || COMPILE_TEST
+	help
+	  If you say yes here you get support the RTC driver
+	  for Sophgo CV1800 chip.
+
+	  This driver can also be built as a module. If so, the
+	  module will be called rtc-cv1800.
+
 config RTC_DRV_DA9052
 	tristate "Dialog DA9052/DA9053 RTC"
 	depends on PMIC_DA9052
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 489b4ab07068..621b30a33dda 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_RTC_DRV_CADENCE)	+= rtc-cadence.o
 obj-$(CONFIG_RTC_DRV_CMOS)	+= rtc-cmos.o
 obj-$(CONFIG_RTC_DRV_CPCAP)	+= rtc-cpcap.o
 obj-$(CONFIG_RTC_DRV_CROS_EC)	+= rtc-cros-ec.o
+obj-$(CONFIG_RTC_DRV_CV1800)	+= rtc-cv1800.o
 obj-$(CONFIG_RTC_DRV_DA9052)	+= rtc-da9052.o
 obj-$(CONFIG_RTC_DRV_DA9055)	+= rtc-da9055.o
 obj-$(CONFIG_RTC_DRV_DA9063)	+= rtc-da9063.o
diff --git a/drivers/rtc/rtc-cv1800.c b/drivers/rtc/rtc-cv1800.c
new file mode 100644
index 000000000000..5c30f7388983
--- /dev/null
+++ b/drivers/rtc/rtc-cv1800.c
@@ -0,0 +1,228 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * rtc-cv1800.c: RTC driver for Sophgo cv1800 RTC
+ *
+ * Author: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+
+#define SEC_PULSE_GEN          0x1004
+#define ALARM_TIME             0x1008
+#define ALARM_ENABLE           0x100C
+#define SET_SEC_CNTR_VAL       0x1010
+#define SET_SEC_CNTR_TRIG      0x1014
+#define SEC_CNTR_VAL           0x1018
+
+/*
+ * When in VDDBKUP domain, this MACRO register
+ * does not power down
+ */
+#define MACRO_RO_T             0x14A8
+#define MACRO_RG_SET_T         0x1498
+
+#define ALARM_ENABLE_MASK      BIT(0)
+#define SEL_SEC_PULSE          BIT(31)
+
+struct cv1800_rtc_priv {
+	struct rtc_device *rtc_dev;
+	struct regmap *rtc_map;
+	struct clk *clk;
+	int irq;
+};
+
+static const struct regmap_config cv1800_rtc_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+static bool cv1800_rtc_enabled(struct device *dev)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+	u32 reg;
+
+	regmap_read(info->rtc_map, SEC_PULSE_GEN, &reg);
+
+	return (reg & SEL_SEC_PULSE) == 0;
+}
+
+static void cv1800_rtc_enable(struct device *dev)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+
+	/* Sec pulse generated internally */
+	regmap_update_bits(info->rtc_map, SEC_PULSE_GEN, SEL_SEC_PULSE, 0);
+}
+
+static int cv1800_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+
+	regmap_write(info->rtc_map, ALARM_ENABLE, enabled);
+
+	return 0;
+}
+
+static int cv1800_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+	unsigned long alarm_time;
+
+	alarm_time = rtc_tm_to_time64(&alrm->time);
+
+	cv1800_rtc_alarm_irq_enable(dev, 0);
+
+	regmap_write(info->rtc_map, ALARM_TIME, alarm_time);
+
+	cv1800_rtc_alarm_irq_enable(dev, alrm->enabled);
+
+	return 0;
+}
+
+static int cv1800_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+	u32 enabled;
+	u32 time;
+
+	if (!cv1800_rtc_enabled(dev)) {
+		alarm->enabled = 0;
+		return 0;
+	}
+
+	regmap_read(info->rtc_map, ALARM_ENABLE, &enabled);
+
+	alarm->enabled = enabled & ALARM_ENABLE_MASK;
+
+	regmap_read(info->rtc_map, ALARM_TIME, &time);
+
+	rtc_time64_to_tm(time, &alarm->time);
+
+	return 0;
+}
+
+static int cv1800_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+	u32 sec;
+
+	if (!cv1800_rtc_enabled(dev))
+		return -EINVAL;
+
+	regmap_read(info->rtc_map, SEC_CNTR_VAL, &sec);
+
+	rtc_time64_to_tm(sec, tm);
+
+	return 0;
+}
+
+static int cv1800_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct cv1800_rtc_priv *info = dev_get_drvdata(dev);
+	unsigned long sec;
+
+	sec = rtc_tm_to_time64(tm);
+
+	regmap_write(info->rtc_map, SET_SEC_CNTR_VAL, sec);
+	regmap_write(info->rtc_map, SET_SEC_CNTR_TRIG, 1);
+
+	regmap_write(info->rtc_map, MACRO_RG_SET_T, sec);
+
+	cv1800_rtc_enable(dev);
+
+	return 0;
+}
+
+static irqreturn_t cv1800_rtc_irq_handler(int irq, void *dev_id)
+{
+	struct cv1800_rtc_priv *info = dev_id;
+
+	rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
+
+	regmap_write(info->rtc_map, ALARM_ENABLE, 0);
+
+	return IRQ_HANDLED;
+}
+
+static const struct rtc_class_ops cv1800_rtc_ops = {
+	.read_time = cv1800_rtc_read_time,
+	.set_time = cv1800_rtc_set_time,
+	.read_alarm = cv1800_rtc_read_alarm,
+	.set_alarm = cv1800_rtc_set_alarm,
+	.alarm_irq_enable = cv1800_rtc_alarm_irq_enable,
+};
+
+static int cv1800_rtc_probe(struct platform_device *pdev)
+{
+	struct cv1800_rtc_priv *rtc;
+	void __iomem *base;
+	int ret;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	rtc->rtc_map = devm_regmap_init_mmio(&pdev->dev, base,
+					     &cv1800_rtc_regmap_config);
+	if (IS_ERR(rtc->rtc_map))
+		return PTR_ERR(rtc->rtc_map);
+
+	rtc->irq = platform_get_irq(pdev, 0);
+	if (rtc->irq < 0)
+		return rtc->irq;
+
+	rtc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
+	if (IS_ERR(rtc->clk))
+		return dev_err_probe(&pdev->dev, PTR_ERR(rtc->clk),
+				     "clk not found\n");
+
+	platform_set_drvdata(pdev, rtc);
+
+	device_init_wakeup(&pdev->dev, 1);
+
+	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
+	if (IS_ERR(rtc->rtc_dev))
+		return PTR_ERR(rtc->rtc_dev);
+
+	rtc->rtc_dev->ops = &cv1800_rtc_ops;
+	rtc->rtc_dev->range_max = U32_MAX;
+
+	ret = devm_request_irq(&pdev->dev, rtc->irq, cv1800_rtc_irq_handler,
+			       IRQF_TRIGGER_HIGH, "rtc alarm", rtc);
+	if (ret)
+		return dev_err_probe(&pdev->dev, ret,
+				     "cannot register interrupt handler\n");
+
+	return devm_rtc_register_device(rtc->rtc_dev);
+}
+
+static const struct of_device_id cv1800_dt_ids[] = {
+	{ .compatible = "sophgo,cv1800-rtc" },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, cv1800_dt_ids);
+
+static struct platform_driver cv1800_rtc_driver = {
+	.driver = {
+		.name = "sophgo-cv1800-rtc",
+		.of_match_table = cv1800_dt_ids,
+	},
+	.probe = cv1800_rtc_probe,
+};
+
+module_platform_driver(cv1800_rtc_driver);
+MODULE_AUTHOR("Jingbao Qiu");
+MODULE_DESCRIPTION("Sophgo cv1800 RTC Driver");
+MODULE_LICENSE("GPL");
-- 
2.48.1

[PATCH v11 3/3] rtc: sophgo: cv18xx: Add restart handler

[Alexander Sverdlin]

Currently provided ATF firmware for ARM64 Sophgo SoCs is binary-only.
To make Linux independent from this binary firmware, provide restart
handler triggering COLD or WARM reboot directly via RTC HW block as
alternative to PSCI interface.

Handler priority SYS_OFF_PRIO_DEFAULT of 0 is desired, because if PSCI
is indeed present, its priority of 129 will override the new one. On RiskV
side the behaviour is unchanged as well because SBI SRST handler has higher
priority as well (192).

Tested on SG2000 in ARM64 mode.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
---
v11:
- patch introduced;

 drivers/rtc/rtc-cv1800.c | 51 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 50 insertions(+), 1 deletion(-)

diff --git a/drivers/rtc/rtc-cv1800.c b/drivers/rtc/rtc-cv1800.c
index 5c30f7388983..586d7195f1f4 100644
--- a/drivers/rtc/rtc-cv1800.c
+++ b/drivers/rtc/rtc-cv1800.c
@@ -9,17 +9,23 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/notifier.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/regmap.h>
 #include <linux/rtc.h>
 
+#define CTRL_UNLOCKKEY         0x0004
+#define CTRL0                  0x0008
 #define SEC_PULSE_GEN          0x1004
 #define ALARM_TIME             0x1008
 #define ALARM_ENABLE           0x100C
 #define SET_SEC_CNTR_VAL       0x1010
 #define SET_SEC_CNTR_TRIG      0x1014
 #define SEC_CNTR_VAL           0x1018
+#define EN_PWR_CYC_REQ         0x10C8
+#define EN_WARM_RST_REQ        0x10CC
 
 /*
  * When in VDDBKUP domain, this MACRO register
@@ -28,6 +34,10 @@
 #define MACRO_RO_T             0x14A8
 #define MACRO_RG_SET_T         0x1498
 
+/* CTRL0 bits */
+#define REQ_PWR_CYC            BIT(3)
+#define REQ_WARM_RST           BIT(4)
+
 #define ALARM_ENABLE_MASK      BIT(0)
 #define SEL_SEC_PULSE          BIT(31)
 
@@ -160,6 +170,29 @@ static const struct rtc_class_ops cv1800_rtc_ops = {
 	.alarm_irq_enable = cv1800_rtc_alarm_irq_enable,
 };
 
+static int cv1800_restart_handler(struct sys_off_data *data)
+{
+	struct cv1800_rtc_priv *info = data->cb_data;
+	u32 reg_en = EN_WARM_RST_REQ;
+	u32 request = 0xFFFF0800;
+
+	if (data->mode == REBOOT_COLD) {
+		reg_en = EN_PWR_CYC_REQ;
+		request |= REQ_PWR_CYC;
+	} else {
+		request |= REQ_WARM_RST;
+	}
+
+	/* Enable reset request */
+	regmap_write(info->rtc_map, reg_en, 1);
+	/* Enable CTRL0 register access */
+	regmap_write(info->rtc_map, CTRL_UNLOCKKEY, 0xAB18);
+	/* Request reset */
+	regmap_write(info->rtc_map, CTRL0, request);
+
+	return NOTIFY_DONE;
+}
+
 static int cv1800_rtc_probe(struct platform_device *pdev)
 {
 	struct cv1800_rtc_priv *rtc;
@@ -205,7 +238,23 @@ static int cv1800_rtc_probe(struct platform_device *pdev)
 		return dev_err_probe(&pdev->dev, ret,
 				     "cannot register interrupt handler\n");
 
-	return devm_rtc_register_device(rtc->rtc_dev);
+	ret = devm_rtc_register_device(rtc->rtc_dev);
+	if (ret)
+		return dev_err_probe(&pdev->dev, ret, "cannot register RTC\n");
+
+	/*
+	 * SYS_OFF_PRIO_DEFAULT of 0 is desired here because both RiscV SBI SRST
+	 * (prio 192) and ARM PSCI (prio 129) will override this one; this
+	 * handler shall serve as a fallback in cases where firmware is not
+	 * present.
+	 */
+	ret = devm_register_restart_handler(&pdev->dev, cv1800_restart_handler,
+					    rtc);
+	if (ret)
+		return dev_err_probe(&pdev->dev, ret,
+				     "cannot register restart handler\n");
+
+	return 0;
 }
 
 static const struct of_device_id cv1800_dt_ids[] = {
-- 
2.48.1

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Inochi Amaoto]

On Thu, Feb 13, 2025 at 10:56:45PM +0100, Alexander Sverdlin wrote:
> From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> 
> Add RTC devicetree binding for Sophgo CV1800 SoC.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> ---
>  .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
>  1 file changed, 53 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> new file mode 100644
> index 000000000000..b36b51a69166
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Real Time Clock of the Sophgo CV1800 SoC
> +
> +description:
> +  Real Time Clock (RTC) is an independently powered module
> +  within the chip, which includes a 32KHz oscillator and a
> +  Power On Reset/POR submodule. It can be used for time display
> +  and timed alarm generation. In addition, the hardware state
> +  machine provides triggering and timing control for chip
> +  power on, off, and reset.
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> +
> +allOf:
> +  - $ref: rtc.yaml#
> +

> +properties:
> +  compatible:
> +    const: sophgo,cv1800-rtc

Now I prefer cv1800b to cv1800, using wildcard to provide base
compatible is not a good idea. This old design should be changed.

Otherwise, it looks good to me. With the compatible change:

Reviewed-by: Inochi Amaoto <inochiama@gmail.com>

Regards,
Inochi

Re: [PATCH v11 3/3] rtc: sophgo: cv18xx: Add restart handler

[Alexandre Belloni]

On 13/02/2025 22:56:47+0100, Alexander Sverdlin wrote:
> Currently provided ATF firmware for ARM64 Sophgo SoCs is binary-only.
> To make Linux independent from this binary firmware, provide restart
> handler triggering COLD or WARM reboot directly via RTC HW block as
> alternative to PSCI interface.
> 
> Handler priority SYS_OFF_PRIO_DEFAULT of 0 is desired, because if PSCI
> is indeed present, its priority of 129 will override the new one. On RiskV
> side the behaviour is unchanged as well because SBI SRST handler has higher
> priority as well (192).
> 
> Tested on SG2000 in ARM64 mode.
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> ---
> v11:
> - patch introduced;
> 
>  drivers/rtc/rtc-cv1800.c | 51 +++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 50 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/rtc-cv1800.c b/drivers/rtc/rtc-cv1800.c
> index 5c30f7388983..586d7195f1f4 100644
> --- a/drivers/rtc/rtc-cv1800.c
> +++ b/drivers/rtc/rtc-cv1800.c
> @@ -9,17 +9,23 @@
>  #include <linux/irq.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
> +#include <linux/notifier.h>
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
> +#include <linux/reboot.h>
>  #include <linux/regmap.h>
>  #include <linux/rtc.h>
>  
> +#define CTRL_UNLOCKKEY         0x0004
> +#define CTRL0                  0x0008
>  #define SEC_PULSE_GEN          0x1004
>  #define ALARM_TIME             0x1008
>  #define ALARM_ENABLE           0x100C
>  #define SET_SEC_CNTR_VAL       0x1010
>  #define SET_SEC_CNTR_TRIG      0x1014
>  #define SEC_CNTR_VAL           0x1018
> +#define EN_PWR_CYC_REQ         0x10C8
> +#define EN_WARM_RST_REQ        0x10CC
>  
>  /*
>   * When in VDDBKUP domain, this MACRO register
> @@ -28,6 +34,10 @@
>  #define MACRO_RO_T             0x14A8
>  #define MACRO_RG_SET_T         0x1498
>  
> +/* CTRL0 bits */
> +#define REQ_PWR_CYC            BIT(3)
> +#define REQ_WARM_RST           BIT(4)
> +
>  #define ALARM_ENABLE_MASK      BIT(0)
>  #define SEL_SEC_PULSE          BIT(31)
>  
> @@ -160,6 +170,29 @@ static const struct rtc_class_ops cv1800_rtc_ops = {
>  	.alarm_irq_enable = cv1800_rtc_alarm_irq_enable,
>  };
>  
> +static int cv1800_restart_handler(struct sys_off_data *data)
> +{
> +	struct cv1800_rtc_priv *info = data->cb_data;
> +	u32 reg_en = EN_WARM_RST_REQ;
> +	u32 request = 0xFFFF0800;
> +
> +	if (data->mode == REBOOT_COLD) {
> +		reg_en = EN_PWR_CYC_REQ;
> +		request |= REQ_PWR_CYC;
> +	} else {
> +		request |= REQ_WARM_RST;
> +	}
> +
> +	/* Enable reset request */
> +	regmap_write(info->rtc_map, reg_en, 1);
> +	/* Enable CTRL0 register access */
> +	regmap_write(info->rtc_map, CTRL_UNLOCKKEY, 0xAB18);
> +	/* Request reset */
> +	regmap_write(info->rtc_map, CTRL0, request);
> +
> +	return NOTIFY_DONE;
> +}
> +
>  static int cv1800_rtc_probe(struct platform_device *pdev)
>  {
>  	struct cv1800_rtc_priv *rtc;
> @@ -205,7 +238,23 @@ static int cv1800_rtc_probe(struct platform_device *pdev)
>  		return dev_err_probe(&pdev->dev, ret,
>  				     "cannot register interrupt handler\n");
>  
> -	return devm_rtc_register_device(rtc->rtc_dev);
> +	ret = devm_rtc_register_device(rtc->rtc_dev);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret, "cannot register RTC\n");

This message is useless, there is no failure path without a message in
devm_rtc_register_device.

> +
> +	/*
> +	 * SYS_OFF_PRIO_DEFAULT of 0 is desired here because both RiscV SBI SRST
> +	 * (prio 192) and ARM PSCI (prio 129) will override this one; this
> +	 * handler shall serve as a fallback in cases where firmware is not
> +	 * present.
> +	 */
> +	ret = devm_register_restart_handler(&pdev->dev, cv1800_restart_handler,
> +					    rtc);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret,
> +				     "cannot register restart handler\n");


Probe must never fail after devm_rtc_register_device.

> +
> +	return 0;
>  }
>  
>  static const struct of_device_id cv1800_dt_ids[] = {
> -- 
> 2.48.1
> 

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH v11 0/3] riscv: rtc: sophgo: add rtc support for CV1800

[Chen Wang]

Hello, Alexander,

First of all, thank you for re-picking up this orphan patchset.

We recently created a mailing list for sophgo (sophgo@lists.linux.dev), 
and we would appreciate it if you send a copy of any sophgo-related 
patches to the mailist in the future.

You can see https://github.com/sophgo/linux/wiki for more details about 
this mailist, and we are keeping track of the status of upstreaming 
sophgo products through this wiki. We have updated the status of some of 
the patches you are working on, please help double check.

Thanks,

Chen


On 2025/2/14 5:56, Alexander Sverdlin wrote:
> Real Time Clock (RTC) is an independently powered module
> within the chip, which includes a 32KHz oscillator and
> a Power On Reset/POR submodule. It can be used for time
> display and timed alarm generation.
>
> Changes since v10:
> - only start RTC on set_time;
> - add machine restart handler (as separate patch 3/3);
>
> Changes since v9:
> - picked up orphaned series;
> - further simplified bitmask macros;
> - unconditional RTC start (rtc_enable_sec_counter());
> - dropped ANA_CALIB modification;
> - successfully tested on SG2000;
>
> v9: https://lore.kernel.org/linux-riscv/20240428060848.706573-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v8:
> - delete unused macros
> - using 0/1 instead of the DISABLE/ENABLE macro
> - pass in the correct pointer when applying for IRQ
> - convert the incoming pointer into an appropriate
>    structure pointer in the irq handler
>
> v8: https://lore.kernel.org/all/20240204044143.415915-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v7:
> - pass checkpatch.pl --strict
> - using u32 replace uint32
> - using devm_kzalloc(*) replace
>    devm_kzalloc(sizeof())
> - sort header files alphabetically
> - delete unnecessary header files
> - fix wrap error
> - drop dependent description
> - using hardware automatic calibration replace
>    software calibration. see documentation 197 page
>
> v7: https://lore.kernel.org/all/20240122080500.2621-1-qiujingbao.dlmu@gmail.com/
> documentation: https://github.com/milkv-duo/duo-files/blob/main/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
>
> Changes since v6:
> - completely delete POR dt node
> - remove syscon tag
> - use devm_regmap_init_mmio() replace
>    syscon_node_to_regmap
>
> v6: https://lore.kernel.org/all/20240115160600.5444-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v5:
> - remove unnecessary lock
> - fix cv1800_rtc_alarm_irq_enable()
> - remove duplicate checks
> - using alrm->enabled instead of unconditionally
>    enabling
> - remove disable alarms on probe
> - using rtc_update_irq() replace mess of alarm
> - remove leak clk
> - useing devm_rtc_allocate_device() and
>    devm_rtc_register_device() instead old way
> - add judgment for rtc_enable_sec_counter()
> - add POR nodes in DTS. This POR device shares
>    the register region with the RTC device
>
> v5: https://lore.kernel.org/all/20240108072253.30183-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v4:
> - remove POR dt-bindings because it empty
> - remove MFD dt-bindings because SoC does
>    not have MFDs
> - add syscon attribute to share registers
>    with POR
>
> v4: https://lore.kernel.org/all/20231229090643.116575-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v3:
> - temporarily not submitting RTC driver code
>    waiting for communication with IC designer
> - add MFD dt-bindings
> - add POR dt-bindings
>
> v3: https://lore.kernel.org/all/20231226100431.331616-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v2:
> - add mfd support for CV1800
> - add rtc to mfd
> - using regmap replace iomap
> - merge register address in dts
>
> v2: https://lore.kernel.org/lkml/20231217110952.78784-1-qiujingbao.dlmu@gmail.com/
>
> Changes since v1
> - fix duplicate names in subject
> - using RTC replace RTC controller
> - improve the properties of dt-bindings
> - using `unevaluatedProperties` replace `additionalProperties`
> - dt-bindings passed the test
> - using `devm_platform_ioremap_resource()` replace
>    `platform_get_resource()` and `devm_ioremap_resource()`
> - fix random order of the code
> - fix wrong wrapping of the `devm_request_irq()` and map the flag with dts
> - using devm_clk_get_enabled replace `devm_clk_get()` and
>    `clk_prepare_enable()`
> - fix return style
> - add rtc clock calibration function
> - use spinlock when write register on read/set time
>
> v1: https://lore.kernel.org/lkml/20231121094642.2973795-1-qiujingbao.dlmu@gmail.com/
>
> Alexander Sverdlin (1):
>    rtc: sophgo: cv18xx: Add restart handler
>
> Jingbao Qiu (2):
>    dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC
>    rtc: sophgo: add rtc support for Sophgo CV1800 SoC
>
>   .../bindings/rtc/sophgo,cv1800-rtc.yaml       |  53 ++++
>   drivers/rtc/Kconfig                           |  10 +
>   drivers/rtc/Makefile                          |   1 +
>   drivers/rtc/rtc-cv1800.c                      | 277 ++++++++++++++++++
>   4 files changed, 341 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
>   create mode 100644 drivers/rtc/rtc-cv1800.c
>

Re: [PATCH v11 0/3] riscv: rtc: sophgo: add rtc support for CV1800

[Alexander Sverdlin]

Hi Chen!

On Fri, 2025-02-14 at 08:31 +0800, Chen Wang wrote:
> First of all, thank you for re-picking up this orphan patchset.
> 
> We recently created a mailing list for sophgo (sophgo@lists.linux.dev), 
> and we would appreciate it if you send a copy of any sophgo-related 
> patches to the mailist in the future.

Does it make sense to add the address to the MAINTAINERS file?
Or has a corresponding patch been already posted?

> You can see https://github.com/sophgo/linux/wiki for more details about 
> this mailist, and we are keeping track of the status of upstreaming 
> sophgo products through this wiki. We have updated the status of some of 
> the patches you are working on, please help double check.

Looks good to me, thanks!

-- 
Alexander Sverdlin.

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Inochi Amaoto]

On Thu, Feb 13, 2025 at 10:56:45PM +0100, Alexander Sverdlin wrote:
> From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> 
> Add RTC devicetree binding for Sophgo CV1800 SoC.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> ---
>  .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
>  1 file changed, 53 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> new file mode 100644
> index 000000000000..b36b51a69166
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Real Time Clock of the Sophgo CV1800 SoC
> +
> +description:
> +  Real Time Clock (RTC) is an independently powered module
> +  within the chip, which includes a 32KHz oscillator and a
> +  Power On Reset/POR submodule. It can be used for time display
> +  and timed alarm generation. In addition, the hardware state
> +  machine provides triggering and timing control for chip
> +  power on, off, and reset.
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> +
> +allOf:
> +  - $ref: rtc.yaml#
> +
> +properties:
> +  compatible:
> +    const: sophgo,cv1800-rtc
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +unevaluatedProperties: false
> +

> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    rtc@5025000 {
> +        compatible = "sophgo,cv1800-rtc";
> +        reg = <0x5025000 0x2000>;
> +        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&osc>;
> +    };
> -- 

Just for curiosity, Do you leave a way to implement the
8051 subsys, since its registers are in rtc. (You can
check the chapter "8051 subsystem" of the SG2002, which
can be found at https://github.com/sophgo/sophgo-doc).

Regards,
Inochi

Re: [PATCH v11 0/3] riscv: rtc: sophgo: add rtc support for CV1800

[Chen Wang]

On 2025/2/14 16:56, Alexander Sverdlin wrote:
> Hi Chen!
>
> On Fri, 2025-02-14 at 08:31 +0800, Chen Wang wrote:
>> First of all, thank you for re-picking up this orphan patchset.
>>
>> We recently created a mailing list for sophgo (sophgo@lists.linux.dev),
>> and we would appreciate it if you send a copy of any sophgo-related
>> patches to the mailist in the future.
> Does it make sense to add the address to the MAINTAINERS file?
> Or has a corresponding patch been already posted?

Yes, see 
https://lore.kernel.org/linux-kernel/20250212022831.244143-1-inochiama@gmail.com/


>> You can see https://github.com/sophgo/linux/wiki for more details about
>> this mailist, and we are keeping track of the status of upstreaming
>> sophgo products through this wiki. We have updated the status of some of
>> the patches you are working on, please help double check.
> Looks good to me, thanks!
>

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Alexander Sverdlin]

Hi Inochi,

On Fri, 2025-02-14 at 17:40 +0800, Inochi Amaoto wrote:
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +    rtc@5025000 {
> > +        compatible = "sophgo,cv1800-rtc";
> > +        reg = <0x5025000 0x2000>;
> > +        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> > +        clocks = <&osc>;
> > +    };
> > -- 
> 
> Just for curiosity, Do you leave a way to implement the
> 8051 subsys, since its registers are in rtc. (You can
> check the chapter "8051 subsystem" of the SG2002, which
> can be found at https://github.com/sophgo/sophgo-doc).

well, I suppose, you know the answer, according to how this has been modelled
within this series, all the functionality could only be added on top of RTC
driver. Do you think it's time to re-design it as compatible = "syscon", "simple-mfd"
with children nodes for RTC and reboot?

-- 
Alexander Sverdlin.

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Inochi Amaoto]

On Fri, Feb 14, 2025 at 12:09:37PM +0100, Alexander Sverdlin wrote:
> Hi Inochi,
> 
> On Fri, 2025-02-14 at 17:40 +0800, Inochi Amaoto wrote:
> > > +examples:
> > > +  - |
> > > +    #include <dt-bindings/interrupt-controller/irq.h>
> > > +
> > > +    rtc@5025000 {
> > > +        compatible = "sophgo,cv1800-rtc";
> > > +        reg = <0x5025000 0x2000>;
> > > +        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> > > +        clocks = <&osc>;
> > > +    };
> > > -- 
> > 
> > Just for curiosity, Do you leave a way to implement the
> > 8051 subsys, since its registers are in rtc. (You can
> > check the chapter "8051 subsystem" of the SG2002, which
> > can be found at https://github.com/sophgo/sophgo-doc).
> 
> well, I suppose, you know the answer, according to how this has been modelled
> within this series, all the functionality could only be added on top of RTC
> driver. 

I don't think it is a good idea to add everything in the RTC driver.
I prefer to separate them to sub devices if possible, so we can
make full use of all the framework provided.

> Do you think it's time to re-design it as compatible = "syscon", "simple-mfd"
> with children nodes for RTC and reboot?
> 

Yes, but you should submit the 8051 and reboot device early, and
change your binding with the right compatible. It is not allowd to
change compatible after the binding is determined.

Regards,
Inochi

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Chen Wang]

On 2025/2/14 5:56, Alexander Sverdlin wrote:
> From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
>
> Add RTC devicetree binding for Sophgo CV1800 SoC.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> ---
>   .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
>   1 file changed, 53 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
>
> diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> new file mode 100644
> index 000000000000..b36b51a69166
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Real Time Clock of the Sophgo CV1800 SoC
> +
> +description:
> +  Real Time Clock (RTC) is an independently powered module
> +  within the chip, which includes a 32KHz oscillator and a
> +  Power On Reset/POR submodule. It can be used for time display
> +  and timed alarm generation. In addition, the hardware state
> +  machine provides triggering and timing control for chip
> +  power on, off, and reset.
> +
> +maintainers:
> +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>

I guess Jingbao will not take this role. If he doesn't raise any 
objections, please just change this.

Jingbao, do you have any comment on this?

[......]

Re: [PATCH v11 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Alexander Sverdlin]

Hi Chen!

On Mon, 2025-02-17 at 17:26 +0800, Chen Wang wrote:
> > Add RTC devicetree binding for Sophgo CV1800 SoC.
> > 
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> > ---
> >    .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 53 +++++++++++++++++++
> >    1 file changed, 53 insertions(+)
> >    create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> > new file mode 100644
> > index 000000000000..b36b51a69166
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> > @@ -0,0 +1,53 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Real Time Clock of the Sophgo CV1800 SoC
> > +
> > +description:
> > +  Real Time Clock (RTC) is an independently powered module
> > +  within the chip, which includes a 32KHz oscillator and a
> > +  Power On Reset/POR submodule. It can be used for time display
> > +  and timed alarm generation. In addition, the hardware state
> > +  machine provides triggering and timing control for chip
> > +  power on, off, and reset.
> > +
> > +maintainers:
> > +  - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> 
> I guess Jingbao will not take this role. If he doesn't raise any 
> objections, please just change this.
> 
> Jingbao, do you have any comment on this?

New version will look rather like this:
https://lore.kernel.org/linux-devicetree/20250216180924.2506416-1-alexander.sverdlin@gmail.com/

But I'll be happy to take you suggestion and replace my name in the
new version with someone more afiliated with Sophgo ;-)

-- 
Alexander Sverdlin.