Re: [PATCH v3 0/3] spi: s3c64xx: add support exynos990-spi to new port config data

Denzeel Oliva
2025-02-14T05:31:53Z

On Fri, Feb 14, 2025 at 04:33:40AM +0000, Denzeel Oliva wrote:
> Changes in v3:
> - Reordered fifo_depth handling in s3c64xx_spi_probe() so that the DT
> property takes precedence over the default value in port_config.
> This allows node-specific FIFO depths to be applied correctly while
> preserving a fallback.

Showing evidence:
[ 0.339111] s3c64xx-spi 10920000.spi: spi bus clock parent not specified, using clock at index 0 as parent
[ 0.339119] s3c64xx-spi 10920000.spi: number of chip select lines not specified, assuming 1 chip select line
[ 0.339467] s3c64xx-spi 10920000.spi: registered host spi0
[ 0.339589] s3c64xx-spi 10920000.spi: Samsung SoC SPI Driver loaded for Bus SPI-0 with 1 Targets attached
[ 0.339597] s3c64xx-spi 10920000.spi: IOmem=[[mem 0x10920000-0x1092002f]] FIFO 256bytes
-------------------------------------------------------------------------------------------------------------
[ 0.587452] s3c64xx-spi 10650000.spi: spi bus clock parent not specified, using clock at index 0 as parent
[ 0.587462] s3c64xx-spi 10650000.spi: number of chip select lines not specified, assuming 1 chip select line
[ 0.587847] s3c64xx-spi 10650000.spi: registered host spi1
[ 0.587986] s3c64xx-spi 10650000.spi: Samsung SoC SPI Driver loaded for Bus SPI-1 with 1 Targets attached
[ 0.587997] s3c64xx-spi 10650000.spi: IOmem=[[mem 0x10650000-0x1065002f]] FIFO 64bytes