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Wed, 19 Feb 2025 23:19:50 -0800 (PST) Date: Thu, 20 Feb 2025 12:49:43 +0530 From: Manivannan Sadhasivam To: Dmitry Baryshkov Cc: Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Mrinmay Sarkar , Bjorn Andersson , Konrad Dybcio , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/6] dt-bindings: PCI: qcom-ep: describe optional IOMMU Message-ID: <20250220071943.edn6q65ijmeldnag@thinkpad> References: <20250217-sar2130p-pci-v1-0-94b20ec70a14@linaro.org> <20250217-sar2130p-pci-v1-1-94b20ec70a14@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250217-sar2130p-pci-v1-1-94b20ec70a14@linaro.org> On Mon, Feb 17, 2025 at 08:56:13PM +0200, Dmitry Baryshkov wrote: > Platforms which use eDMA for PCIe EP transfers (like SA8775P) also use > IOMMU in order to setup transfer windows. eDMA has nothing to do with IOMMU. In fact, it is not clear on what IOMMU does on the endpoint side since we do not assign SID based on the RID from RC. But the binding should describe it anyway since IOMMU does sit between DDR and PCIe IP. - Mani > Fix the schema in order to > allow specifying the IOMMU. > > Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC") > Signed-off-by: Dmitry Baryshkov > --- > Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > index 1226ee5d08d1ae909b07b0d78014618c4c74e9a8..800accdf5947e7178ad80f0759cf53111be1a814 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > @@ -75,6 +75,9 @@ properties: > - const: doorbell > - const: dma > > + iommus: > + maxItems: 1 > + > reset-gpios: > description: GPIO used as PERST# input signal > maxItems: 1 > @@ -233,6 +236,20 @@ allOf: > minItems: 3 > maxItems: 3 > > + - if: > + properties: > + compatible: > + contains: > + const: qcom,sdx55-pcie-ep > + then: > + properties: > + iommus: > + false > + > + else: > + required: > + - iommus > + > unevaluatedProperties: false > > examples: > > -- > 2.39.5 > -- மணிவண்ணன் சதாசிவம்