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[209.17.68.221]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-73242568146sm13851313b3a.47.2025.02.20.06.24.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 06:24:28 -0800 (PST) Date: Thu, 20 Feb 2025 23:24:26 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: manivannan.sadhasivam@linaro.org Cc: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski , Lukas Wunner Subject: Re: [PATCH v3 0/5] PCI/pwrctrl: Rework pwrctrl driver integration and add driver for PCI slot Message-ID: <20250220142426.GA1777078@rocinante> References: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> Hello, > This series reworks the PCI pwrctrl integration (again) by moving the creation > and removal of pwrctrl devices to pci_scan_device() and pci_destroy_dev() APIs. > This is based on the suggestion provided by Lukas Wunner [1][2]. With this > change, it is now possible to create pwrctrl devices for PCI bridges as well. > This is required to control the power state of the PCI slots in a system. Since > the PCI slots are not explicitly defined in devicetree, the agreement is to > define the supplies for PCI slots in PCI bridge nodes itself [3]. Applied to pwrctrl, thank you! Krzysztof