From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>
Cc: "Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 6/8] PCI: dwc: pcie-qcom-ep: enable EP support for SAR2130P
Date: Fri, 21 Feb 2025 17:52:04 +0200 [thread overview]
Message-ID: <20250221-sar2130p-pci-v3-6-61a0fdfb75b4@linaro.org> (raw)
In-Reply-To: <20250221-sar2130p-pci-v3-0-61a0fdfb75b4@linaro.org>
Enable PCIe endpoint support for the Qualcomm SAR2130P platform. It is
impossible to use fallback compatible to any other platform since
SAR2130P uses slightly different set of clocks.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
index c08f64d7a825fa5da22976c8020f96ee5faa5462..dec5675c7c9d52b77f084ae139845b488fa02d2c 100644
--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
@@ -933,6 +933,7 @@ static const struct of_device_id qcom_pcie_ep_match[] = {
{ .compatible = "qcom,sa8775p-pcie-ep", .data = &cfg_1_34_0},
{ .compatible = "qcom,sdx55-pcie-ep", },
{ .compatible = "qcom,sm8450-pcie-ep", },
+ { .compatible = "qcom,sar2130p-pcie-ep", },
{ }
};
MODULE_DEVICE_TABLE(of, qcom_pcie_ep_match);
--
2.39.5
next prev parent reply other threads:[~2025-02-21 15:52 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 15:51 [PATCH v3 0/8] PCI: qcom-ep: add support for using the EP on SAR2130P and SM8450 Dmitry Baryshkov
2025-02-21 15:51 ` [PATCH v3 1/8] dt-bindings: PCI: qcom-ep: describe optional dma-coherent property Dmitry Baryshkov
2025-02-22 10:31 ` Krzysztof Kozlowski
2025-02-22 16:45 ` Manivannan Sadhasivam
2025-02-21 15:52 ` [PATCH v3 2/8] dt-bindings: PCI: qcom-ep: describe optional IOMMU Dmitry Baryshkov
2025-02-22 10:32 ` Krzysztof Kozlowski
2025-02-22 16:45 ` Manivannan Sadhasivam
2025-02-21 15:52 ` [PATCH v3 3/8] dt-bindings: PCI: qcom-ep: enable DMA for SM8450 Dmitry Baryshkov
2025-02-22 10:32 ` Krzysztof Kozlowski
2025-02-21 15:52 ` [PATCH v3 4/8] dt-bindings: PCI: qcom-ep: consolidate DMA vs non-DMA usecases Dmitry Baryshkov
2025-02-22 10:40 ` Krzysztof Kozlowski
2025-02-22 16:47 ` Manivannan Sadhasivam
2025-02-21 15:52 ` [PATCH v3 5/8] dt-bindings: PCI: qcom-ep: add SAR2130P compatible Dmitry Baryshkov
2025-02-22 10:41 ` Krzysztof Kozlowski
2025-02-21 15:52 ` Dmitry Baryshkov [this message]
2025-02-22 16:50 ` [PATCH v3 6/8] PCI: dwc: pcie-qcom-ep: enable EP support for SAR2130P Manivannan Sadhasivam
2025-02-22 18:06 ` Dmitry Baryshkov
2025-02-23 8:48 ` Manivannan Sadhasivam
2025-02-21 15:52 ` [PATCH v3 7/8] arm64: dts: qcom: sar2130p: add PCIe EP device nodes Dmitry Baryshkov
2025-02-21 18:59 ` Konrad Dybcio
2025-02-22 16:51 ` Manivannan Sadhasivam
2025-02-21 15:52 ` [PATCH v3 8/8] arm64: dts: qcom: sm8450: " Dmitry Baryshkov
2025-02-22 16:53 ` Manivannan Sadhasivam
2025-02-22 14:36 ` [PATCH v3 0/8] PCI: qcom-ep: add support for using the EP on SAR2130P and SM8450 Krzysztof Wilczyński
2025-02-24 18:36 ` Krzysztof Wilczyński
2025-02-25 3:19 ` Dmitry Baryshkov
2025-03-14 20:00 ` (subset) " Bjorn Andersson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250221-sar2130p-pci-v3-6-61a0fdfb75b4@linaro.org \
--to=dmitry.baryshkov@linaro.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=kw@linux.com \
--cc=kwilczynski@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=quic_msarkar@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).