From: Chintan Vankar <c-vankar@ti.com>
To: Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>, Peter Rosin <peda@axentia.se>,
<tglx@linutronix.de>, <gregkh@linuxfoundation.org>,
<vigneshr@ti.com>, <nm@ti.com>, <s-vadapalli@ti.com>,
<danishanwar@ti.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<c-vankar@ti.com>
Subject: [RFC PATCH 1/2] devicetree: bindings: mux: reg-mux: Update bindings for reg-mux for new property
Date: Fri, 28 Feb 2025 01:52:05 +0530 [thread overview]
Message-ID: <20250227202206.2551305-2-c-vankar@ti.com> (raw)
In-Reply-To: <20250227202206.2551305-1-c-vankar@ti.com>
DT-binding of reg-mux is defined in such a way that one need to provide
register offset and mask in a "mux-reg-masks" property and corresponding
register value in "idle-states" property. This constraint forces to define
these values in such a way that "mux-reg-masks" and "idle-states" must be
in sync with each other. This implementation would be more complex if
specific register or set of registers need to be configured which has
large memory space. Introduce a new property "mux-reg-masks-state" which
allow to specify offset, mask and value as a tuple in a single property.
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
---
.../devicetree/bindings/mux/reg-mux.yaml | 29 +++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/mux/reg-mux.yaml b/Documentation/devicetree/bindings/mux/reg-mux.yaml
index dc4be092fc2f..a73c5efcf860 100644
--- a/Documentation/devicetree/bindings/mux/reg-mux.yaml
+++ b/Documentation/devicetree/bindings/mux/reg-mux.yaml
@@ -32,11 +32,36 @@ properties:
- description: pre-shifted bitfield mask
description: Each entry pair describes a single mux control.
- idle-states: true
+ idle-states:
+ description: Each entry describes mux register state.
+
+ mux-reg-masks-state:
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description: register offset
+ - description: pre-shifted bitfield mask
+ - description: register value to be set
+ description: This property is an extension of mux-reg-masks which
+ allows specifying register offset, mask and register
+ value to be set in a single property.
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - reg-mux
+ - mmio-mux
+ then:
+ properties:
+ mux-reg-masks: true
+ mux-reg-masks-state: true
+ maxItems: 1
required:
- compatible
- - mux-reg-masks
- '#mux-control-cells'
additionalProperties: false
--
2.34.1
next prev parent reply other threads:[~2025-02-27 20:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-27 20:22 [RFC PATCH 0/2] Extend mmio-mux driver to configure mux with Chintan Vankar
2025-02-27 20:22 ` Chintan Vankar [this message]
2025-02-27 21:26 ` [RFC PATCH 1/2] devicetree: bindings: mux: reg-mux: Update bindings for reg-mux for new property Andrew Davis
2025-02-28 18:52 ` Conor Dooley
2025-02-28 21:38 ` Vankar, Chintan
2025-03-03 16:58 ` Conor Dooley
2025-03-03 18:45 ` Vankar, Chintan
2025-02-27 20:22 ` [RFC PATCH 2/2] mux: mmio: Extend mmio-mux driver to configure mux with new DT property Chintan Vankar
2025-02-27 21:39 ` Andrew Davis
2025-03-04 5:16 ` Vankar, Chintan
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