From: jiebing chen via B4 Relay <devnull+jiebing.chen.amlogic.com@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com,
jiebing chen <jiebing.chen@amlogic.com>
Subject: [PATCH v3 2/6] dt-bindings: clock: axg-audio: Add mclk and sclk pad clock ids
Date: Fri, 28 Feb 2025 16:04:10 +0800 [thread overview]
Message-ID: <20250228-audio_drvier-v3-2-dbfd30507e4c@amlogic.com> (raw)
In-Reply-To: <20250228-audio_drvier-v3-0-dbfd30507e4c@amlogic.com>
From: jiebing chen <jiebing.chen@amlogic.com>
Add clock IDs for the mclk pads found on s4 SoCs
Signed-off-by: jiebing chen <jiebing.chen@amlogic.com>
---
include/dt-bindings/clock/axg-audio-clkc.h | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h
index 607f23b83fa7287fe0403682ebf827e2df26a1ce..75dde05343d1fa74304ee21c9ec0541a8f51b15e 100644
--- a/include/dt-bindings/clock/axg-audio-clkc.h
+++ b/include/dt-bindings/clock/axg-audio-clkc.h
@@ -162,5 +162,16 @@
#define AUD_CLKID_EARCRX_DMAC_SEL 182
#define AUD_CLKID_EARCRX_DMAC_DIV 183
#define AUD_CLKID_EARCRX_DMAC 184
+#define AUD_CLKID_TDM_MCLK_PAD0_SEL 185
+#define AUD_CLKID_TDM_MCLK_PAD1_SEL 186
+#define AUD_CLKID_TDM_MCLK_PAD0_DIV 187
+#define AUD_CLKID_TDM_MCLK_PAD1_DIV 188
+#define AUD_CLKID_TDM_MCLK_PAD2 189
+#define AUD_CLKID_TDM_MCLK_PAD2_SEL 190
+#define AUD_CLKID_TDM_MCLK_PAD2_DIV 191
+#define AUD_CLKID_TDM_SCLK_PAD3 192
+#define AUD_CLKID_TDM_SCLK_PAD4 193
+#define AUD_CLKID_TDM_LRCLK_PAD3 194
+#define AUD_CLKID_TDM_LRCLK_PAD4 195
#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */
--
2.43.0
next prev parent reply other threads:[~2025-02-28 8:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-28 8:04 [PATCH v3 0/6] Add support for S4 audio jiebing chen via B4 Relay
2025-02-28 8:04 ` [PATCH v3 1/6] dt-bindings: clock: meson: Add audio power domain for s4 soc jiebing chen via B4 Relay
2025-02-28 21:51 ` Rob Herring
2025-02-28 8:04 ` jiebing chen via B4 Relay [this message]
2025-02-28 21:53 ` [PATCH v3 2/6] dt-bindings: clock: axg-audio: Add mclk and sclk pad clock ids Rob Herring (Arm)
2025-02-28 8:04 ` [PATCH v3 3/6] dt-bindings: Asoc: axg-audio: Add s4 audio tocodec jiebing chen via B4 Relay
2025-02-28 21:54 ` Rob Herring (Arm)
2025-02-28 8:04 ` [PATCH v3 4/6] clk: meson: axg-audio: Add the mclk pad div for s4 jiebing chen via B4 Relay
2025-03-06 16:41 ` Jerome Brunet
2025-03-07 2:58 ` Jiebing Chen
2025-02-28 8:04 ` [PATCH v3 5/6] ASoC: meson: s4: Add s4 tocodec driver jiebing chen via B4 Relay
2025-03-06 15:58 ` Jerome Brunet
2025-03-07 2:48 ` Jiebing Chen
2025-02-28 8:04 ` [PATCH v3 6/6] arm64: dts: amlogic: Add Amlogic S4 Audio jiebing chen via B4 Relay
2025-02-28 14:23 ` [PATCH v3 0/6] Add support for S4 audio Rob Herring (Arm)
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