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Tue, 04 Mar 2025 05:33:17 -0800 (PST) Date: Tue, 4 Mar 2025 19:03:12 +0530 From: Manivannan Sadhasivam To: Sai Krishna Musham Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, cassel@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, michal.simek@amd.com, bharat.kumar.gogada@amd.com, thippeswamy.havalige@amd.com Subject: Re: [PATCH v3 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal Message-ID: <20250304133312.hmn54f77pmg27tuo@thinkpad> References: <20250227042454.907182-1-sai.krishna.musham@amd.com> <20250227042454.907182-3-sai.krishna.musham@amd.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250227042454.907182-3-sai.krishna.musham@amd.com> On Thu, Feb 27, 2025 at 09:54:54AM +0530, Sai Krishna Musham wrote: > Add GPIO-based control for the PCIe Root Port PERST# signal. > > According to section 2.2 of the PCIe Electromechanical Specification > (Revision 6.0), PERST# signal has to be deasserted after a delay of > 100 ms (T_PVPERL) to ensure proper reset sequencing during PCIe > initialization. > > Adapt to use the GPIO framework and make reset optional to keep DTB > backward compatibility. > > Signed-off-by: Sai Krishna Musham > --- > This patch depends on the following patch series. > https://lore.kernel.org/all/20250217072713.635643-3-thippeswamy.havalige@amd.com/ > > Changes for v3: > - Use PCIE_T_PVPERL_MS define. > > Changes for v2: > - Make the request GPIO optional. > - Correct the reset sequence as per PERST# > - Update commit message > --- > drivers/pci/controller/pcie-xilinx-cpm.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c > index 81e8bfae53d0..558f1d602802 100644 > --- a/drivers/pci/controller/pcie-xilinx-cpm.c > +++ b/drivers/pci/controller/pcie-xilinx-cpm.c > @@ -6,6 +6,8 @@ > */ > > #include > +#include > +#include > #include > #include > #include > @@ -568,8 +570,24 @@ static int xilinx_cpm_pcie_probe(struct platform_device *pdev) > struct device *dev = &pdev->dev; > struct pci_host_bridge *bridge; > struct resource_entry *bus; > + struct gpio_desc *reset_gpio; > int err; > > + /* Request the GPIO for PCIe reset signal */ > + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(reset_gpio)) { > + dev_err(dev, "Failed to request reset GPIO\n"); > + return PTR_ERR(reset_gpio); > + } > + > + /* Assert the reset signal */ > + gpiod_set_value(reset_gpio, 1); > + > + msleep(PCIE_T_PVPERL_MS); > + > + /* Deassert the reset signal */ > + gpiod_set_value(reset_gpio, 0); > + You should deassert the PERST# only after the power and refclk are stable. Even though this driver is not initializing any resources, it makes sense to move the assert + deassert logic at the very end of xilinx_cpm_pcie_init_port() as this function sounds like the once initializing the PCIe port. - Mani -- மணிவண்ணன் சதாசிவம்