From: Frank Li <Frank.Li@nxp.com>
To: "Tony Lindgren" <tony@atomide.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Siddharth Vadapalli" <s-vadapalli@ti.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>
Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Frank Li <Frank.Li@nxp.com>
Subject: [PATCH PATCH RFC NOT TESTED 2/2] PCI: dra7xx: Use use_parent_dt_ranges and clean up dra7xx_pcie_cpu_addr_fixup()
Date: Wed, 05 Mar 2025 11:20:23 -0500 [thread overview]
Message-ID: <20250305-dra-v1-2-8dc6d9a0e1c0@nxp.com> (raw)
In-Reply-To: <20250305-dra-v1-0-8dc6d9a0e1c0@nxp.com>
Remove dra7xx_pcie_cpu_addr_fixup() as the DT bus fabric should provide correct
address translation. Set use_parent_dt_ranges to allow the DWC core driver to
fetch address translation from the device tree
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/pci/controller/dwc/pci-dra7xx.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
index 33d6bf460ffe5..d6e0bf67a07b3 100644
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -72,7 +72,6 @@
#define PCIECTRL_DRA7XX_CONF_PHY_CS 0x010C
#define LINK_UP BIT(16)
-#define DRA7XX_CPU_TO_BUS_ADDR 0x0FFFFFFF
#define PCIECTRL_TI_CONF_INTX_ASSERT 0x0124
#define PCIECTRL_TI_CONF_INTX_DEASSERT 0x0128
@@ -113,11 +112,6 @@ static inline void dra7xx_pcie_writel(struct dra7xx_pcie *pcie, u32 offset,
writel(value, pcie->base + offset);
}
-static u64 dra7xx_pcie_cpu_addr_fixup(struct dw_pcie *pci, u64 cpu_addr)
-{
- return cpu_addr & DRA7XX_CPU_TO_BUS_ADDR;
-}
-
static int dra7xx_pcie_link_up(struct dw_pcie *pci)
{
struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
@@ -514,7 +508,6 @@ static int dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx,
}
static const struct dw_pcie_ops dw_pcie_ops = {
- .cpu_addr_fixup = dra7xx_pcie_cpu_addr_fixup,
.start_link = dra7xx_pcie_establish_link,
.stop_link = dra7xx_pcie_stop_link,
.link_up = dra7xx_pcie_link_up,
@@ -712,6 +705,7 @@ static int dra7xx_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
+ pci->use_parent_dt_ranges = true;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
--
2.34.1
next prev parent reply other threads:[~2025-03-05 16:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-05 16:20 [PATCH RFC NOT TESTED 0/2] PCI: dra7xx: Try to clean up dra7xx_pcie_cpu_addr_fixup() Frank Li
2025-03-05 16:20 ` [PATCH PATCH RFC NOT TESTED 1/2] ARM: dts: ti: dra7: Correct ranges for PCIe and parent bus nodes Frank Li
2025-03-13 16:53 ` Manivannan Sadhasivam
2025-03-14 6:46 ` Siddharth Vadapalli
2025-03-14 15:03 ` Frank Li
2025-03-24 7:27 ` Manivannan Sadhasivam
2025-03-24 7:23 ` Manivannan Sadhasivam
2025-03-05 16:20 ` Frank Li [this message]
2025-03-13 6:05 ` [PATCH RFC NOT TESTED 0/2] PCI: dra7xx: Try to clean up dra7xx_pcie_cpu_addr_fixup() Manivannan Sadhasivam
2025-03-17 17:30 ` Bjorn Helgaas
2025-03-17 18:44 ` Manivannan Sadhasivam
2025-03-17 19:45 ` Bjorn Helgaas
2025-03-24 7:25 ` Manivannan Sadhasivam
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