From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24D991C5D6A; Mon, 10 Mar 2025 09:32:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741599156; cv=none; b=UcGjvQPxNRTgMepNKXdqqIiEF3VMXdHMbrICnKqiKQCh72JfryLDm56q9oRfyE8ivs6D02QAzOOaAFMIBRnxYLctyegP6nMCJe+5UXKL4Myxk2Qw7ZNs7G4HFnIWYDG3K97i4hc3sb+zHgTHWCf+govzwJ3/EFjUG5oL51wX+4s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741599156; c=relaxed/simple; bh=1DXbIDSv40GCjpvf8zEG7cq6F5YuAvlfpqHWbXxLuxw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=n4lrCiiGl3cqPaAjtHoXULMT6kJDegj029abuB+5sk5A21/jRtG9CQrpJMhaWoC37AqQUWA4caokR2Pl406zDiPQ0W2jbLUPxZKDNMPJWUa+lRT1WZdlk4MkWzhh19vh9GBzAG5huaS4v+DX+GimtKansxTeHEeinSWdLEswwPE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aBNnQJ5h; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aBNnQJ5h" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E21EC4CEE5; Mon, 10 Mar 2025 09:32:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741599155; bh=1DXbIDSv40GCjpvf8zEG7cq6F5YuAvlfpqHWbXxLuxw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=aBNnQJ5hr4c4rVW9/H3OV21cK07YhkXgvsDTArI8P3pkwag/ZPPVFYVU66IL8yYgs 9IwjftriKoVv2KjQP/sSLj16mrNn9lwe052KosjvGx5+m8iI/ZrbKZuCFRXUBSPDRQ aEUdyewsp7E7xx/XvDl5/O84HoTgWRoMueNgCgcT806QYUxb2zv2VpeA+k7oOwPHcJ kbslKQUK4qroqSDNM0YUpo84ejD0iNemZfrS8aAZx1g6w7w2a2DH66XSGyNXjmM2jg L6K4l5shuM/wZiIEpnB7LF3eGC40YSXFw6j/p0YeGwKoOM6aXzVB9z+rvM/VEYAnOx fwxHHuIymse7w== Date: Mon, 10 Mar 2025 10:32:30 +0100 From: Krzysztof Kozlowski To: Krishna Chaitanya Chundru Cc: cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Jingoo Han , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, quic_vbadigan@quicinc.com, quic_mrana@quicinc.com, quic_vpernami@quicinc.com, mmareddy@quicinc.com Subject: Re: [PATCH v5 3/7] arch: arm64: qcom: sc7280: Remove optional elbi register Message-ID: <20250310-pristine-idealistic-husky-1e57b2@krzk-bin> References: <20250309-ecam_v4-v5-0-8eff4b59790d@oss.qualcomm.com> <20250309-ecam_v4-v5-3-8eff4b59790d@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20250309-ecam_v4-v5-3-8eff4b59790d@oss.qualcomm.com> On Sun, Mar 09, 2025 at 11:15:25AM +0530, Krishna Chaitanya Chundru wrote: > ELBI registers are optional registers which are not used by this > platform. So removing the elbi registers from PCIe node. > > Signed-off-by: Krishna Chaitanya Chundru > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +-- Please use standard email subjects, so with the PATCH keyword in the title. 'git format-patch -vX' helps here to create proper versioned patches. Another useful tool is b4. Skipping the PATCH keyword makes filtering of emails more difficult thus making the review process less convenient. That's a v5 and still wrong... Can you pass the patchset through internal review first? Best regards, Krzysztof