[PATCH 0/4] Add support for AD4052 device family

Jorge Marques
2025-03-06T14:04:53Z

The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit,
successive approximation register (SAR) analog-to-digital converter (ADC).

The series starts with marking iio_dev as const in iio_buffer_enabled,
to not discard the qualifier when calling from get_current_can_type.
This is required since the size of storage bytes varies if the offload
buffer is used or not.

The scan_type also depends if the oversampling feature is enabled, since
the 16-bit device increases the SPI word size from 16-bit to 24-bit.
Also due to this, the spi message optimization is balanced on the buffer ops,
instead of once per probe.
SPI messages related to exiting the ADC mode, and reading raw values are
never optimized.

The device has autonomous monitoring capabilities, that are exposed as IIO
events. Since register access requires leaving the monitoring
state and returning, device access is blocked until the IIO event is disabled.
An auxiliary method ad4052_iio_device_claim_direct manages the IIO claim
direct as well as the required wait_event boolean.
The device has an internal sampling rate for the autonomous modes,
exposed as the sample_rate attribute.

The device contains two required outputs:

* gp0: Threshold event interrupt on the rising edge.
* gp1: ADC conversion ready signal on the falling edge.
The user should either invert the signal or set the IRQ as falling edge.

And one optional input:

* cnv: Triggers a conversion, can be replaced by shortening the CNV and
SPI CS trace.

The devices utilizes PM to enter the low power mode.

The driver can be used with SPI controllers with and without offload support.

A FPGA design is available:
https://analogdevicesinc.github.io/hdl/projects/ad4052_ardz/

The devices datasheet:
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4050-ad4056.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4052-ad4058.pdf

The unique monitoring capabilities and multiple GPIOs where the decision factor
to have a standalone driver for this device family.

Non-implemented features:

* Status word: First byte of the SPI transfer aligned to the register
address.
* Averaging mode: Similar to burst averaging mode used in the
oversampling, but requiring a sequence of CNV triggers for each
conversion.
* Monitor mode: Similar to trigger mode used in the monitoring mode, but
doesn't exit to configuration mode on event, being awkward to expose
to user space.

Signed-off-by: Jorge Marques <jorge.marques@analog.com>
---
Jorge Marques (4):
iio: code: mark iio_dev as const in iio_buffer_enabled
dt-bindings: iio: adc: Add adi,ad4052
docs: iio: new docs for ad4052 driver
iio: adc: add support for ad4052

.../devicetree/bindings/iio/adc/adi,ad4052.yaml | 80 ++
Documentation/iio/ad4052.rst | 93 ++
MAINTAINERS | 8 +
drivers/iio/adc/Kconfig | 14 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/ad4052.c | 1289 ++++++++++++++++++++
drivers/iio/industrialio-core.c | 2 +-
include/linux/iio/iio.h | 2 +-
8 files changed, 1487 insertions(+), 2 deletions(-)
---
base-commit: aac287ec80d71a7ab7e44c936a434625417c3e30
change-id: 20250306-iio-driver-ad4052-a4acc3bb11b3

Best regards,
--
Jorge Marques <jorge.marques@analog.com>