[PATCH v2 0/3] dt-bindings: mtd: microchip-nand: convert txt to yaml

[PATCH v2 0/3] dt-bindings: mtd: microchip-nand: convert txt to yaml

[Balamanikandan Gunasundar]

Convert microchip nand controllers from text to yaml

This patch is a respin of
https://lore.kernel.org/all/20240320-linux-next-nand-yaml-v1-0-2d2495363e88@microchip.com/

Summary of changes:

[PATCH v2 1/3] dt-bindings: mtd: microchip-nand: convert txt to yaml
- Change the filename to match the compatible string
- Drop items and oneOf in the compatible property as it is just an enum
- Remove the if in the #address-cells and #size-cells
- Remove the unwanted comments that refers to .txt files
- Fix reg property description
- Define the properties in a list and add constraints
- Fix DT coding style and droped unused labels

[PATCH v2 2/3] dt-bindings: mtd: microchip-nand: add atmel pmecc
- Rename filename to match compatible string
- Add constraints for sam9x7
- Droped unused dt labels 

[PATCH v2 3/3] dt-bindings: mtd: atmel-nand: add legacy nand
- Filename matching the compatibles
- Remove "bindings" from the subject
- Remove "deprecated" as these are the only bindings available for the devices
- Add missing constraints.
- Add default for nand-ecc-mode
- Add 32 in pmecc-cap for sama5d2
- Add default for sector-size, pmecc-lookup-table-offset, nand-bus-width

Balamanikandan Gunasundar (3):
  dt-bindings: mtd: microchip-nand: convert txt to yaml
  dt-bindings: mtd: microchip-nand: add atmel pmecc
  dt-bindings: mtd: atmel-nand: add legacy nand controllers

 .../devicetree/bindings/mtd/atmel-nand.txt    | 227 ------------------
 .../devicetree/bindings/mtd/atmel-nand.yaml   | 163 +++++++++++++
 .../mtd/microchip,nand-controller.yaml        | 175 ++++++++++++++
 .../bindings/mtd/microchip,pmecc.yaml         |  67 ++++++
 4 files changed, 405 insertions(+), 227 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.txt
 create mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.yaml
 create mode 100644 Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml
 create mode 100644 Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml

-- 
2.34.1

[PATCH v2 1/3] dt-bindings: mtd: microchip-nand: convert txt to yaml

[Balamanikandan Gunasundar]

Convert text to yaml for microchip nand controller

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
---

Changes in v2:

- Change the filename to match the compatible string
- Drop items and oneOf in the compatible property as it is just an enum
- Remove the if in the #address-cells and #size-cells
- Remove the unwanted comments that refers to .txt files
- Fix reg property description
- Define the properties in a list and add constraints
- Fix DT coding style and droped unused labels

 .../devicetree/bindings/mtd/atmel-nand.txt    |  50 -----
 .../mtd/microchip,nand-controller.yaml        | 175 ++++++++++++++++++
 2 files changed, 175 insertions(+), 50 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml

diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index e36c35b17873..dbbc17a866f2 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -1,53 +1,3 @@
-Atmel NAND flash controller bindings
-
-The NAND flash controller node should be defined under the EBI bus (see
-Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
-One or several NAND devices can be defined under this NAND controller.
-The NAND controller might be connected to an ECC engine.
-
-* NAND controller bindings:
-
-Required properties:
-- compatible: should be one of the following
-	"atmel,at91rm9200-nand-controller"
-	"atmel,at91sam9260-nand-controller"
-	"atmel,at91sam9261-nand-controller"
-	"atmel,at91sam9g45-nand-controller"
-	"atmel,sama5d3-nand-controller"
-	"microchip,sam9x60-nand-controller"
-- ranges: empty ranges property to forward EBI ranges definitions.
-- #address-cells: should be set to 2.
-- #size-cells: should be set to 1.
-- atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3
-		controllers.
-- atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
-		  controllers.
-
-Optional properties:
-- ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds
-	      a PMECC engine.
-
-* NAND device/chip bindings:
-
-Required properties:
-- reg: describes the CS lines assigned to the NAND device. If the NAND device
-       exposes multiple CS lines (multi-dies chips), your reg property will
-       contain X tuples of 3 entries.
-       1st entry: the CS line this NAND chip is connected to
-       2nd entry: the base offset of the memory region assigned to this
-		  device (always 0)
-       3rd entry: the memory region size (always 0x800000)
-
-Optional properties:
-- rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.
-- cs-gpios: the GPIO(s) used to control the CS line.
-- det-gpios: the GPIO used to detect if a Smartmedia Card is present.
-- atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful
-	    on sama5 SoCs.
-
-All generic properties are described in the generic yaml files under
-Documentation/devicetree/bindings/mtd/.
-
 * ECC engine (PMECC) bindings:
 
 Required properties:
diff --git a/Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml
new file mode 100644
index 000000000000..bf644ab0cf27
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml
@@ -0,0 +1,175 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/microchip,nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip NAND flash controller
+
+maintainers:
+  - Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
+
+description: |
+  The NAND flash controller node should be defined under the EBI bus (see
+  Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
+  One or several NAND devices can be defined under this NAND controller.
+  The NAND controller might be connected to an ECC engine.
+
+properties:
+  compatible:
+    enum:
+      - atmel,at91rm9200-nand-controller
+      - atmel,at91sam9260-nand-controller
+      - atmel,at91sam9261-nand-controller
+      - atmel,at91sam9g45-nand-controller
+      - atmel,sama5d3-nand-controller
+      - microchip,sam9x60-nand-controller
+
+  ranges:
+    description: empty ranges property to forward EBI ranges definitions.
+
+  ecc-engine:
+    description:
+      phandle to the PMECC block. Only meaningful if the SoC embeds a PMECC
+      engine.
+
+  "#address-cells":
+    const: 2
+
+  "#size-cells":
+    const: 1
+
+  atmel,nfc-io:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to the NFC IO block. Only applicable for atmel,sama5d3-nand-controller
+
+  atmel,nfc-sram:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle to the NFC SRAM block. Only applicable for atmel,sama5d3-nand-controller
+
+required:
+  - compatible
+  - ranges
+  - "#address-cells"
+  - "#size-cells"
+
+patternProperties:
+  "^nand@[a-f0-9]$":
+    type: object
+    $ref: raw-nand-chip.yaml#
+    description:
+      NAND chip bindings.
+
+    additionalProperties: false
+
+    properties:
+      reg:
+        items:
+          - items:
+              - description: describes the CS lines assigned to the NAND device.
+              - description: the base offset of the memory region assigned to this device (always 0)
+              - description: the memory region size (always 0x800000)
+      rb-gpios:
+        description:
+          the GPIO(s) used to check the Ready/Busy status of the NAND.
+
+      cs-gpios:
+        description:
+          the GPIO(s) used to control the CS line.
+
+      det-gpios:
+        description:
+          the GPIO used to detect if a Smartmedia Card is present.
+
+      atmel,rb:
+        description: |
+          an integer identifying the native Ready/Busy pin.
+        $ref: /schemas/types.yaml#/definitions/uint32
+
+      nand-ecc-step-size:
+        const: 512
+
+      nand-ecc-strength:
+        enum: [2, 4, 8]
+
+      nand-ecc-mode:
+        enum: [soft, hw]
+
+      nand-bus-width:
+        const: 8
+
+      nand-on-flash-bbt: true
+
+      partitions:
+        $ref: /schemas/mtd/partitions/partitions.yaml
+
+      label:
+        description: Name or Label of the device
+
+    allOf:
+      - if:
+          properties:
+            compatible:
+              contains:
+                const: atmel,sama5d3-nand-controller
+        then:
+          properties:
+            "atmel,rb":
+              description: an integer identifying the native Ready/Busy pin.
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    nfc_io: nfc-io@70000000 {
+        compatible = "atmel,sama5d3-nfc-io", "syscon";
+        reg = <0x70000000 0x8000000>;
+    };
+
+    nfc_sram: sram@200000 {
+        compatible = "mmio-sram";
+        no-memory-wc;
+        reg = <0x200000 0x2400>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x200000 0x2400>;
+    };
+
+    pmecc: ecc-engine@ffffc070 {
+        compatible = "atmel,at91sam9g45-pmecc";
+        reg = <0xffffc070 0x490>,
+              <0xffffc500 0x100>;
+    };
+
+    ebi@10000000 {
+        compatible = "atmel,sama5d3-ebi";
+        #address-cells = <2>;
+        #size-cells = <1>;
+        atmel,smc = <&hsmc>;
+        reg = <0x10000000 0x10000000
+               0x40000000 0x30000000>;
+        ranges = <0x0 0x0 0x10000000 0x10000000
+                  0x1 0x0 0x40000000 0x10000000
+                  0x2 0x0 0x50000000 0x10000000
+                  0x3 0x0 0x60000000 0x10000000>;
+        clocks = <&mck>;
+
+        nand_controller: nand-controller {
+            compatible = "atmel,sama5d3-nand-controller";
+            atmel,nfc-sram = <&nfc_sram>;
+            atmel,nfc-io = <&nfc_io>;
+            ecc-engine = <&pmecc>;
+            #address-cells = <2>;
+            #size-cells = <1>;
+            ranges;
+
+            nand@3 {
+                reg = <0x3 0x0 0x800000>;
+                atmel,rb = <0>;
+                /*
+                 * Put generic NAND/MTD properties and
+                 * subnodes here.
+                 */
+            };
+        };
+    };
-- 
2.34.1

[PATCH v2 2/3] dt-bindings: mtd: microchip-nand: add atmel pmecc

[Balamanikandan Gunasundar]

Add bindings for programmable multibit error correction code controller
(PMECC).

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
---

Changes in v2:
- Rename filename to match compatible string
- Add constraints for sam9x7
- Droped unused dt labels 

.../devicetree/bindings/mtd/atmel-nand.txt    | 61 -----------------
 .../bindings/mtd/microchip,pmecc.yaml         | 67 +++++++++++++++++++
 2 files changed, 67 insertions(+), 61 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml

diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index dbbc17a866f2..1934614a9298 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -1,64 +1,3 @@
-* ECC engine (PMECC) bindings:
-
-Required properties:
-- compatible: should be one of the following
-	"atmel,at91sam9g45-pmecc"
-	"atmel,sama5d4-pmecc"
-	"atmel,sama5d2-pmecc"
-	"microchip,sam9x60-pmecc"
-	"microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc"
-- reg: should contain 2 register ranges. The first one is pointing to the PMECC
-       block, and the second one to the PMECC_ERRLOC block.
-
-Example:
-
-	nfc_io: nfc-io@70000000 {
-		compatible = "atmel,sama5d3-nfc-io", "syscon";
-		reg = <0x70000000 0x8000000>;
-	};
-
-	pmecc: ecc-engine@ffffc070 {
-		compatible = "atmel,at91sam9g45-pmecc";
-                reg = <0xffffc070 0x490>,
-                      <0xffffc500 0x100>;
-	};
-
-	ebi: ebi@10000000 {
-		compatible = "atmel,sama5d3-ebi";
-		#address-cells = <2>;
-		#size-cells = <1>;
-		atmel,smc = <&hsmc>;
-		reg = <0x10000000 0x10000000
-		       0x40000000 0x30000000>;
-		ranges = <0x0 0x0 0x10000000 0x10000000
-			  0x1 0x0 0x40000000 0x10000000
-			  0x2 0x0 0x50000000 0x10000000
-			  0x3 0x0 0x60000000 0x10000000>;
-		clocks = <&mck>;
-
-                nand_controller: nand-controller {
-			compatible = "atmel,sama5d3-nand-controller";
-			atmel,nfc-sram = <&nfc_sram>;
-			atmel,nfc-io = <&nfc_io>;
-			ecc-engine = <&pmecc>;
-			#address-cells = <2>;
-			#size-cells = <1>;
-			ranges;
-
-			nand@3 {
-				reg = <0x3 0x0 0x800000>;
-				atmel,rb = <0>;
-
-				/*
-				 * Put generic NAND/MTD properties and
-				 * subnodes here.
-				 */
-			};
-		};
-	};
-
------------------------------------------------------------------------
-
 Deprecated bindings (should not be used in new device trees):
 
 Required properties:
diff --git a/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml b/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml
new file mode 100644
index 000000000000..98260a691a2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/microchip,pmecc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip pmecc controller
+
+maintainers:
+  - Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
+
+description: |
+  Bindings for microchip Programmable Multibit Error Correction Code
+  Controller (PMECC). pmecc is a programmable BCH encoder/decoder. This
+  block is passed as the value to the "ecc-engine" property of microchip
+  nand flash controller node.
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - atmel,at91sam9g45-pmecc
+          - atmel,sama5d2-pmecc
+          - atmel,sama5d4-pmecc
+          - microchip,sam9x60-pmecc
+          - microchip,sam9x7-pmecc
+      - items:
+          - const: microchip,sam9x7-pmecc
+          - const: atmel,at91sam9g45-pmecc
+      - items:
+          - const: microchip,sam9x60-pmecc
+          - const: atmel,at91sam9g45-pmecc
+
+  reg:
+    items:
+      - description: Base address and size of PMECC controller registers
+      - description: Base address and size of PMECC_ERRLOC controller
+
+  clocks:
+    description: The clock source for pmecc controller
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: microchip,sam9x7-pmecc
+    then:
+      properties:
+        clocks:
+          description: The clock source for pmecc controller
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    ecc-engine@ffffc070 {
+        compatible = "microchip,sam9x7-pmecc";
+        reg = <0xffffe000 0x300>,
+              <0xffffe600 0x100>;
+        clocks = <&pmc 2 48>;
+    };
-- 
2.34.1

[PATCH v2 3/3] dt-bindings: mtd: atmel-nand: add legacy nand controllers

[Balamanikandan Gunasundar]

Add support for atmel legacy nand controllers. These bindings should not be
used with the new device trees.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
---

Changes in v2:

- Filename matching the compatibles
- Remove "bindings" from the subject
- Remove "deprecated" as these are the only bindings available for the devices
- Add missing constraints.
- Add default for nand-ecc-mode
- Add 32 in pmecc-cap for sama5d2
- Add default for sector-size, pmecc-lookup-table-offset, nand-bus-width

 .../devicetree/bindings/mtd/atmel-nand.txt    | 116 -------------
 .../devicetree/bindings/mtd/atmel-nand.yaml   | 163 ++++++++++++++++++
 2 files changed, 163 insertions(+), 116 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.txt
 create mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.yaml

diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
deleted file mode 100644
index 1934614a9298..000000000000
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ /dev/null
@@ -1,116 +0,0 @@
-Deprecated bindings (should not be used in new device trees):
-
-Required properties:
-- compatible: The possible values are:
-	"atmel,at91rm9200-nand"
-	"atmel,sama5d2-nand"
-	"atmel,sama5d4-nand"
-- reg : should specify localbus address and size used for the chip,
-	and hardware ECC controller if available.
-	If the hardware ECC is PMECC, it should contain address and size for
-	PMECC and PMECC Error Location controller.
-	The PMECC lookup table address and size in ROM is optional. If not
-	specified, driver will build it in runtime.
-- atmel,nand-addr-offset : offset for the address latch.
-- atmel,nand-cmd-offset : offset for the command latch.
-- #address-cells, #size-cells : Must be present if the device has sub-nodes
-  representing partitions.
-
-- gpios : specifies the gpio pins to control the NAND device. detect is an
-  optional gpio and may be set to 0 if not present.
-
-Optional properties:
-- atmel,nand-has-dma : boolean to support dma transfer for nand read/write.
-- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
-  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
-  "soft_bch".
-- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,
-  capable of BCH encoding and decoding, on devices where it is present.
-- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
-  Controller. Supported values are: 2, 4, 8, 12, 24. If the compatible string
-  is "atmel,sama5d2-nand", 32 is also valid.
-- atmel,pmecc-sector-size : sector size for ECC computation. Supported values
-  are: 512, 1024.
-- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
-  for different sector size. First one is for sector size 512, the next is for
-  sector size 1024. If not specified, driver will build the table in runtime.
-- nand-bus-width : 8 or 16 bus width if not present 8
-- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
-
-Nand Flash Controller(NFC) is an optional sub-node
-Required properties:
-- compatible : "atmel,sama5d3-nfc".
-- reg : should specify the address and size used for NFC command registers,
-        NFC registers and NFC SRAM. NFC SRAM address and size can be absent
-        if don't want to use it.
-- clocks: phandle to the peripheral clock
-Optional properties:
-- atmel,write-by-sram: boolean to enable NFC write by SRAM.
-
-Examples:
-nand0: nand@40000000,0 {
-	compatible = "atmel,at91rm9200-nand";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	reg = <0x40000000 0x10000000
-	       0xffffe800 0x200
-	      >;
-	atmel,nand-addr-offset = <21>;	/* ale */
-	atmel,nand-cmd-offset = <22>;	/* cle */
-	nand-on-flash-bbt;
-	nand-ecc-mode = "soft";
-	gpios = <&pioC 13 0	/* rdy */
-		 &pioC 14 0 	/* nce */
-		 0		/* cd */
-		>;
-	partition@0 {
-		...
-	};
-};
-
-/* for PMECC supported chips */
-nand0: nand@40000000 {
-	compatible = "atmel,at91rm9200-nand";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	reg = < 0x40000000 0x10000000	/* bus addr & size */
-		0xffffe000 0x00000600	/* PMECC addr & size */
-		0xffffe600 0x00000200	/* PMECC ERRLOC addr & size */
-		0x00100000 0x00100000	/* ROM addr & size */
-		>;
-	atmel,nand-addr-offset = <21>;	/* ale */
-	atmel,nand-cmd-offset = <22>;	/* cle */
-	nand-on-flash-bbt;
-	nand-ecc-mode = "hw";
-	atmel,has-pmecc;	/* enable PMECC */
-	atmel,pmecc-cap = <2>;
-	atmel,pmecc-sector-size = <512>;
-	atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
-	gpios = <&pioD 5 0	/* rdy */
-		 &pioD 4 0	/* nce */
-		 0		/* cd */
-		>;
-	partition@0 {
-		...
-	};
-};
-
-/* for NFC supported chips */
-nand0: nand@40000000 {
-	compatible = "atmel,at91rm9200-nand";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	ranges;
-        ...
-        nfc@70000000 {
-		compatible = "atmel,sama5d3-nfc";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		clocks = <&hsmc_clk>
-		reg = <
-			0x70000000 0x10000000	/* NFC Command Registers */
-			0xffffc000 0x00000070	/* NFC HSMC regs */
-			0x00200000 0x00100000	/* NFC SRAM banks */
-		>;
-	};
-};
diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.yaml b/Documentation/devicetree/bindings/mtd/atmel-nand.yaml
new file mode 100644
index 000000000000..8afc4a144caf
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.yaml
@@ -0,0 +1,163 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/atmel-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel NAND flash controller
+
+maintainers:
+  - Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
+
+description: |
+  Atmel nand flash controller. This should not be used for new device
+  trees. For the latest controllers refer microchip,nand-controller.yaml
+
+properties:
+  compatible:
+    enum:
+      - atmel,at91rm9200-nand
+      - atmel,sama5d2-nand
+      - atmel,sama5d4-nand
+
+  reg:
+    description:
+      The localbus address and size used for the chip, and hardware ECC
+      controller if available. If the hardware ECC is PMECC, it should
+      contain address and size for PMECC and PMECC Error Location
+      controller. The PMECC lookup table address and size in ROM is
+      optional. If not specified, driver will build it in runtime.
+
+  atmel,nand-addr-offset:
+    description:
+      offset for the address latch.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 31
+
+  atmel,nand-cmd-offset:
+    description:
+      offset for the command latch.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 31
+
+  '#address-cells': true
+
+  '#size-cells': true
+
+  gpios:
+    description:
+      specifies the gpio pins to control the NAND device. detect is an
+      optional gpio and may be set to 0 if not present.
+    minItems: 1
+    maxItems: 3
+
+  atmel,nand-has-dma:
+    description:
+      support dma transfer for nand read/write.
+    $ref: /schemas/types.yaml#/definitions/flag
+
+  atmel,has-pmecc:
+    description:
+      enable Programmable Multibit ECC hardware, capable of BCH encoding
+      and decoding, on devices where it is present.
+    $ref: /schemas/types.yaml#/definitions/flag
+
+  nand-on-flash-bbt:
+    description:
+      enable on flash bbt option if not present false
+    $ref: /schemas/types.yaml#/definitions/flag
+
+  nand-ecc-mode:
+    description:
+      operation mode of the NAND ecc
+    enum:
+      [none, soft, hw, hw_syndrome, hw_oob_first, soft_bch]
+    default: soft
+    $ref: /schemas/types.yaml#/definitions/string
+
+
+  atmel,pmecc-cap:
+    description:
+      error correct capability for Programmable Multibit ECC Controller.
+    enum:
+      [2, 4, 8, 12, 24, 32]
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  atmel,pmecc-sector-size:
+    description:
+      sector size for ECC computation.
+    enum:
+      [512, 1024]
+    default: 512
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+
+  atmel,pmecc-lookup-table-offset:
+    description:
+      Two offsets of lookup table in ROM for different sector size. First
+      one is for sector size 512, the next is for sector size 1024. If not
+      specified, driver will build the table in runtime.
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    default: 512
+
+  nand-bus-width:
+    description:
+      nand bus width
+    enum:
+      [8, 16]
+    default: 8
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+  - compatible
+  - reg
+  - atmel,nand-addr-offset
+  - atmel,nand-cmd-offset
+  - "#address-cells"
+  - "#size-cells"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    nand@40000000,0 {
+        compatible = "atmel,at91rm9200-nand";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x40000000 0x10000000
+               0xffffe800 0x200>;
+        atmel,nand-addr-offset = <21>;	/* ale */
+        atmel,nand-cmd-offset = <22>;	/* cle */
+        nand-on-flash-bbt;
+        nand-ecc-mode = "soft";
+        gpios = <&pioC 13 0	/* rdy */
+                 &pioC 14 0 /* nce */
+                 0		/* cd */
+                >;
+    };
+  - |
+    /* for PMECC supported chips */
+    nand1@40000000 {
+        compatible = "atmel,at91rm9200-nand";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x40000000 0x10000000	/* bus addr & size */
+               0xffffe000 0x00000600	/* PMECC addr & size */
+               0xffffe600 0x00000200	/* PMECC ERRLOC addr & size */
+               0x00100000 0x00100000>;	/* ROM addr & size */
+
+        atmel,nand-addr-offset = <21>;	/* ale */
+        atmel,nand-cmd-offset = <22>;	/* cle */
+        nand-on-flash-bbt;
+        nand-ecc-mode = "hw";
+        atmel,has-pmecc;	/* enable PMECC */
+        atmel,pmecc-cap = <2>;
+        atmel,pmecc-sector-size = <512>;
+        atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
+        gpios = <&pioD 5 0	/* rdy */
+                 &pioD 4 0	/* nce */
+                 0		/* cd */
+                >;
+    };
-- 
2.34.1

Re: [PATCH v2 1/3] dt-bindings: mtd: microchip-nand: convert txt to yaml

[Rob Herring (Arm)]

On Tue, 11 Mar 2025 17:58:45 +0530, Balamanikandan Gunasundar wrote:
> Convert text to yaml for microchip nand controller
> 
> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> ---
> 
> Changes in v2:
> 
> - Change the filename to match the compatible string
> - Drop items and oneOf in the compatible property as it is just an enum
> - Remove the if in the #address-cells and #size-cells
> - Remove the unwanted comments that refers to .txt files
> - Fix reg property description
> - Define the properties in a list and add constraints
> - Fix DT coding style and droped unused labels
> 
>  .../devicetree/bindings/mtd/atmel-nand.txt    |  50 -----
>  .../mtd/microchip,nand-controller.yaml        | 175 ++++++++++++++++++
>  2 files changed, 175 insertions(+), 50 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: /example-0/ecc-engine@ffffc070: failed to match any schema with compatible: ['atmel,at91sam9g45-pmecc']
Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: /example-0/ebi@10000000: failed to match any schema with compatible: ['atmel,sama5d3-ebi']
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: nand-controller: #address-cells: 1 was expected
	from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: nand-controller: #size-cells: 0 was expected
	from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250311122847.90081-2-balamanikandan.gunasundar@microchip.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v2 2/3] dt-bindings: mtd: microchip-nand: add atmel pmecc

[Rob Herring]

On Tue, Mar 11, 2025 at 05:58:46PM +0530, Balamanikandan Gunasundar wrote:
> Add bindings for programmable multibit error correction code controller
> (PMECC).
> 
> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> ---
> 
> Changes in v2:
> - Rename filename to match compatible string
> - Add constraints for sam9x7
> - Droped unused dt labels 
> 
> .../devicetree/bindings/mtd/atmel-nand.txt    | 61 -----------------
>  .../bindings/mtd/microchip,pmecc.yaml         | 67 +++++++++++++++++++
>  2 files changed, 67 insertions(+), 61 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
> index dbbc17a866f2..1934614a9298 100644
> --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
> @@ -1,64 +1,3 @@
> -* ECC engine (PMECC) bindings:
> -
> -Required properties:
> -- compatible: should be one of the following
> -	"atmel,at91sam9g45-pmecc"
> -	"atmel,sama5d4-pmecc"
> -	"atmel,sama5d2-pmecc"
> -	"microchip,sam9x60-pmecc"
> -	"microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc"
> -- reg: should contain 2 register ranges. The first one is pointing to the PMECC
> -       block, and the second one to the PMECC_ERRLOC block.
> -
> -Example:
> -
> -	nfc_io: nfc-io@70000000 {
> -		compatible = "atmel,sama5d3-nfc-io", "syscon";
> -		reg = <0x70000000 0x8000000>;
> -	};
> -
> -	pmecc: ecc-engine@ffffc070 {
> -		compatible = "atmel,at91sam9g45-pmecc";
> -                reg = <0xffffc070 0x490>,
> -                      <0xffffc500 0x100>;
> -	};
> -
> -	ebi: ebi@10000000 {
> -		compatible = "atmel,sama5d3-ebi";
> -		#address-cells = <2>;
> -		#size-cells = <1>;
> -		atmel,smc = <&hsmc>;
> -		reg = <0x10000000 0x10000000
> -		       0x40000000 0x30000000>;
> -		ranges = <0x0 0x0 0x10000000 0x10000000
> -			  0x1 0x0 0x40000000 0x10000000
> -			  0x2 0x0 0x50000000 0x10000000
> -			  0x3 0x0 0x60000000 0x10000000>;
> -		clocks = <&mck>;
> -
> -                nand_controller: nand-controller {
> -			compatible = "atmel,sama5d3-nand-controller";
> -			atmel,nfc-sram = <&nfc_sram>;
> -			atmel,nfc-io = <&nfc_io>;
> -			ecc-engine = <&pmecc>;
> -			#address-cells = <2>;
> -			#size-cells = <1>;
> -			ranges;
> -
> -			nand@3 {
> -				reg = <0x3 0x0 0x800000>;
> -				atmel,rb = <0>;
> -
> -				/*
> -				 * Put generic NAND/MTD properties and
> -				 * subnodes here.
> -				 */
> -			};
> -		};
> -	};
> -
> ------------------------------------------------------------------------
> -
>  Deprecated bindings (should not be used in new device trees):
>  
>  Required properties:
> diff --git a/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml b/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml
> new file mode 100644
> index 000000000000..98260a691a2e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/microchip,pmecc.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/microchip,pmecc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip pmecc controller
> +
> +maintainers:
> +  - Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> +
> +description: |

Don't need '|' if no formatting to preserve.

> +  Bindings for microchip Programmable Multibit Error Correction Code
> +  Controller (PMECC). pmecc is a programmable BCH encoder/decoder. This
> +  block is passed as the value to the "ecc-engine" property of microchip
> +  nand flash controller node.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - atmel,at91sam9g45-pmecc
> +          - atmel,sama5d2-pmecc
> +          - atmel,sama5d4-pmecc
> +          - microchip,sam9x60-pmecc
> +          - microchip,sam9x7-pmecc

Both alone and with a fallback should not be allowed. Pick one. A 
fallback is only useful if there's a driver/client that only understands 
the fallback and would work with the new implementation. IOW, if 'they 
are the same'.

> +      - items:
> +          - const: microchip,sam9x7-pmecc
> +          - const: atmel,at91sam9g45-pmecc
> +      - items:
> +          - const: microchip,sam9x60-pmecc
> +          - const: atmel,at91sam9g45-pmecc

Combine the last 2 'items' to 1 as the fallback is the same for both.

> +
> +  reg:
> +    items:
> +      - description: Base address and size of PMECC controller registers
> +      - description: Base address and size of PMECC_ERRLOC controller

Drop 'Base address and size of '.

> +
> +  clocks:
> +    description: The clock source for pmecc controller

For a single clock, what else would it be? Drop.

> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: microchip,sam9x7-pmecc
> +    then:
> +      properties:
> +        clocks:
> +          description: The clock source for pmecc controller

What's the purpose of this if/then? It doesn't do anything.

> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    ecc-engine@ffffc070 {
> +        compatible = "microchip,sam9x7-pmecc";
> +        reg = <0xffffe000 0x300>,
> +              <0xffffe600 0x100>;
> +        clocks = <&pmc 2 48>;
> +    };
> -- 
> 2.34.1
> 

Re: [PATCH v2 3/3] dt-bindings: mtd: atmel-nand: add legacy nand controllers

[Rob Herring]

On Tue, Mar 11, 2025 at 05:58:47PM +0530, Balamanikandan Gunasundar wrote:
> Add support for atmel legacy nand controllers. These bindings should not be
> used with the new device trees.
> 
> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> ---
> 
> Changes in v2:
> 
> - Filename matching the compatibles
> - Remove "bindings" from the subject
> - Remove "deprecated" as these are the only bindings available for the devices
> - Add missing constraints.
> - Add default for nand-ecc-mode
> - Add 32 in pmecc-cap for sama5d2
> - Add default for sector-size, pmecc-lookup-table-offset, nand-bus-width
> 
>  .../devicetree/bindings/mtd/atmel-nand.txt    | 116 -------------
>  .../devicetree/bindings/mtd/atmel-nand.yaml   | 163 ++++++++++++++++++
>  2 files changed, 163 insertions(+), 116 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.txt
>  create mode 100644 Documentation/devicetree/bindings/mtd/atmel-nand.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
> deleted file mode 100644
> index 1934614a9298..000000000000
> --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
> +++ /dev/null
> @@ -1,116 +0,0 @@
> -Deprecated bindings (should not be used in new device trees):
> -
> -Required properties:
> -- compatible: The possible values are:
> -	"atmel,at91rm9200-nand"
> -	"atmel,sama5d2-nand"
> -	"atmel,sama5d4-nand"
> -- reg : should specify localbus address and size used for the chip,
> -	and hardware ECC controller if available.
> -	If the hardware ECC is PMECC, it should contain address and size for
> -	PMECC and PMECC Error Location controller.
> -	The PMECC lookup table address and size in ROM is optional. If not
> -	specified, driver will build it in runtime.
> -- atmel,nand-addr-offset : offset for the address latch.
> -- atmel,nand-cmd-offset : offset for the command latch.
> -- #address-cells, #size-cells : Must be present if the device has sub-nodes
> -  representing partitions.
> -
> -- gpios : specifies the gpio pins to control the NAND device. detect is an
> -  optional gpio and may be set to 0 if not present.
> -
> -Optional properties:
> -- atmel,nand-has-dma : boolean to support dma transfer for nand read/write.
> -- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
> -  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
> -  "soft_bch".
> -- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,
> -  capable of BCH encoding and decoding, on devices where it is present.
> -- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
> -  Controller. Supported values are: 2, 4, 8, 12, 24. If the compatible string
> -  is "atmel,sama5d2-nand", 32 is also valid.
> -- atmel,pmecc-sector-size : sector size for ECC computation. Supported values
> -  are: 512, 1024.
> -- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
> -  for different sector size. First one is for sector size 512, the next is for
> -  sector size 1024. If not specified, driver will build the table in runtime.
> -- nand-bus-width : 8 or 16 bus width if not present 8
> -- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
> -
> -Nand Flash Controller(NFC) is an optional sub-node
> -Required properties:
> -- compatible : "atmel,sama5d3-nfc".
> -- reg : should specify the address and size used for NFC command registers,
> -        NFC registers and NFC SRAM. NFC SRAM address and size can be absent
> -        if don't want to use it.
> -- clocks: phandle to the peripheral clock
> -Optional properties:
> -- atmel,write-by-sram: boolean to enable NFC write by SRAM.
> -
> -Examples:
> -nand0: nand@40000000,0 {
> -	compatible = "atmel,at91rm9200-nand";
> -	#address-cells = <1>;
> -	#size-cells = <1>;
> -	reg = <0x40000000 0x10000000
> -	       0xffffe800 0x200
> -	      >;
> -	atmel,nand-addr-offset = <21>;	/* ale */
> -	atmel,nand-cmd-offset = <22>;	/* cle */
> -	nand-on-flash-bbt;
> -	nand-ecc-mode = "soft";
> -	gpios = <&pioC 13 0	/* rdy */
> -		 &pioC 14 0 	/* nce */
> -		 0		/* cd */
> -		>;
> -	partition@0 {
> -		...
> -	};
> -};
> -
> -/* for PMECC supported chips */
> -nand0: nand@40000000 {
> -	compatible = "atmel,at91rm9200-nand";
> -	#address-cells = <1>;
> -	#size-cells = <1>;
> -	reg = < 0x40000000 0x10000000	/* bus addr & size */
> -		0xffffe000 0x00000600	/* PMECC addr & size */
> -		0xffffe600 0x00000200	/* PMECC ERRLOC addr & size */
> -		0x00100000 0x00100000	/* ROM addr & size */
> -		>;
> -	atmel,nand-addr-offset = <21>;	/* ale */
> -	atmel,nand-cmd-offset = <22>;	/* cle */
> -	nand-on-flash-bbt;
> -	nand-ecc-mode = "hw";
> -	atmel,has-pmecc;	/* enable PMECC */
> -	atmel,pmecc-cap = <2>;
> -	atmel,pmecc-sector-size = <512>;
> -	atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
> -	gpios = <&pioD 5 0	/* rdy */
> -		 &pioD 4 0	/* nce */
> -		 0		/* cd */
> -		>;
> -	partition@0 {
> -		...
> -	};
> -};
> -
> -/* for NFC supported chips */
> -nand0: nand@40000000 {
> -	compatible = "atmel,at91rm9200-nand";
> -	#address-cells = <1>;
> -	#size-cells = <1>;
> -	ranges;
> -        ...
> -        nfc@70000000 {
> -		compatible = "atmel,sama5d3-nfc";
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		clocks = <&hsmc_clk>
> -		reg = <
> -			0x70000000 0x10000000	/* NFC Command Registers */
> -			0xffffc000 0x00000070	/* NFC HSMC regs */
> -			0x00200000 0x00100000	/* NFC SRAM banks */
> -		>;
> -	};
> -};
> diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.yaml b/Documentation/devicetree/bindings/mtd/atmel-nand.yaml
> new file mode 100644
> index 000000000000..8afc4a144caf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.yaml
> @@ -0,0 +1,163 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/atmel-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel NAND flash controller
> +
> +maintainers:
> +  - Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> +
> +description: |

Don't need '|'.

> +  Atmel nand flash controller. This should not be used for new device
> +  trees. For the latest controllers refer microchip,nand-controller.yaml

This reads more like the h/w changed in newer controllers. Make it clear 
this is deprecated. You can also put at the top-level:

deprecated: true

But you should only put that if you plan to update all in tree .dts 
files to the non-deprecated binding.

> +
> +properties:
> +  compatible:
> +    enum:
> +      - atmel,at91rm9200-nand
> +      - atmel,sama5d2-nand
> +      - atmel,sama5d4-nand
> +
> +  reg:
> +    description:
> +      The localbus address and size used for the chip, and hardware ECC
> +      controller if available. If the hardware ECC is PMECC, it should
> +      contain address and size for PMECC and PMECC Error Location
> +      controller. The PMECC lookup table address and size in ROM is
> +      optional. If not specified, driver will build it in runtime.
> +
> +  atmel,nand-addr-offset:
> +    description:
> +      offset for the address latch.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 31
> +
> +  atmel,nand-cmd-offset:
> +    description:
> +      offset for the command latch.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 31
> +
> +  '#address-cells': true

0-3 is okay?

> +
> +  '#size-cells': true

0-2 is okay?

> +
> +  gpios:
> +    description:
> +      specifies the gpio pins to control the NAND device. detect is an
> +      optional gpio and may be set to 0 if not present.

Which entry is detect? Need to define what each entry is.

> +    minItems: 1
> +    maxItems: 3
> +
> +  atmel,nand-has-dma:
> +    description:
> +      support dma transfer for nand read/write.
> +    $ref: /schemas/types.yaml#/definitions/flag
> +
> +  atmel,has-pmecc:
> +    description:
> +      enable Programmable Multibit ECC hardware, capable of BCH encoding
> +      and decoding, on devices where it is present.
> +    $ref: /schemas/types.yaml#/definitions/flag

All vendor specific properties go last.

> +
> +  nand-on-flash-bbt:
> +    description:
> +      enable on flash bbt option if not present false
> +    $ref: /schemas/types.yaml#/definitions/flag
> +
> +  nand-ecc-mode:
> +    description:
> +      operation mode of the NAND ecc
> +    enum:
> +      [none, soft, hw, hw_syndrome, hw_oob_first, soft_bch]
> +    default: soft
> +    $ref: /schemas/types.yaml#/definitions/string

You should be referencing mtd/raw-nand-chip.yaml either directly or 
indirectly. And then drop the type. Same on the others.

> +
> +
> +  atmel,pmecc-cap:
> +    description:
> +      error correct capability for Programmable Multibit ECC Controller.
> +    enum:
> +      [2, 4, 8, 12, 24, 32]
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +  atmel,pmecc-sector-size:
> +    description:
> +      sector size for ECC computation.
> +    enum:
> +      [512, 1024]
> +    default: 512
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +
> +  atmel,pmecc-lookup-table-offset:
> +    description:
> +      Two offsets of lookup table in ROM for different sector size. First
> +      one is for sector size 512, the next is for sector size 1024. If not
> +      specified, driver will build the table in runtime.
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    default: 512
> +
> +  nand-bus-width:

Before vendor specific properties.

> +    description:
> +      nand bus width
> +    enum:
> +      [8, 16]
> +    default: 8
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +required:
> +  - compatible
> +  - reg
> +  - atmel,nand-addr-offset
> +  - atmel,nand-cmd-offset
> +  - "#address-cells"
> +  - "#size-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    nand@40000000,0 {

Not a correct unit-address.

nand-controller is preferred node name.

> +        compatible = "atmel,at91rm9200-nand";
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        reg = <0x40000000 0x10000000
> +               0xffffe800 0x200>;
> +        atmel,nand-addr-offset = <21>;	/* ale */
> +        atmel,nand-cmd-offset = <22>;	/* cle */
> +        nand-on-flash-bbt;
> +        nand-ecc-mode = "soft";
> +        gpios = <&pioC 13 0	/* rdy */
> +                 &pioC 14 0 /* nce */
> +                 0		/* cd */
> +                >;
> +    };
> +  - |
> +    /* for PMECC supported chips */
> +    nand1@40000000 {
> +        compatible = "atmel,at91rm9200-nand";
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        reg = <0x40000000 0x10000000	/* bus addr & size */
> +               0xffffe000 0x00000600	/* PMECC addr & size */
> +               0xffffe600 0x00000200	/* PMECC ERRLOC addr & size */
> +               0x00100000 0x00100000>;	/* ROM addr & size */
> +
> +        atmel,nand-addr-offset = <21>;	/* ale */
> +        atmel,nand-cmd-offset = <22>;	/* cle */
> +        nand-on-flash-bbt;
> +        nand-ecc-mode = "hw";
> +        atmel,has-pmecc;	/* enable PMECC */
> +        atmel,pmecc-cap = <2>;
> +        atmel,pmecc-sector-size = <512>;
> +        atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
> +        gpios = <&pioD 5 0	/* rdy */
> +                 &pioD 4 0	/* nce */
> +                 0		/* cd */
> +                >;
> +    };
> -- 
> 2.34.1
> 

Re: [PATCH v2 1/3] dt-bindings: mtd: microchip-nand: convert txt to yaml

[Balamanikandan.Gunasundar]

Hi Rob,

On 11/03/25 8:22 pm, Rob Herring (Arm) wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Tue, 11 Mar 2025 17:58:45 +0530, Balamanikandan Gunasundar wrote:
>> Convert text to yaml for microchip nand controller
>>
>> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
>> ---
>>
>> Changes in v2:
>>
>> - Change the filename to match the compatible string
>> - Drop items and oneOf in the compatible property as it is just an enum
>> - Remove the if in the #address-cells and #size-cells
>> - Remove the unwanted comments that refers to .txt files
>> - Fix reg property description
>> - Define the properties in a list and add constraints
>> - Fix DT coding style and droped unused labels
>>
>>   .../devicetree/bindings/mtd/atmel-nand.txt    |  50 -----
>>   .../mtd/microchip,nand-controller.yaml        | 175 ++++++++++++++++++
>>   2 files changed, 175 insertions(+), 50 deletions(-)
>>   create mode 100644 Documentation/devicetree/bindings/mtd/microchip,nand-controller.yaml
>>
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: /example-0/ecc-engine@ffffc070: failed to match any schema with compatible: ['atmel,at91sam9g45-pmecc']
> Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: /example-0/ebi@10000000: failed to match any schema with compatible: ['atmel,sama5d3-ebi']
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: nand-controller: #address-cells: 1 was expected
>          from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/microchip,nand-controller.example.dtb: nand-controller: #size-cells: 0 was expected
>          from schema $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
> 
> doc reference errors (make refcheckdocs):
> 
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250311122847.90081-2-balamanikandan.gunasundar@microchip.com
> 
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:

Yes I made sure I ran dt_binding_check and dtbs_check before sending and 
didn't see the errors. As you said I will update the dt-schema and check 
again. Will address the other comments for this series and send a v3.

Thanks,
Bala

> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
> 

Re: [PATCH v2 3/3] dt-bindings: mtd: atmel-nand: add legacy nand controllers

[kernel test robot]

Hi Balamanikandan,

kernel test robot noticed the following build warnings:

[auto build test WARNING on mtd/mtd/next]
[also build test WARNING on mtd/mtd/fixes robh/for-next linus/master v6.14-rc6 next-20250311]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Balamanikandan-Gunasundar/dt-bindings-mtd-microchip-nand-convert-txt-to-yaml/20250311-203706
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next
patch link:    https://lore.kernel.org/r/20250311122847.90081-4-balamanikandan.gunasundar%40microchip.com
patch subject: [PATCH v2 3/3] dt-bindings: mtd: atmel-nand: add legacy nand controllers
reproduce: (https://download.01.org/0day-ci/archive/20250312/202503121629.f5Hsa5Zy-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503121629.f5Hsa5Zy-lkp@intel.com/

All warnings (new ones prefixed by >>):

   Warning: Documentation/translations/ja_JP/SubmittingPatches references a file that doesn't exist: linux-2.6.12-vanilla/Documentation/dontdiff
   Warning: Documentation/translations/zh_CN/admin-guide/README.rst references a file that doesn't exist: Documentation/dev-tools/kgdb.rst
   Warning: Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst references a file that doesn't exist: Documentation/dev-tools/gdb-kernel-debugging.rst
   Warning: Documentation/translations/zh_TW/admin-guide/README.rst references a file that doesn't exist: Documentation/dev-tools/kgdb.rst
   Warning: Documentation/translations/zh_TW/dev-tools/gdb-kernel-debugging.rst references a file that doesn't exist: Documentation/dev-tools/gdb-kernel-debugging.rst
>> Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/mtd/atmel-nand.txt
   Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
   Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml
   Warning: lib/Kconfig.debug references a file that doesn't exist: Documentation/dev-tools/fault-injection/fault-injection.rst
   Using alabaster theme

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