From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: conor@kernel.org, "Conor Dooley" <conor.dooley@microchip.com>,
"Eric Biggers" <ebiggers@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Andy Chiu" <andybnac@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v4 5/6] dt-bindings: riscv: add vector sub-extension dependencies
Date: Wed, 12 Mar 2025 13:11:48 +0000 [thread overview]
Message-ID: <20250312-banking-crestless-58f3259a5018@spud> (raw)
In-Reply-To: <20250312-abide-pancreas-3576b8c44d2c@spud>
From: Conor Dooley <conor.dooley@microchip.com>
Section 33.18.2. Zve*: Vector Extensions for Embedded Processors
in [1] says:
| The Zve32f and Zve64x extensions depend on the Zve32x extension. The Zve64f extension depends
| on the Zve32f and Zve64x extensions. The Zve64d extension depends on the Zve64f extension
| The Zve32x extension depends on the Zicsr extension. The Zve32f and Zve64f extensions depend
| upon the F extension
| The Zve64d extension depends upon the D extension
Apply these rules to the bindings to help prevent invalid combinations.
Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
Reviewed-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/riscv/extensions.yaml | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index ebb252275ddd..02065664f819 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -680,6 +680,52 @@ properties:
contains:
const: zca
+ - if:
+ contains:
+ const: zve32x
+ then:
+ contains:
+ const: zicsr
+
+ - if:
+ contains:
+ const: zve32f
+ then:
+ allOf:
+ - contains:
+ const: f
+ - contains:
+ const: zve32x
+
+ - if:
+ contains:
+ const: zve64x
+ then:
+ contains:
+ const: zve32x
+
+ - if:
+ contains:
+ const: zve64f
+ then:
+ allOf:
+ - contains:
+ const: f
+ - contains:
+ const: zve32f
+ - contains:
+ const: zve64x
+
+ - if:
+ contains:
+ const: zve64d
+ then:
+ allOf:
+ - contains:
+ const: d
+ - contains:
+ const: zve64f
+
allOf:
# Zcf extension does not exist on rv64
- if:
--
2.45.2
next prev parent reply other threads:[~2025-03-12 13:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-12 13:11 [PATCH v4 0/6] Add some validation for vector, vector crypto and fp stuff Conor Dooley
2025-03-12 13:11 ` [PATCH v4 1/6] RISC-V: add vector extension validation checks Conor Dooley
2025-03-25 13:16 ` Alexandre Ghiti
2025-03-12 13:11 ` [PATCH v4 2/6] RISC-V: add vector crypto " Conor Dooley
2025-03-25 13:44 ` Alexandre Ghiti
2025-03-12 13:11 ` [PATCH v4 3/6] RISC-V: add f & d " Conor Dooley
2025-03-25 13:48 ` Alexandre Ghiti
2025-03-12 13:11 ` [PATCH v4 4/6] dt-bindings: riscv: d requires f Conor Dooley
2025-03-12 13:11 ` Conor Dooley [this message]
2025-03-12 13:11 ` [PATCH v4 6/6] dt-bindings: riscv: document vector crypto requirements Conor Dooley
2025-03-25 13:51 ` Alexandre Ghiti
2025-04-03 16:20 ` [PATCH v4 0/6] Add some validation for vector, vector crypto and fp stuff patchwork-bot+linux-riscv
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