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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: linux-renesas-soc@vger.kernel.org
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org
Subject: [RFC PATCH 2/4] ARM: dts: renesas: r9a06g032: add second clock input to RTC
Date: Thu, 13 Mar 2025 11:25:43 +0100	[thread overview]
Message-ID: <20250313102546.27335-3-wsa+renesas@sang-engineering.com> (raw)
In-Reply-To: <20250313102546.27335-1-wsa+renesas@sang-engineering.com>

The external rtc clock is populated on the RZ/N1D module, so describe it
and add a reference to the RTC node.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

For the non-RFC series, it makes probably sense to split this patch into
two.

 arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts | 4 ++++
 arch/arm/boot/dts/renesas/r9a06g032.dtsi            | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 31cdca3e623c..c2311f761381 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -47,6 +47,10 @@ &eth_miic {
 	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
 };
 
+&ext_rtc_clk {
+	clock-frequency = <32768>;
+};
+
 &gmac2 {
 	status = "okay";
 	phy-mode = "gmii";
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 7548291c8d7e..458dab9d3b7f 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -73,8 +73,8 @@ rtc0: rtc@40006000 {
 				     <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
 				     <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "alarm", "timer", "pps";
-			clocks = <&sysctrl R9A06G032_HCLK_RTC>;
-			clock-names = "hclk";
+			clocks = <&sysctrl R9A06G032_HCLK_RTC>, <&ext_rtc_clk>;
+			clock-names = "hclk", "xtal";
 			power-domains = <&sysctrl>;
 			status = "disabled";
 		};
-- 
2.47.2


  parent reply	other threads:[~2025-03-13 10:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-13 10:25 [RFC PATCH 0/4] rtc: rzn1: support XTAL clk and SCMP method Wolfram Sang
2025-03-13 10:25 ` [RFC PATCH 1/4] dt-bindings: rtc: rzn1: add optional second clock Wolfram Sang
2025-03-14  8:41   ` Krzysztof Kozlowski
2025-03-14  8:54     ` Wolfram Sang
2025-03-13 10:25 ` Wolfram Sang [this message]
2025-04-10 15:32   ` [RFC PATCH 2/4] ARM: dts: renesas: r9a06g032: add second clock input to RTC Geert Uytterhoeven

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