* [PATCH v10 01/18] dt-bindings: clock: imx8mm: add VIDEO_PLL clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 03/18] dt-bindings: clock: imx8mp: " Dario Binacchi
` (10 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Krzysztof Kozlowski, Conor Dooley, Fabio Estevam,
Krzysztof Kozlowski, Michael Turquette, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
linux-arm-kernel, linux-clk
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's add the IMX8MM_VIDEO_PLL[_*]
definitions to be consistent with the RM and avoid misunderstandings.
The IMX8MM_VIDEO_PLL1* constants have not been removed to ensure
backward compatibility of the patch.
No functional changes intended.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v6)
Changes in v6:
- Add 'Acked-by' tag of Krzysztof Kozlowski
Changes in v5:
- New
include/dt-bindings/clock/imx8mm-clock.h | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h
index 1f768b2eeb1a..102d8a6cdb55 100644
--- a/include/dt-bindings/clock/imx8mm-clock.h
+++ b/include/dt-bindings/clock/imx8mm-clock.h
@@ -16,7 +16,8 @@
#define IMX8MM_CLK_EXT4 7
#define IMX8MM_AUDIO_PLL1_REF_SEL 8
#define IMX8MM_AUDIO_PLL2_REF_SEL 9
-#define IMX8MM_VIDEO_PLL1_REF_SEL 10
+#define IMX8MM_VIDEO_PLL_REF_SEL 10
+#define IMX8MM_VIDEO_PLL1_REF_SEL IMX8MM_VIDEO_PLL_REF_SEL
#define IMX8MM_DRAM_PLL_REF_SEL 11
#define IMX8MM_GPU_PLL_REF_SEL 12
#define IMX8MM_VPU_PLL_REF_SEL 13
@@ -26,7 +27,8 @@
#define IMX8MM_SYS_PLL3_REF_SEL 17
#define IMX8MM_AUDIO_PLL1 18
#define IMX8MM_AUDIO_PLL2 19
-#define IMX8MM_VIDEO_PLL1 20
+#define IMX8MM_VIDEO_PLL 20
+#define IMX8MM_VIDEO_PLL1 IMX8MM_VIDEO_PLL
#define IMX8MM_DRAM_PLL 21
#define IMX8MM_GPU_PLL 22
#define IMX8MM_VPU_PLL 23
@@ -36,7 +38,8 @@
#define IMX8MM_SYS_PLL3 27
#define IMX8MM_AUDIO_PLL1_BYPASS 28
#define IMX8MM_AUDIO_PLL2_BYPASS 29
-#define IMX8MM_VIDEO_PLL1_BYPASS 30
+#define IMX8MM_VIDEO_PLL_BYPASS 30
+#define IMX8MM_VIDEO_PLL1_BYPASS IMX8MM_VIDEO_PLL_BYPASS
#define IMX8MM_DRAM_PLL_BYPASS 31
#define IMX8MM_GPU_PLL_BYPASS 32
#define IMX8MM_VPU_PLL_BYPASS 33
@@ -46,7 +49,8 @@
#define IMX8MM_SYS_PLL3_BYPASS 37
#define IMX8MM_AUDIO_PLL1_OUT 38
#define IMX8MM_AUDIO_PLL2_OUT 39
-#define IMX8MM_VIDEO_PLL1_OUT 40
+#define IMX8MM_VIDEO_PLL_OUT 40
+#define IMX8MM_VIDEO_PLL1_OUT IMX8MM_VIDEO_PLL_OUT
#define IMX8MM_DRAM_PLL_OUT 41
#define IMX8MM_GPU_PLL_OUT 42
#define IMX8MM_VPU_PLL_OUT 43
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 03/18] dt-bindings: clock: imx8mp: add VIDEO_PLL clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 01/18] dt-bindings: clock: imx8mm: add VIDEO_PLL clocks Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 05/18] dt-bindings: clock: imx8m-anatop: add oscillators and PLLs Dario Binacchi
` (9 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Krzysztof Kozlowski, Conor Dooley, Fabio Estevam,
Krzysztof Kozlowski, Michael Turquette, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
linux-arm-kernel, linux-clk
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's add the IMX8MP_VIDEO_PLL[_*]
definitions to be consistent with the RM and avoid misunderstandings.
The IMX8MP_VIDEO_PLL1* constants have not been removed to ensure
backward compatibility of the patch.
No functional changes intended.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v6)
Changes in v6:
- Add 'Acked-by' tag of Krzysztof Kozlowski
Changes in v5:
- New
include/dt-bindings/clock/imx8mp-clock.h | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 7da4243984b2..3235d7de3b62 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -16,7 +16,8 @@
#define IMX8MP_CLK_EXT4 7
#define IMX8MP_AUDIO_PLL1_REF_SEL 8
#define IMX8MP_AUDIO_PLL2_REF_SEL 9
-#define IMX8MP_VIDEO_PLL1_REF_SEL 10
+#define IMX8MP_VIDEO_PLL_REF_SEL 10
+#define IMX8MP_VIDEO_PLL1_REF_SEL IMX8MP_VIDEO_PLL_REF_SEL
#define IMX8MP_DRAM_PLL_REF_SEL 11
#define IMX8MP_GPU_PLL_REF_SEL 12
#define IMX8MP_VPU_PLL_REF_SEL 13
@@ -26,7 +27,8 @@
#define IMX8MP_SYS_PLL3_REF_SEL 17
#define IMX8MP_AUDIO_PLL1 18
#define IMX8MP_AUDIO_PLL2 19
-#define IMX8MP_VIDEO_PLL1 20
+#define IMX8MP_VIDEO_PLL 20
+#define IMX8MP_VIDEO_PLL1 IMX8MP_VIDEO_PLL
#define IMX8MP_DRAM_PLL 21
#define IMX8MP_GPU_PLL 22
#define IMX8MP_VPU_PLL 23
@@ -36,7 +38,8 @@
#define IMX8MP_SYS_PLL3 27
#define IMX8MP_AUDIO_PLL1_BYPASS 28
#define IMX8MP_AUDIO_PLL2_BYPASS 29
-#define IMX8MP_VIDEO_PLL1_BYPASS 30
+#define IMX8MP_VIDEO_PLL_BYPASS 30
+#define IMX8MP_VIDEO_PLL1_BYPASS IMX8MP_VIDEO_PLL_BYPASS
#define IMX8MP_DRAM_PLL_BYPASS 31
#define IMX8MP_GPU_PLL_BYPASS 32
#define IMX8MP_VPU_PLL_BYPASS 33
@@ -46,7 +49,8 @@
#define IMX8MP_SYS_PLL3_BYPASS 37
#define IMX8MP_AUDIO_PLL1_OUT 38
#define IMX8MP_AUDIO_PLL2_OUT 39
-#define IMX8MP_VIDEO_PLL1_OUT 40
+#define IMX8MP_VIDEO_PLL_OUT 40
+#define IMX8MP_VIDEO_PLL1_OUT IMX8MP_VIDEO_PLL_OUT
#define IMX8MP_DRAM_PLL_OUT 41
#define IMX8MP_GPU_PLL_OUT 42
#define IMX8MP_VPU_PLL_OUT 43
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 05/18] dt-bindings: clock: imx8m-anatop: add oscillators and PLLs
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 01/18] dt-bindings: clock: imx8mm: add VIDEO_PLL clocks Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 03/18] dt-bindings: clock: imx8mp: " Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 06/18] arm64: dts: imx8mm: add anatop clocks Dario Binacchi
` (8 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Krzysztof Kozlowski, Conor Dooley, Fabio Estevam,
Krzysztof Kozlowski, Michael Turquette, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
linux-arm-kernel, linux-clk
Though adding clocks and clock-names properties will break the ABI,
it is required to accurately describe the hardware. Indeed, the anatop
module uses the input oscillators to generate various PLLs. In turn,
the Clock Control Module (CCM) receives clocks from the PLLs and
oscillators and generates clocks for on-chip peripherals.
Furthermore, as agreed in [1], this change represents the first step
toward the implementation of the anatop driver. Currently, in fact,
there is no dedicated anatop driver, but the CCM driver parses the
anatop node and registers the PLLs it produces.
[1] https://lore.kernel.org/imx/20241106090549.3684963-1-dario.binacchi@amarulasolutions.com/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v7)
Changes in v7:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski
Changes in v6:
- Improve commit message
- Merge it with patch 10, 11, and 12:
- 10/20 dt-bindings: clock: imx8mm: add binding definitions for anatop
- 11/20 dt-bindings: clock: imx8mn: add binding definitions for anatop
- 12/20 dt-bindings: clock: imx8mp: add binding definitions for anatop
Changes in v4:
- New
.../bindings/clock/fsl,imx8m-anatop.yaml | 53 ++++++++++++++-
include/dt-bindings/clock/imx8mm-clock.h | 64 +++++++++++++++++
include/dt-bindings/clock/imx8mn-clock.h | 64 +++++++++++++++++
include/dt-bindings/clock/imx8mp-clock.h | 68 +++++++++++++++++++
4 files changed, 248 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml
index bbd22e95b319..f439b0a94ce2 100644
--- a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml
+++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml
@@ -30,22 +30,73 @@ properties:
interrupts:
maxItems: 1
+ clocks:
+ minItems: 2
+ maxItems: 3
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+
'#clock-cells':
const: 1
required:
- compatible
- reg
+ - clocks
+ - clock-names
- '#clock-cells'
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mq-anatop
+ then:
+ properties:
+ clocks:
+ items:
+ - description: 32k osc
+ - description: 25m osc
+ - description: 27m osc
+ clock-names:
+ items:
+ - const: ckil
+ - const: osc_25m
+ - const: osc_27m
+ else:
+ properties:
+ clocks:
+ items:
+ - description: 32k osc
+ - description: 24m osc
+
+ clock-names:
+ items:
+ - const: osc_32k
+ - const: osc_24m
+
additionalProperties: false
examples:
- |
- anatop: clock-controller@30360000 {
+ clock-controller@30360000 {
compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
#clock-cells = <1>;
+ clocks = <&osc_32k>, <&osc_24m>;
+ clock-names = "osc_32k", "osc_24m";
+ };
+
+ - |
+ clock-controller@30360000 {
+ compatible = "fsl,imx8mq-anatop";
+ reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&ckil>, <&osc_25m>, <&osc_27m>;
+ clock-names = "ckil", "osc_25m", "osc_27m";
};
...
diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h
index 102d8a6cdb55..017c06e48430 100644
--- a/include/dt-bindings/clock/imx8mm-clock.h
+++ b/include/dt-bindings/clock/imx8mm-clock.h
@@ -287,4 +287,68 @@
#define IMX8MM_CLK_END 258
+#define IMX8MM_ANATOP_CLK_DUMMY 0
+#define IMX8MM_ANATOP_CLK_32K 1
+#define IMX8MM_ANATOP_CLK_24M 2
+#define IMX8MM_ANATOP_AUDIO_PLL1_REF_SEL 3
+#define IMX8MM_ANATOP_AUDIO_PLL2_REF_SEL 4
+#define IMX8MM_ANATOP_VIDEO_PLL_REF_SEL 5
+#define IMX8MM_ANATOP_DRAM_PLL_REF_SEL 6
+#define IMX8MM_ANATOP_GPU_PLL_REF_SEL 7
+#define IMX8MM_ANATOP_VPU_PLL_REF_SEL 8
+#define IMX8MM_ANATOP_ARM_PLL_REF_SEL 9
+#define IMX8MM_ANATOP_SYS_PLL3_REF_SEL 10
+#define IMX8MM_ANATOP_AUDIO_PLL1 11
+#define IMX8MM_ANATOP_AUDIO_PLL2 12
+#define IMX8MM_ANATOP_VIDEO_PLL 13
+#define IMX8MM_ANATOP_DRAM_PLL 14
+#define IMX8MM_ANATOP_GPU_PLL 15
+#define IMX8MM_ANATOP_VPU_PLL 16
+#define IMX8MM_ANATOP_ARM_PLL 17
+#define IMX8MM_ANATOP_SYS_PLL1 18
+#define IMX8MM_ANATOP_SYS_PLL2 19
+#define IMX8MM_ANATOP_SYS_PLL3 20
+#define IMX8MM_ANATOP_AUDIO_PLL1_BYPASS 21
+#define IMX8MM_ANATOP_AUDIO_PLL2_BYPASS 22
+#define IMX8MM_ANATOP_VIDEO_PLL_BYPASS 23
+#define IMX8MM_ANATOP_DRAM_PLL_BYPASS 24
+#define IMX8MM_ANATOP_GPU_PLL_BYPASS 25
+#define IMX8MM_ANATOP_VPU_PLL_BYPASS 26
+#define IMX8MM_ANATOP_ARM_PLL_BYPASS 27
+#define IMX8MM_ANATOP_SYS_PLL3_BYPASS 28
+#define IMX8MM_ANATOP_AUDIO_PLL1_OUT 29
+#define IMX8MM_ANATOP_AUDIO_PLL2_OUT 30
+#define IMX8MM_ANATOP_VIDEO_PLL_OUT 31
+#define IMX8MM_ANATOP_DRAM_PLL_OUT 32
+#define IMX8MM_ANATOP_GPU_PLL_OUT 33
+#define IMX8MM_ANATOP_VPU_PLL_OUT 34
+#define IMX8MM_ANATOP_ARM_PLL_OUT 35
+#define IMX8MM_ANATOP_SYS_PLL3_OUT 36
+#define IMX8MM_ANATOP_SYS_PLL1_OUT 37
+#define IMX8MM_ANATOP_SYS_PLL1_40M 38
+#define IMX8MM_ANATOP_SYS_PLL1_80M 39
+#define IMX8MM_ANATOP_SYS_PLL1_100M 40
+#define IMX8MM_ANATOP_SYS_PLL1_133M 41
+#define IMX8MM_ANATOP_SYS_PLL1_160M 42
+#define IMX8MM_ANATOP_SYS_PLL1_200M 43
+#define IMX8MM_ANATOP_SYS_PLL1_266M 44
+#define IMX8MM_ANATOP_SYS_PLL1_400M 45
+#define IMX8MM_ANATOP_SYS_PLL1_800M 46
+#define IMX8MM_ANATOP_SYS_PLL2_OUT 47
+#define IMX8MM_ANATOP_SYS_PLL2_50M 48
+#define IMX8MM_ANATOP_SYS_PLL2_100M 49
+#define IMX8MM_ANATOP_SYS_PLL2_125M 50
+#define IMX8MM_ANATOP_SYS_PLL2_166M 51
+#define IMX8MM_ANATOP_SYS_PLL2_200M 52
+#define IMX8MM_ANATOP_SYS_PLL2_250M 53
+#define IMX8MM_ANATOP_SYS_PLL2_333M 54
+#define IMX8MM_ANATOP_SYS_PLL2_500M 55
+#define IMX8MM_ANATOP_SYS_PLL2_1000M 56
+#define IMX8MM_ANATOP_CLK_CLKOUT1_SEL 57
+#define IMX8MM_ANATOP_CLK_CLKOUT1_DIV 58
+#define IMX8MM_ANATOP_CLK_CLKOUT1 59
+#define IMX8MM_ANATOP_CLK_CLKOUT2_SEL 60
+#define IMX8MM_ANATOP_CLK_CLKOUT2_DIV 61
+#define IMX8MM_ANATOP_CLK_CLKOUT2 62
+
#endif
diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h
index 04809edab33c..b2fa73803d45 100644
--- a/include/dt-bindings/clock/imx8mn-clock.h
+++ b/include/dt-bindings/clock/imx8mn-clock.h
@@ -267,4 +267,68 @@
#define IMX8MN_CLK_END 235
+#define IMX8MN_ANATOP_CLK_DUMMY 0
+#define IMX8MN_ANATOP_CLK_32K 1
+#define IMX8MN_ANATOP_CLK_24M 2
+#define IMX8MN_ANATOP_AUDIO_PLL1_REF_SEL 3
+#define IMX8MN_ANATOP_AUDIO_PLL2_REF_SEL 4
+#define IMX8MN_ANATOP_VIDEO_PLL_REF_SEL 5
+#define IMX8MN_ANATOP_DRAM_PLL_REF_SEL 6
+#define IMX8MN_ANATOP_GPU_PLL_REF_SEL 7
+#define IMX8MN_ANATOP_M7_ALT_PLL_REF_SEL 8
+#define IMX8MN_ANATOP_ARM_PLL_REF_SEL 9
+#define IMX8MN_ANATOP_SYS_PLL3_REF_SEL 10
+#define IMX8MN_ANATOP_AUDIO_PLL1 11
+#define IMX8MN_ANATOP_AUDIO_PLL2 12
+#define IMX8MN_ANATOP_VIDEO_PLL 13
+#define IMX8MN_ANATOP_DRAM_PLL 14
+#define IMX8MN_ANATOP_GPU_PLL 15
+#define IMX8MN_ANATOP_M7_ALT_PLL 16
+#define IMX8MN_ANATOP_ARM_PLL 17
+#define IMX8MN_ANATOP_SYS_PLL1 18
+#define IMX8MN_ANATOP_SYS_PLL2 19
+#define IMX8MN_ANATOP_SYS_PLL3 20
+#define IMX8MN_ANATOP_AUDIO_PLL1_BYPASS 21
+#define IMX8MN_ANATOP_AUDIO_PLL2_BYPASS 22
+#define IMX8MN_ANATOP_VIDEO_PLL_BYPASS 23
+#define IMX8MN_ANATOP_DRAM_PLL_BYPASS 24
+#define IMX8MN_ANATOP_GPU_PLL_BYPASS 25
+#define IMX8MN_ANATOP_M7_ALT_PLL_BYPASS 26
+#define IMX8MN_ANATOP_ARM_PLL_BYPASS 27
+#define IMX8MN_ANATOP_SYS_PLL3_BYPASS 28
+#define IMX8MN_ANATOP_AUDIO_PLL1_OUT 29
+#define IMX8MN_ANATOP_AUDIO_PLL2_OUT 30
+#define IMX8MN_ANATOP_VIDEO_PLL_OUT 31
+#define IMX8MN_ANATOP_DRAM_PLL_OUT 32
+#define IMX8MN_ANATOP_GPU_PLL_OUT 33
+#define IMX8MN_ANATOP_M7_ALT_PLL_OUT 34
+#define IMX8MN_ANATOP_ARM_PLL_OUT 35
+#define IMX8MN_ANATOP_SYS_PLL3_OUT 36
+#define IMX8MN_ANATOP_SYS_PLL1_OUT 37
+#define IMX8MN_ANATOP_SYS_PLL1_40M 38
+#define IMX8MN_ANATOP_SYS_PLL1_80M 39
+#define IMX8MN_ANATOP_SYS_PLL1_100M 40
+#define IMX8MN_ANATOP_SYS_PLL1_133M 41
+#define IMX8MN_ANATOP_SYS_PLL1_160M 42
+#define IMX8MN_ANATOP_SYS_PLL1_200M 43
+#define IMX8MN_ANATOP_SYS_PLL1_266M 44
+#define IMX8MN_ANATOP_SYS_PLL1_400M 45
+#define IMX8MN_ANATOP_SYS_PLL1_800M 46
+#define IMX8MN_ANATOP_SYS_PLL2_OUT 47
+#define IMX8MN_ANATOP_SYS_PLL2_50M 48
+#define IMX8MN_ANATOP_SYS_PLL2_100M 49
+#define IMX8MN_ANATOP_SYS_PLL2_125M 50
+#define IMX8MN_ANATOP_SYS_PLL2_166M 51
+#define IMX8MN_ANATOP_SYS_PLL2_200M 52
+#define IMX8MN_ANATOP_SYS_PLL2_250M 53
+#define IMX8MN_ANATOP_SYS_PLL2_333M 54
+#define IMX8MN_ANATOP_SYS_PLL2_500M 55
+#define IMX8MN_ANATOP_SYS_PLL2_1000M 56
+#define IMX8MN_ANATOP_CLK_CLKOUT1_SEL 57
+#define IMX8MN_ANATOP_CLK_CLKOUT1_DIV 58
+#define IMX8MN_ANATOP_CLK_CLKOUT1 59
+#define IMX8MN_ANATOP_CLK_CLKOUT2_SEL 60
+#define IMX8MN_ANATOP_CLK_CLKOUT2_DIV 61
+#define IMX8MN_ANATOP_CLK_CLKOUT2 62
+
#endif
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 3235d7de3b62..8c076225fd9e 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -402,4 +402,72 @@
#define IMX8MP_CLK_AUDIOMIX_END 59
+#define IMX8MP_ANATOP_CLK_DUMMY 0
+#define IMX8MP_ANATOP_CLK_24M 1
+#define IMX8MP_ANATOP_CLK_32K 2
+#define IMX8MP_ANATOP_AUDIO_PLL1_REF_SEL 3
+#define IMX8MP_ANATOP_AUDIO_PLL2_REF_SEL 4
+#define IMX8MP_ANATOP_VIDEO_PLL_REF_SEL 5
+#define IMX8MP_ANATOP_DRAM_PLL_REF_SEL 6
+#define IMX8MP_ANATOP_GPU_PLL_REF_SEL 7
+#define IMX8MP_ANATOP_VPU_PLL_REF_SEL 8
+#define IMX8MP_ANATOP_ARM_PLL_REF_SEL 9
+#define IMX8MP_ANATOP_SYS_PLL1_REF_SEL 10
+#define IMX8MP_ANATOP_SYS_PLL2_REF_SEL 11
+#define IMX8MP_ANATOP_SYS_PLL3_REF_SEL 12
+#define IMX8MP_ANATOP_AUDIO_PLL1 13
+#define IMX8MP_ANATOP_AUDIO_PLL2 14
+#define IMX8MP_ANATOP_VIDEO_PLL 15
+#define IMX8MP_ANATOP_DRAM_PLL 16
+#define IMX8MP_ANATOP_GPU_PLL 17
+#define IMX8MP_ANATOP_VPU_PLL 18
+#define IMX8MP_ANATOP_ARM_PLL 19
+#define IMX8MP_ANATOP_SYS_PLL1 20
+#define IMX8MP_ANATOP_SYS_PLL2 21
+#define IMX8MP_ANATOP_SYS_PLL3 22
+#define IMX8MP_ANATOP_AUDIO_PLL1_BYPASS 23
+#define IMX8MP_ANATOP_AUDIO_PLL2_BYPASS 24
+#define IMX8MP_ANATOP_VIDEO_PLL_BYPASS 25
+#define IMX8MP_ANATOP_DRAM_PLL_BYPASS 26
+#define IMX8MP_ANATOP_GPU_PLL_BYPASS 27
+#define IMX8MP_ANATOP_VPU_PLL_BYPASS 28
+#define IMX8MP_ANATOP_ARM_PLL_BYPASS 29
+#define IMX8MP_ANATOP_SYS_PLL1_BYPASS 30
+#define IMX8MP_ANATOP_SYS_PLL2_BYPASS 31
+#define IMX8MP_ANATOP_SYS_PLL3_BYPASS 32
+#define IMX8MP_ANATOP_AUDIO_PLL1_OUT 33
+#define IMX8MP_ANATOP_AUDIO_PLL2_OUT 34
+#define IMX8MP_ANATOP_VIDEO_PLL_OUT 35
+#define IMX8MP_ANATOP_DRAM_PLL_OUT 36
+#define IMX8MP_ANATOP_GPU_PLL_OUT 37
+#define IMX8MP_ANATOP_VPU_PLL_OUT 38
+#define IMX8MP_ANATOP_ARM_PLL_OUT 39
+#define IMX8MP_ANATOP_SYS_PLL3_OUT 40
+#define IMX8MP_ANATOP_SYS_PLL1_OUT 41
+#define IMX8MP_ANATOP_SYS_PLL1_40M 42
+#define IMX8MP_ANATOP_SYS_PLL1_80M 43
+#define IMX8MP_ANATOP_SYS_PLL1_100M 44
+#define IMX8MP_ANATOP_SYS_PLL1_133M 45
+#define IMX8MP_ANATOP_SYS_PLL1_160M 46
+#define IMX8MP_ANATOP_SYS_PLL1_200M 47
+#define IMX8MP_ANATOP_SYS_PLL1_266M 48
+#define IMX8MP_ANATOP_SYS_PLL1_400M 49
+#define IMX8MP_ANATOP_SYS_PLL1_800M 50
+#define IMX8MP_ANATOP_SYS_PLL2_OUT 51
+#define IMX8MP_ANATOP_SYS_PLL2_50M 52
+#define IMX8MP_ANATOP_SYS_PLL2_100M 53
+#define IMX8MP_ANATOP_SYS_PLL2_125M 54
+#define IMX8MP_ANATOP_SYS_PLL2_166M 55
+#define IMX8MP_ANATOP_SYS_PLL2_200M 56
+#define IMX8MP_ANATOP_SYS_PLL2_250M 57
+#define IMX8MP_ANATOP_SYS_PLL2_333M 58
+#define IMX8MP_ANATOP_SYS_PLL2_500M 59
+#define IMX8MP_ANATOP_SYS_PLL2_1000M 60
+#define IMX8MP_ANATOP_CLK_CLKOUT1_SEL 61
+#define IMX8MP_ANATOP_CLK_CLKOUT1_DIV 62
+#define IMX8MP_ANATOP_CLK_CLKOUT1 63
+#define IMX8MP_ANATOP_CLK_CLKOUT2_SEL 64
+#define IMX8MP_ANATOP_CLK_CLKOUT2_DIV 65
+#define IMX8MP_ANATOP_CLK_CLKOUT2 66
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 06/18] arm64: dts: imx8mm: add anatop clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (2 preceding siblings ...)
2025-03-06 11:27 ` [PATCH v10 05/18] dt-bindings: clock: imx8m-anatop: add oscillators and PLLs Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 07/18] arm64: dts: imx8mn: " Dario Binacchi
` (7 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add clocks to anatop node.
Add the bindings definitions for the anatop node. The patch is
preparatory for future developments.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 4de3bf22902b..597041a05073 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -600,6 +600,8 @@ anatop: clock-controller@30360000 {
compatible = "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
#clock-cells = <1>;
+ clocks = <&osc_32k>, <&osc_24m>;
+ clock-names = "osc_32k", "osc_24m";
};
snvs: snvs@30370000 {
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 07/18] arm64: dts: imx8mn: add anatop clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (3 preceding siblings ...)
2025-03-06 11:27 ` [PATCH v10 06/18] arm64: dts: imx8mm: add anatop clocks Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 08/18] arm64: dts: imx8mp: " Dario Binacchi
` (6 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add clocks to anatop node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a5f9cfb46e5d..49be492b5687 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -606,6 +606,8 @@ anatop: clock-controller@30360000 {
compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
#clock-cells = <1>;
+ clocks = <&osc_32k>, <&osc_24m>;
+ clock-names = "osc_32k", "osc_24m";
};
snvs: snvs@30370000 {
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 08/18] arm64: dts: imx8mp: add anatop clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (4 preceding siblings ...)
2025-03-06 11:27 ` [PATCH v10 07/18] arm64: dts: imx8mn: " Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:27 ` [PATCH v10 09/18] arm64: dts: imx8mq: " Dario Binacchi
` (5 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add clocks to anatop node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index e0d3b8cba221..0b928e173f29 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -709,6 +709,8 @@ anatop: clock-controller@30360000 {
compatible = "fsl,imx8mp-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
#clock-cells = <1>;
+ clocks = <&osc_32k>, <&osc_24m>;
+ clock-names = "osc_32k", "osc_24m";
};
snvs: snvs@30370000 {
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 09/18] arm64: dts: imx8mq: add anatop clocks
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (5 preceding siblings ...)
2025-03-06 11:27 ` [PATCH v10 08/18] arm64: dts: imx8mp: " Dario Binacchi
@ 2025-03-06 11:27 ` Dario Binacchi
2025-03-06 11:28 ` [PATCH v10 15/18] dt-bindings: clock: imx8m-clock: add PLLs Dario Binacchi
` (4 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:27 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add clocks to anatop node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d51de8d899b2..1d1424a136f0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -817,6 +817,8 @@ anatop: clock-controller@30360000 {
reg = <0x30360000 0x10000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
+ clocks = <&ckil>, <&osc_25m>, <&osc_27m>;
+ clock-names = "ckil", "osc_25m", "osc_27m";
};
snvs: snvs@30370000 {
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 15/18] dt-bindings: clock: imx8m-clock: add PLLs
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (6 preceding siblings ...)
2025-03-06 11:27 ` [PATCH v10 09/18] arm64: dts: imx8mq: " Dario Binacchi
@ 2025-03-06 11:28 ` Dario Binacchi
2025-03-06 11:28 ` [PATCH v10 16/18] arm64: dts: imx8mm: add PLLs to clock controller module (CCM) Dario Binacchi
` (3 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:28 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Krzysztof Kozlowski, Conor Dooley, Fabio Estevam,
Krzysztof Kozlowski, Michael Turquette, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
linux-arm-kernel, linux-clk
Though adding the PLLs to clocks and clock-names properties will break
the ABI, it is required to accurately describe the hardware. Indeed,
the Clock Control Module (CCM) receives clocks from the PLLs and
oscillators and generates clocks for on-chip peripherals.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v7)
Changes in v7:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski
Changes in v6:
- New
.../bindings/clock/imx8m-clock.yaml | 27 ++++++++++++++-----
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
index c643d4a81478..d96570bf60dc 100644
--- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
@@ -29,12 +29,12 @@ properties:
maxItems: 2
clocks:
- minItems: 6
- maxItems: 7
+ minItems: 7
+ maxItems: 10
clock-names:
- minItems: 6
- maxItems: 7
+ minItems: 7
+ maxItems: 10
'#clock-cells':
const: 1
@@ -86,6 +86,10 @@ allOf:
- description: ext2 clock input
- description: ext3 clock input
- description: ext4 clock input
+ - description: audio1 PLL input
+ - description: audio2 PLL input
+ - description: dram PLL input
+ - description: video PLL input
clock-names:
items:
@@ -95,20 +99,31 @@ allOf:
- const: clk_ext2
- const: clk_ext3
- const: clk_ext4
+ - const: audio_pll1
+ - const: audio_pll2
+ - const: dram_pll
+ - const: video_pll
additionalProperties: false
examples:
# Clock Control Module node:
- |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+
clock-controller@30380000 {
compatible = "fsl,imx8mm-ccm";
reg = <0x30380000 0x10000>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
- <&clk_ext3>, <&clk_ext4>;
+ <&clk_ext3>, <&clk_ext4>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL2>,
+ <&anatop IMX8MM_ANATOP_DRAM_PLL>,
+ <&anatop IMX8MM_ANATOP_VIDEO_PLL>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
- "clk_ext3", "clk_ext4";
+ "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2",
+ "dram_pll", "video_pll";
};
- |
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 16/18] arm64: dts: imx8mm: add PLLs to clock controller module (CCM)
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (7 preceding siblings ...)
2025-03-06 11:28 ` [PATCH v10 15/18] dt-bindings: clock: imx8m-clock: add PLLs Dario Binacchi
@ 2025-03-06 11:28 ` Dario Binacchi
2025-03-06 11:28 ` [PATCH v10 17/18] arm64: dts: imx8mn: " Dario Binacchi
` (2 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:28 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add the PLLs generated by anatop to the clock list of the Clock
Controller Module (CCM) node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 597041a05073..79f4c1ae7d8b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -642,9 +642,14 @@ clk: clock-controller@30380000 {
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
- <&clk_ext3>, <&clk_ext4>;
+ <&clk_ext3>, <&clk_ext4>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MM_ANATOP_AUDIO_PLL2>,
+ <&anatop IMX8MM_ANATOP_DRAM_PLL>,
+ <&anatop IMX8MM_ANATOP_VIDEO_PLL>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
- "clk_ext3", "clk_ext4";
+ "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2",
+ "dram_pll", "video_pll";
assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
<&clk IMX8MM_CLK_A53_CORE>,
<&clk IMX8MM_CLK_NOC>,
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 17/18] arm64: dts: imx8mn: add PLLs to clock controller module (CCM)
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (8 preceding siblings ...)
2025-03-06 11:28 ` [PATCH v10 16/18] arm64: dts: imx8mm: add PLLs to clock controller module (CCM) Dario Binacchi
@ 2025-03-06 11:28 ` Dario Binacchi
2025-03-06 11:28 ` [PATCH v10 18/18] arm64: dts: imx8mp: " Dario Binacchi
2025-03-14 9:35 ` [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Peng Fan
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:28 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add the PLLs generated by anatop to the clock list of the Clock
Controller Module (CCM) node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
(no changes since v4)
Changes in v4:
- New
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 49be492b5687..01013c1fd61d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -643,9 +643,14 @@ clk: clock-controller@30380000 {
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
- <&clk_ext3>, <&clk_ext4>;
+ <&clk_ext3>, <&clk_ext4>,
+ <&anatop IMX8MN_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MN_ANATOP_AUDIO_PLL2>,
+ <&anatop IMX8MN_ANATOP_DRAM_PLL>,
+ <&anatop IMX8MN_ANATOP_VIDEO_PLL>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
- "clk_ext3", "clk_ext4";
+ "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2",
+ "dram_pll", "video_pll";
assigned-clocks = <&clk IMX8MN_CLK_A53_SRC>,
<&clk IMX8MN_CLK_A53_CORE>,
<&clk IMX8MN_CLK_NOC>,
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v10 18/18] arm64: dts: imx8mp: add PLLs to clock controller module (CCM)
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (9 preceding siblings ...)
2025-03-06 11:28 ` [PATCH v10 17/18] arm64: dts: imx8mn: " Dario Binacchi
@ 2025-03-06 11:28 ` Dario Binacchi
2025-03-14 9:35 ` [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Peng Fan
11 siblings, 0 replies; 15+ messages in thread
From: Dario Binacchi @ 2025-03-06 11:28 UTC (permalink / raw)
To: linux-kernel
Cc: Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula, Dario Binacchi,
Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, imx, linux-arm-kernel
Add the PLLs generated by anatop to the clock list of the Clock
Controller Module (CCM) node.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
Changes in v10:
- Drop the v9 patches:
16/23 dt-bindings: clock: imx8m-clock: support spread spectrum clocking
17/23 clk: imx: pll14xx: support spread spectrum clock generation
17/23 clk: imx8mn: support spread spectrum clock generation
21/23 clk: imx8mp: support spread spectrum clock generation
23/23 clk: imx8mm: support spread spectrum clock generation
Changes in v9:
- Add 'Reviewed-by' tag of Peng Fan for imx8mn platform patches
- Fix building warning raised by the kernel test robot for patch
v8, 11/18 clk: imx: add support for i.MX8MN anatop clock driver
- Add patches for imx8m{m,p} platforms:
- 23/23 clk: imx8mm: support spread spectrum clock generation
- 22/23 clk: imx: add support for i.MX8MM anatop clock driver
- 21/23 clk: imx8mp: support spread spectrum clock generation
- 20/23 clk: imx8mp: rename ccm_base to base
- 19/23 clk: imx: add support for i.MX8MP anatop clock driver
Changes in v8:
- Drop the patches added in version 7:
- 10/23 dt-bindings: clock: imx8m-clock: add phandle to the anatop
- 11/23 arm64: dts: imx8mm: add phandle to anatop within CCM
- 12/23 arm64: dts: imx8mn: add phandle to anatop within CCM
- 13/23 arm64: dts: imx8mp: add phandle to anatop within CCM
- 14/23 arm64: dts: imx8mq: add phandle to anatop within CCM
Changes in v7:
- Add and manage fsl,anatop property as phandle to the anatop node with
the new patches:
- 10/23 dt-bindings: clock: imx8m-clock: add phandle to the anatop
- 11/23 arm64: dts: imx8mm: add phandle to anatop within CCM
- 12/23 arm64: dts: imx8mn: add phandle to anatop within CCM
- 13/23 arm64: dts: imx8mp: add phandle to anatop within CCM
- 14/23 arm64: dts: imx8mq: add phandle to anatop within CCM
Changes in v6:
- Merge patches:
10/20 dt-bindings: clock: imx8mm: add binding definitions for anatop
11/20 dt-bindings: clock: imx8mn: add binding definitions for anatop
12/20 dt-bindings: clock: imx8mp: add binding definitions for anatop
to
05/20 dt-bindings: clock: imx8m-anatop: define clocks/clock-names
now renamed
05/18 dt-bindings: clock: imx8m-anatop: add oscillators and PLLs
- Split the patch
15/20 dt-bindings-clock-imx8m-clock-support-spread-spectru.patch
into
12/18 dt-bindings: clock: imx8m-clock: add PLLs
16/18 dt-bindings: clock: imx8m-clock: support spread spectrum clocking
Changes in v5:
- Fix compilation errors.
- Separate driver code from dt-bindings
Changes in v4:
- Add dt-bindings for anatop
- Add anatop driver
- Drop fsl,ssc-clocks from spread spectrum dt-bindings
- New
Changes in v3:
- Patches 1/8 has been added in version 3. The dt-bindings have
been moved from fsl,imx8m-anatop.yaml to imx8m-clock.yaml. The
anatop device (fsl,imx8m-anatop.yaml) is indeed more or less a
syscon, so it represents a memory area accessible by ccm
(imx8m-clock.yaml) to setup the PLLs.
- Patches {3,5}/8 have been added in version 3.
- Patches {4,6,8}/8 use ccm device node instead of the anatop one.
Changes in v2:
- Add "allOf:" and place it after "required:" block, like in the
example schema.
- Move the properties definition to the top-level.
- Drop unit types as requested by the "make dt_binding_check" command.
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 0b928e173f29..eab05170442d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -751,9 +751,14 @@ clk: clock-controller@30380000 {
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
- <&clk_ext3>, <&clk_ext4>;
+ <&clk_ext3>, <&clk_ext4>,
+ <&anatop IMX8MP_ANATOP_AUDIO_PLL1>,
+ <&anatop IMX8MP_ANATOP_AUDIO_PLL2>,
+ <&anatop IMX8MP_ANATOP_DRAM_PLL>,
+ <&anatop IMX8MP_ANATOP_VIDEO_PLL>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
- "clk_ext3", "clk_ext4";
+ "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2",
+ "dram_pll", "video_pll";
assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
<&clk IMX8MP_CLK_A53_CORE>,
<&clk IMX8MP_CLK_NOC>,
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs
2025-03-06 11:27 [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Dario Binacchi
` (10 preceding siblings ...)
2025-03-06 11:28 ` [PATCH v10 18/18] arm64: dts: imx8mp: " Dario Binacchi
@ 2025-03-14 9:35 ` Peng Fan
2025-04-11 8:38 ` Dario Binacchi
11 siblings, 1 reply; 15+ messages in thread
From: Peng Fan @ 2025-03-14 9:35 UTC (permalink / raw)
To: Dario Binacchi
Cc: linux-kernel, Stephen Boyd, Peng Fan, Abel Vesa, linux-amarula,
Conor Dooley, Dan Carpenter, Fabio Estevam, Krzysztof Kozlowski,
Michael Turquette, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, devicetree, imx, linux-arm-kernel,
linux-clk
On Thu, Mar 06, 2025 at 12:27:49PM +0100, Dario Binacchi wrote:
>This version keeps the version v9 patches that can be merged and
>removes the patches that will need to be modified in case Peng's
>PR https://github.com/devicetree-org/dt-schema/pull/154 is accepted.
>The idea is to speed up the merging of the patches in the series
>that have already been reviewed and are not dependent on the
>introduction of the assigned-clocks-sscs property, and postpone
>the patches for spread spectrum to a future series once it becomes
>clear what needs to be done.
>
Although I give R-b, there is an idea just come out in my mind that this
might break OS distribution that use firmware(e.g. U-Boot) to publish
device tree for Linux Kernel, such as ARM System-Ready complaint OS.
I overlooked this point in previous patchset reviewing.
Since this patchset is to move anatop stuff to a new driver to reflect
the HW truth. And requires new entries in CCM node, so old bootloader
with new kernel will not boot for OS distribution, such as Fedora/openSuse.
Not sure how to keep backwards support as before. Leave to maintainers
to say if they are ok with this.
Regards,
Peng
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs
2025-03-14 9:35 ` [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Peng Fan
@ 2025-04-11 8:38 ` Dario Binacchi
2025-04-22 13:14 ` Abel Vesa
0 siblings, 1 reply; 15+ messages in thread
From: Dario Binacchi @ 2025-04-11 8:38 UTC (permalink / raw)
To: Peng Fan, Stephen Boyd, Abel Vesa
Cc: linux-kernel, Peng Fan, linux-amarula, Conor Dooley,
Dan Carpenter, Fabio Estevam, Krzysztof Kozlowski,
Michael Turquette, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, devicetree, imx, linux-arm-kernel,
linux-clk
On Fri, Mar 14, 2025 at 9:27 AM Peng Fan <peng.fan@oss.nxp.com> wrote:
>
> On Thu, Mar 06, 2025 at 12:27:49PM +0100, Dario Binacchi wrote:
> >This version keeps the version v9 patches that can be merged and
> >removes the patches that will need to be modified in case Peng's
> >PR https://github.com/devicetree-org/dt-schema/pull/154 is accepted.
> >The idea is to speed up the merging of the patches in the series
> >that have already been reviewed and are not dependent on the
> >introduction of the assigned-clocks-sscs property, and postpone
> >the patches for spread spectrum to a future series once it becomes
> >clear what needs to be done.
> >
> Although I give R-b, there is an idea just come out in my mind that this
> might break OS distribution that use firmware(e.g. U-Boot) to publish
> device tree for Linux Kernel, such as ARM System-Ready complaint OS.
> I overlooked this point in previous patchset reviewing.
>
> Since this patchset is to move anatop stuff to a new driver to reflect
> the HW truth. And requires new entries in CCM node, so old bootloader
> with new kernel will not boot for OS distribution, such as Fedora/openSuse.
>
> Not sure how to keep backwards support as before. Leave to maintainers
> to say if they are ok with this.
Many thanks to Peng for the review, and a gentle ping to the maintainers.
This series has been ongoing for a few months and has reached version 10,
thanks to the reviews from Krzysztof and Peng.
I kindly ask you to consider it as well.
Thanks and regards,
Dario
>
> Regards,
> Peng
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binacchi@amarulasolutions.com
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs
2025-04-11 8:38 ` Dario Binacchi
@ 2025-04-22 13:14 ` Abel Vesa
0 siblings, 0 replies; 15+ messages in thread
From: Abel Vesa @ 2025-04-22 13:14 UTC (permalink / raw)
To: Dario Binacchi
Cc: Peng Fan, Stephen Boyd, Abel Vesa, linux-kernel, Peng Fan,
linux-amarula, Conor Dooley, Dan Carpenter, Fabio Estevam,
Krzysztof Kozlowski, Michael Turquette, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
linux-arm-kernel, linux-clk
On 25-04-11 10:38:17, Dario Binacchi wrote:
> On Fri, Mar 14, 2025 at 9:27 AM Peng Fan <peng.fan@oss.nxp.com> wrote:
> >
> > On Thu, Mar 06, 2025 at 12:27:49PM +0100, Dario Binacchi wrote:
> > >This version keeps the version v9 patches that can be merged and
> > >removes the patches that will need to be modified in case Peng's
> > >PR https://github.com/devicetree-org/dt-schema/pull/154 is accepted.
> > >The idea is to speed up the merging of the patches in the series
> > >that have already been reviewed and are not dependent on the
> > >introduction of the assigned-clocks-sscs property, and postpone
> > >the patches for spread spectrum to a future series once it becomes
> > >clear what needs to be done.
> > >
> > Although I give R-b, there is an idea just come out in my mind that this
> > might break OS distribution that use firmware(e.g. U-Boot) to publish
> > device tree for Linux Kernel, such as ARM System-Ready complaint OS.
> > I overlooked this point in previous patchset reviewing.
> >
> > Since this patchset is to move anatop stuff to a new driver to reflect
> > the HW truth. And requires new entries in CCM node, so old bootloader
> > with new kernel will not boot for OS distribution, such as Fedora/openSuse.
> >
> > Not sure how to keep backwards support as before. Leave to maintainers
> > to say if they are ok with this.
>
> Many thanks to Peng for the review, and a gentle ping to the maintainers.
> This series has been ongoing for a few months and has reached version 10,
> thanks to the reviews from Krzysztof and Peng.
> I kindly ask you to consider it as well.
Hi Dario,
Please rebase and resend. I intend to apply the clk ones. Hope Shawn
will apply the DT ones as well.
Thanks for this effort and sorry for the delays.
Abel
>
> Thanks and regards,
> Dario
>
> >
> > Regards,
> > Peng
>
>
>
> --
>
> Dario Binacchi
>
> Senior Embedded Linux Developer
>
> dario.binacchi@amarulasolutions.com
>
> __________________________________
>
>
> Amarula Solutions SRL
>
> Via Le Canevare 30, 31100 Treviso, Veneto, IT
>
> T. +39 042 243 5310
> info@amarulasolutions.com
>
> www.amarulasolutions.com
^ permalink raw reply [flat|nested] 15+ messages in thread